#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::ERCONTRO {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `INTWAKE_EN0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum INTWAKE_EN0R {
#[doc = "No interrupt or wake-up will be generated by event channel 0."]
DISABLED,
#[doc = "An event in channel 0 will trigger an (RTC) interrupt and a wake-up request."]
ENABLED,
}
impl INTWAKE_EN0R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
INTWAKE_EN0R::DISABLED => false,
INTWAKE_EN0R::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> INTWAKE_EN0R {
match value {
false => INTWAKE_EN0R::DISABLED,
true => INTWAKE_EN0R::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline]
pub fn is_disabled(&self) -> bool {
*self == INTWAKE_EN0R::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline]
pub fn is_enabled(&self) -> bool {
*self == INTWAKE_EN0R::ENABLED
}
}
#[doc = "Possible values of the field `GPCLEAR_EN0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum GPCLEAR_EN0R {
#[doc = "Channel 0 has no influence on the general purpose registers."]
DISABLED,
#[doc = "An event in channel 0 will clear the general purpose registers asynchronously."]
ENABLED,
}
impl GPCLEAR_EN0R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
GPCLEAR_EN0R::DISABLED => false,
GPCLEAR_EN0R::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> GPCLEAR_EN0R {
match value {
false => GPCLEAR_EN0R::DISABLED,
true => GPCLEAR_EN0R::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline]
pub fn is_disabled(&self) -> bool {
*self == GPCLEAR_EN0R::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline]
pub fn is_enabled(&self) -> bool {
*self == GPCLEAR_EN0R::ENABLED
}
}
#[doc = "Possible values of the field `POL0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum POL0R {
#[doc = "A channel 0 event is defined as a negative edge on WAKEUP0."]
NEGATIVE,
#[doc = "A channel 0 event is defined as a positive edge on WAKEUP0."]
POSITIVE,
}
impl POL0R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
POL0R::NEGATIVE => false,
POL0R::POSITIVE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> POL0R {
match value {
false => POL0R::NEGATIVE,
true => POL0R::POSITIVE,
}
}
#[doc = "Checks if the value of the field is `NEGATIVE`"]
#[inline]
pub fn is_negative(&self) -> bool {
*self == POL0R::NEGATIVE
}
#[doc = "Checks if the value of the field is `POSITIVE`"]
#[inline]
pub fn is_positive(&self) -> bool {
*self == POL0R::POSITIVE
}
}
#[doc = "Possible values of the field `EV0_INPUT_EN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum EV0_INPUT_ENR {
#[doc = "Event 0 input is disabled and forced high internally."]
DISABLED,
#[doc = "Event 0 input is enabled."]
ENABLED,
}
impl EV0_INPUT_ENR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
EV0_INPUT_ENR::DISABLED => false,
EV0_INPUT_ENR::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> EV0_INPUT_ENR {
match value {
false => EV0_INPUT_ENR::DISABLED,
true => EV0_INPUT_ENR::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline]
pub fn is_disabled(&self) -> bool {
*self == EV0_INPUT_ENR::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline]
pub fn is_enabled(&self) -> bool {
*self == EV0_INPUT_ENR::ENABLED
}
}
#[doc = "Possible values of the field `INTWAKE_EN1`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum INTWAKE_EN1R {
#[doc = "No interrupt or wake-up will be generated by event channel 1."]
DISABLED,
#[doc = "An event in channel 1 will trigger an (RTC) interrupt and a wake-up request."]
ENABLED,
}
impl INTWAKE_EN1R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
INTWAKE_EN1R::DISABLED => false,
INTWAKE_EN1R::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> INTWAKE_EN1R {
match value {
false => INTWAKE_EN1R::DISABLED,
true => INTWAKE_EN1R::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline]
pub fn is_disabled(&self) -> bool {
*self == INTWAKE_EN1R::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline]
pub fn is_enabled(&self) -> bool {
*self == INTWAKE_EN1R::ENABLED
}
}
#[doc = "Possible values of the field `GPCLEAR_EN1`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum GPCLEAR_EN1R {
#[doc = "Channel 1 has no influence on the general purpose registers."]
DISABLED,
#[doc = "A n event in channel 1 will clear the general purpose registers asynchronously."]
ENABLED,
}
impl GPCLEAR_EN1R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
GPCLEAR_EN1R::DISABLED => false,
GPCLEAR_EN1R::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> GPCLEAR_EN1R {
match value {
false => GPCLEAR_EN1R::DISABLED,
true => GPCLEAR_EN1R::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline]
pub fn is_disabled(&self) -> bool {
*self == GPCLEAR_EN1R::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline]
pub fn is_enabled(&self) -> bool {
*self == GPCLEAR_EN1R::ENABLED
}
}
#[doc = "Possible values of the field `POL1`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum POL1R {
#[doc = "A channel 1 event is defined as a negative edge on WAKEUP1."]
NEGATIVE,
#[doc = "A channel 1 event is defined as a positive edge on WAKEUP1."]
POSITIVE,
}
impl POL1R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
POL1R::NEGATIVE => false,
POL1R::POSITIVE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> POL1R {
match value {
false => POL1R::NEGATIVE,
true => POL1R::POSITIVE,
}
}
#[doc = "Checks if the value of the field is `NEGATIVE`"]
#[inline]
pub fn is_negative(&self) -> bool {
*self == POL1R::NEGATIVE
}
#[doc = "Checks if the value of the field is `POSITIVE`"]
#[inline]
pub fn is_positive(&self) -> bool {
*self == POL1R::POSITIVE
}
}
#[doc = "Possible values of the field `EV1_INPUT_EN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum EV1_INPUT_ENR {
#[doc = "Event 1 input is disabled and forced high internally."]
DISABLED,
#[doc = "Event 1 input is enabled."]
ENABLED,
}
impl EV1_INPUT_ENR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
EV1_INPUT_ENR::DISABLED => false,
EV1_INPUT_ENR::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> EV1_INPUT_ENR {
match value {
false => EV1_INPUT_ENR::DISABLED,
true => EV1_INPUT_ENR::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline]
pub fn is_disabled(&self) -> bool {
*self == EV1_INPUT_ENR::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline]
pub fn is_enabled(&self) -> bool {
*self == EV1_INPUT_ENR::ENABLED
}
}
#[doc = "Possible values of the field `INTWAKE_EN2`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum INTWAKE_EN2R {
#[doc = "No interrupt or wake-up will be generated by event channel 2."]
DISABLED,
#[doc = "An event in channel 2 will trigger an (RTC) interrupt and a wake-up request."]
ENABLED,
}
impl INTWAKE_EN2R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
INTWAKE_EN2R::DISABLED => false,
INTWAKE_EN2R::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> INTWAKE_EN2R {
match value {
false => INTWAKE_EN2R::DISABLED,
true => INTWAKE_EN2R::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline]
pub fn is_disabled(&self) -> bool {
*self == INTWAKE_EN2R::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline]
pub fn is_enabled(&self) -> bool {
*self == INTWAKE_EN2R::ENABLED
}
}
#[doc = "Possible values of the field `GPCLEAR_EN2`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum GPCLEAR_EN2R {
#[doc = "Channel 2 has no influence on the general purpose registers."]
DISABLED,
#[doc = "An event in channel 2 will clear the general purpose registers asynchronously."]
ENABLED,
}
impl GPCLEAR_EN2R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
GPCLEAR_EN2R::DISABLED => false,
GPCLEAR_EN2R::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> GPCLEAR_EN2R {
match value {
false => GPCLEAR_EN2R::DISABLED,
true => GPCLEAR_EN2R::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline]
pub fn is_disabled(&self) -> bool {
*self == GPCLEAR_EN2R::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline]
pub fn is_enabled(&self) -> bool {
*self == GPCLEAR_EN2R::ENABLED
}
}
#[doc = "Possible values of the field `POL2`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum POL2R {
#[doc = "A channel 2 event is defined as a negative edge on WAKEUP2."]
NEGATIVE,
#[doc = "A channel 2 event is defined as a positive edge on WAKEUP2."]
POSITIVE,
}
impl POL2R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
POL2R::NEGATIVE => false,
POL2R::POSITIVE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> POL2R {
match value {
false => POL2R::NEGATIVE,
true => POL2R::POSITIVE,
}
}
#[doc = "Checks if the value of the field is `NEGATIVE`"]
#[inline]
pub fn is_negative(&self) -> bool {
*self == POL2R::NEGATIVE
}
#[doc = "Checks if the value of the field is `POSITIVE`"]
#[inline]
pub fn is_positive(&self) -> bool {
*self == POL2R::POSITIVE
}
}
#[doc = "Possible values of the field `EV2_INPUT_EN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum EV2_INPUT_ENR {
#[doc = "Event 2 input is disabled and forced high internally."]
DISABLED,
#[doc = "Event 2 input is enabled."]
ENABLED,
}
impl EV2_INPUT_ENR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
EV2_INPUT_ENR::DISABLED => false,
EV2_INPUT_ENR::ENABLED => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> EV2_INPUT_ENR {
match value {
false => EV2_INPUT_ENR::DISABLED,
true => EV2_INPUT_ENR::ENABLED,
}
}
#[doc = "Checks if the value of the field is `DISABLED`"]
#[inline]
pub fn is_disabled(&self) -> bool {
*self == EV2_INPUT_ENR::DISABLED
}
#[doc = "Checks if the value of the field is `ENABLED`"]
#[inline]
pub fn is_enabled(&self) -> bool {
*self == EV2_INPUT_ENR::ENABLED
}
}
#[doc = "Possible values of the field `ERMODE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ERMODER {
#[doc = "Disable Event Monitor/Recorder clocks. Operation of the Event Monitor/Recorder is disabled except for asynchronous clearing of GP registers if selected."]
DISABLE_EVENT_MONITO,
#[doc = "16 Hz sample clock. Enable Event Monitor/Recorder and select a 16 Hz sample clock for event input edge detection and glitch suppression. Pulses (in either direction) shorter than 62.5 ms to 125 ms will be filtered out."]
_16_HZ_SAMPLE_CLOCK,
#[doc = "64 Hz sample clock. Enable Event Monitor/Recorder and select a 64 Hz sample clock for event input edge detection and glitch suppression. Pulses (in either direction) shorter than 15.6 ms to 31.2 ms will be filtered out."]
_64_HZ_SAMPLE_CLOCK,
#[doc = "1 kHz sample clock. Enable Event Monitor/Recorder and select a 1 kHz sample clock for event input edge detection and glitch suppression. Pulses (in either direction) shorter than 1 ms to 2 ms will be filtered out."]
_1_KHZ_SAMPLE_CLOCK,
}
impl ERMODER {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
match *self {
ERMODER::DISABLE_EVENT_MONITO => 0,
ERMODER::_16_HZ_SAMPLE_CLOCK => 1,
ERMODER::_64_HZ_SAMPLE_CLOCK => 2,
ERMODER::_1_KHZ_SAMPLE_CLOCK => 3,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: u8) -> ERMODER {
match value {
0 => ERMODER::DISABLE_EVENT_MONITO,
1 => ERMODER::_16_HZ_SAMPLE_CLOCK,
2 => ERMODER::_64_HZ_SAMPLE_CLOCK,
3 => ERMODER::_1_KHZ_SAMPLE_CLOCK,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `DISABLE_EVENT_MONITO`"]
#[inline]
pub fn is_disable_event_monito(&self) -> bool {
*self == ERMODER::DISABLE_EVENT_MONITO
}
#[doc = "Checks if the value of the field is `_16_HZ_SAMPLE_CLOCK`"]
#[inline]
pub fn is_16_hz_sample_clock(&self) -> bool {
*self == ERMODER::_16_HZ_SAMPLE_CLOCK
}
#[doc = "Checks if the value of the field is `_64_HZ_SAMPLE_CLOCK`"]
#[inline]
pub fn is_64_hz_sample_clock(&self) -> bool {
*self == ERMODER::_64_HZ_SAMPLE_CLOCK
}
#[doc = "Checks if the value of the field is `_1_KHZ_SAMPLE_CLOCK`"]
#[inline]
pub fn is_1_khz_sample_clock(&self) -> bool {
*self == ERMODER::_1_KHZ_SAMPLE_CLOCK
}
}
#[doc = "Values that can be written to the field `INTWAKE_EN0`"]
pub enum INTWAKE_EN0W {
#[doc = "No interrupt or wake-up will be generated by event channel 0."]
DISABLED,
#[doc = "An event in channel 0 will trigger an (RTC) interrupt and a wake-up request."]
ENABLED,
}
impl INTWAKE_EN0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
INTWAKE_EN0W::DISABLED => false,
INTWAKE_EN0W::ENABLED => true,
}
}
}
#[doc = r" Proxy"]
pub struct _INTWAKE_EN0W<'a> {
w: &'a mut W,
}
impl<'a> _INTWAKE_EN0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: INTWAKE_EN0W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "No interrupt or wake-up will be generated by event channel 0."]
#[inline]
pub fn disabled(self) -> &'a mut W {
self.variant(INTWAKE_EN0W::DISABLED)
}
#[doc = "An event in channel 0 will trigger an (RTC) interrupt and a wake-up request."]
#[inline]
pub fn enabled(self) -> &'a mut W {
self.variant(INTWAKE_EN0W::ENABLED)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `GPCLEAR_EN0`"]
pub enum GPCLEAR_EN0W {
#[doc = "Channel 0 has no influence on the general purpose registers."]
DISABLED,
#[doc = "An event in channel 0 will clear the general purpose registers asynchronously."]
ENABLED,
}
impl GPCLEAR_EN0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
GPCLEAR_EN0W::DISABLED => false,
GPCLEAR_EN0W::ENABLED => true,
}
}
}
#[doc = r" Proxy"]
pub struct _GPCLEAR_EN0W<'a> {
w: &'a mut W,
}
impl<'a> _GPCLEAR_EN0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: GPCLEAR_EN0W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Channel 0 has no influence on the general purpose registers."]
#[inline]
pub fn disabled(self) -> &'a mut W {
self.variant(GPCLEAR_EN0W::DISABLED)
}
#[doc = "An event in channel 0 will clear the general purpose registers asynchronously."]
#[inline]
pub fn enabled(self) -> &'a mut W {
self.variant(GPCLEAR_EN0W::ENABLED)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 1;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `POL0`"]
pub enum POL0W {
#[doc = "A channel 0 event is defined as a negative edge on WAKEUP0."]
NEGATIVE,
#[doc = "A channel 0 event is defined as a positive edge on WAKEUP0."]
POSITIVE,
}
impl POL0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
POL0W::NEGATIVE => false,
POL0W::POSITIVE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _POL0W<'a> {
w: &'a mut W,
}
impl<'a> _POL0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: POL0W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "A channel 0 event is defined as a negative edge on WAKEUP0."]
#[inline]
pub fn negative(self) -> &'a mut W {
self.variant(POL0W::NEGATIVE)
}
#[doc = "A channel 0 event is defined as a positive edge on WAKEUP0."]
#[inline]
pub fn positive(self) -> &'a mut W {
self.variant(POL0W::POSITIVE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 2;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `EV0_INPUT_EN`"]
pub enum EV0_INPUT_ENW {
#[doc = "Event 0 input is disabled and forced high internally."]
DISABLED,
#[doc = "Event 0 input is enabled."]
ENABLED,
}
impl EV0_INPUT_ENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
EV0_INPUT_ENW::DISABLED => false,
EV0_INPUT_ENW::ENABLED => true,
}
}
}
#[doc = r" Proxy"]
pub struct _EV0_INPUT_ENW<'a> {
w: &'a mut W,
}
impl<'a> _EV0_INPUT_ENW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: EV0_INPUT_ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Event 0 input is disabled and forced high internally."]
#[inline]
pub fn disabled(self) -> &'a mut W {
self.variant(EV0_INPUT_ENW::DISABLED)
}
#[doc = "Event 0 input is enabled."]
#[inline]
pub fn enabled(self) -> &'a mut W {
self.variant(EV0_INPUT_ENW::ENABLED)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 3;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `INTWAKE_EN1`"]
pub enum INTWAKE_EN1W {
#[doc = "No interrupt or wake-up will be generated by event channel 1."]
DISABLED,
#[doc = "An event in channel 1 will trigger an (RTC) interrupt and a wake-up request."]
ENABLED,
}
impl INTWAKE_EN1W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
INTWAKE_EN1W::DISABLED => false,
INTWAKE_EN1W::ENABLED => true,
}
}
}
#[doc = r" Proxy"]
pub struct _INTWAKE_EN1W<'a> {
w: &'a mut W,
}
impl<'a> _INTWAKE_EN1W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: INTWAKE_EN1W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "No interrupt or wake-up will be generated by event channel 1."]
#[inline]
pub fn disabled(self) -> &'a mut W {
self.variant(INTWAKE_EN1W::DISABLED)
}
#[doc = "An event in channel 1 will trigger an (RTC) interrupt and a wake-up request."]
#[inline]
pub fn enabled(self) -> &'a mut W {
self.variant(INTWAKE_EN1W::ENABLED)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 10;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `GPCLEAR_EN1`"]
pub enum GPCLEAR_EN1W {
#[doc = "Channel 1 has no influence on the general purpose registers."]
DISABLED,
#[doc = "A n event in channel 1 will clear the general purpose registers asynchronously."]
ENABLED,
}
impl GPCLEAR_EN1W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
GPCLEAR_EN1W::DISABLED => false,
GPCLEAR_EN1W::ENABLED => true,
}
}
}
#[doc = r" Proxy"]
pub struct _GPCLEAR_EN1W<'a> {
w: &'a mut W,
}
impl<'a> _GPCLEAR_EN1W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: GPCLEAR_EN1W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Channel 1 has no influence on the general purpose registers."]
#[inline]
pub fn disabled(self) -> &'a mut W {
self.variant(GPCLEAR_EN1W::DISABLED)
}
#[doc = "A n event in channel 1 will clear the general purpose registers asynchronously."]
#[inline]
pub fn enabled(self) -> &'a mut W {
self.variant(GPCLEAR_EN1W::ENABLED)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 11;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `POL1`"]
pub enum POL1W {
#[doc = "A channel 1 event is defined as a negative edge on WAKEUP1."]
NEGATIVE,
#[doc = "A channel 1 event is defined as a positive edge on WAKEUP1."]
POSITIVE,
}
impl POL1W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
POL1W::NEGATIVE => false,
POL1W::POSITIVE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _POL1W<'a> {
w: &'a mut W,
}
impl<'a> _POL1W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: POL1W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "A channel 1 event is defined as a negative edge on WAKEUP1."]
#[inline]
pub fn negative(self) -> &'a mut W {
self.variant(POL1W::NEGATIVE)
}
#[doc = "A channel 1 event is defined as a positive edge on WAKEUP1."]
#[inline]
pub fn positive(self) -> &'a mut W {
self.variant(POL1W::POSITIVE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 12;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `EV1_INPUT_EN`"]
pub enum EV1_INPUT_ENW {
#[doc = "Event 1 input is disabled and forced high internally."]
DISABLED,
#[doc = "Event 1 input is enabled."]
ENABLED,
}
impl EV1_INPUT_ENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
EV1_INPUT_ENW::DISABLED => false,
EV1_INPUT_ENW::ENABLED => true,
}
}
}
#[doc = r" Proxy"]
pub struct _EV1_INPUT_ENW<'a> {
w: &'a mut W,
}
impl<'a> _EV1_INPUT_ENW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: EV1_INPUT_ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Event 1 input is disabled and forced high internally."]
#[inline]
pub fn disabled(self) -> &'a mut W {
self.variant(EV1_INPUT_ENW::DISABLED)
}
#[doc = "Event 1 input is enabled."]
#[inline]
pub fn enabled(self) -> &'a mut W {
self.variant(EV1_INPUT_ENW::ENABLED)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 13;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `INTWAKE_EN2`"]
pub enum INTWAKE_EN2W {
#[doc = "No interrupt or wake-up will be generated by event channel 2."]
DISABLED,
#[doc = "An event in channel 2 will trigger an (RTC) interrupt and a wake-up request."]
ENABLED,
}
impl INTWAKE_EN2W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
INTWAKE_EN2W::DISABLED => false,
INTWAKE_EN2W::ENABLED => true,
}
}
}
#[doc = r" Proxy"]
pub struct _INTWAKE_EN2W<'a> {
w: &'a mut W,
}
impl<'a> _INTWAKE_EN2W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: INTWAKE_EN2W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "No interrupt or wake-up will be generated by event channel 2."]
#[inline]
pub fn disabled(self) -> &'a mut W {
self.variant(INTWAKE_EN2W::DISABLED)
}
#[doc = "An event in channel 2 will trigger an (RTC) interrupt and a wake-up request."]
#[inline]
pub fn enabled(self) -> &'a mut W {
self.variant(INTWAKE_EN2W::ENABLED)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 20;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `GPCLEAR_EN2`"]
pub enum GPCLEAR_EN2W {
#[doc = "Channel 2 has no influence on the general purpose registers."]
DISABLED,
#[doc = "An event in channel 2 will clear the general purpose registers asynchronously."]
ENABLED,
}
impl GPCLEAR_EN2W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
GPCLEAR_EN2W::DISABLED => false,
GPCLEAR_EN2W::ENABLED => true,
}
}
}
#[doc = r" Proxy"]
pub struct _GPCLEAR_EN2W<'a> {
w: &'a mut W,
}
impl<'a> _GPCLEAR_EN2W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: GPCLEAR_EN2W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Channel 2 has no influence on the general purpose registers."]
#[inline]
pub fn disabled(self) -> &'a mut W {
self.variant(GPCLEAR_EN2W::DISABLED)
}
#[doc = "An event in channel 2 will clear the general purpose registers asynchronously."]
#[inline]
pub fn enabled(self) -> &'a mut W {
self.variant(GPCLEAR_EN2W::ENABLED)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 21;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `POL2`"]
pub enum POL2W {
#[doc = "A channel 2 event is defined as a negative edge on WAKEUP2."]
NEGATIVE,
#[doc = "A channel 2 event is defined as a positive edge on WAKEUP2."]
POSITIVE,
}
impl POL2W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
POL2W::NEGATIVE => false,
POL2W::POSITIVE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _POL2W<'a> {
w: &'a mut W,
}
impl<'a> _POL2W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: POL2W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "A channel 2 event is defined as a negative edge on WAKEUP2."]
#[inline]
pub fn negative(self) -> &'a mut W {
self.variant(POL2W::NEGATIVE)
}
#[doc = "A channel 2 event is defined as a positive edge on WAKEUP2."]
#[inline]
pub fn positive(self) -> &'a mut W {
self.variant(POL2W::POSITIVE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 22;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `EV2_INPUT_EN`"]
pub enum EV2_INPUT_ENW {
#[doc = "Event 2 input is disabled and forced high internally."]
DISABLED,
#[doc = "Event 2 input is enabled."]
ENABLED,
}
impl EV2_INPUT_ENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
EV2_INPUT_ENW::DISABLED => false,
EV2_INPUT_ENW::ENABLED => true,
}
}
}
#[doc = r" Proxy"]
pub struct _EV2_INPUT_ENW<'a> {
w: &'a mut W,
}
impl<'a> _EV2_INPUT_ENW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: EV2_INPUT_ENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Event 2 input is disabled and forced high internally."]
#[inline]
pub fn disabled(self) -> &'a mut W {
self.variant(EV2_INPUT_ENW::DISABLED)
}
#[doc = "Event 2 input is enabled."]
#[inline]
pub fn enabled(self) -> &'a mut W {
self.variant(EV2_INPUT_ENW::ENABLED)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 23;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `ERMODE`"]
pub enum ERMODEW {
#[doc = "Disable Event Monitor/Recorder clocks. Operation of the Event Monitor/Recorder is disabled except for asynchronous clearing of GP registers if selected."]
DISABLE_EVENT_MONITO,
#[doc = "16 Hz sample clock. Enable Event Monitor/Recorder and select a 16 Hz sample clock for event input edge detection and glitch suppression. Pulses (in either direction) shorter than 62.5 ms to 125 ms will be filtered out."]
_16_HZ_SAMPLE_CLOCK,
#[doc = "64 Hz sample clock. Enable Event Monitor/Recorder and select a 64 Hz sample clock for event input edge detection and glitch suppression. Pulses (in either direction) shorter than 15.6 ms to 31.2 ms will be filtered out."]
_64_HZ_SAMPLE_CLOCK,
#[doc = "1 kHz sample clock. Enable Event Monitor/Recorder and select a 1 kHz sample clock for event input edge detection and glitch suppression. Pulses (in either direction) shorter than 1 ms to 2 ms will be filtered out."]
_1_KHZ_SAMPLE_CLOCK,
}
impl ERMODEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> u8 {
match *self {
ERMODEW::DISABLE_EVENT_MONITO => 0,
ERMODEW::_16_HZ_SAMPLE_CLOCK => 1,
ERMODEW::_64_HZ_SAMPLE_CLOCK => 2,
ERMODEW::_1_KHZ_SAMPLE_CLOCK => 3,
}
}
}
#[doc = r" Proxy"]
pub struct _ERMODEW<'a> {
w: &'a mut W,
}
impl<'a> _ERMODEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: ERMODEW) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "Disable Event Monitor/Recorder clocks. Operation of the Event Monitor/Recorder is disabled except for asynchronous clearing of GP registers if selected."]
#[inline]
pub fn disable_event_monito(self) -> &'a mut W {
self.variant(ERMODEW::DISABLE_EVENT_MONITO)
}
#[doc = "16 Hz sample clock. Enable Event Monitor/Recorder and select a 16 Hz sample clock for event input edge detection and glitch suppression. Pulses (in either direction) shorter than 62.5 ms to 125 ms will be filtered out."]
#[inline]
pub fn _16_hz_sample_clock(self) -> &'a mut W {
self.variant(ERMODEW::_16_HZ_SAMPLE_CLOCK)
}
#[doc = "64 Hz sample clock. Enable Event Monitor/Recorder and select a 64 Hz sample clock for event input edge detection and glitch suppression. Pulses (in either direction) shorter than 15.6 ms to 31.2 ms will be filtered out."]
#[inline]
pub fn _64_hz_sample_clock(self) -> &'a mut W {
self.variant(ERMODEW::_64_HZ_SAMPLE_CLOCK)
}
#[doc = "1 kHz sample clock. Enable Event Monitor/Recorder and select a 1 kHz sample clock for event input edge detection and glitch suppression. Pulses (in either direction) shorter than 1 ms to 2 ms will be filtered out."]
#[inline]
pub fn _1_khz_sample_clock(self) -> &'a mut W {
self.variant(ERMODEW::_1_KHZ_SAMPLE_CLOCK)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 30;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - Interrupt and wake-up enable for channel 0."]
#[inline]
pub fn intwake_en0(&self) -> INTWAKE_EN0R {
INTWAKE_EN0R::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 1 - Enables automatically clearing the RTC general purpose registers when an event occurs on channel 0."]
#[inline]
pub fn gpclear_en0(&self) -> GPCLEAR_EN0R {
GPCLEAR_EN0R::_from({
const MASK: bool = true;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 2 - Selects the polarity of an event on input pin WAKEUP0."]
#[inline]
pub fn pol0(&self) -> POL0R {
POL0R::_from({
const MASK: bool = true;
const OFFSET: u8 = 2;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 3 - Event enable control for channel 0. Event Inputs should remain DISABLED when not being used for event detection, particularly if the associated pin is being used for some other function."]
#[inline]
pub fn ev0_input_en(&self) -> EV0_INPUT_ENR {
EV0_INPUT_ENR::_from({
const MASK: bool = true;
const OFFSET: u8 = 3;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 10 - Interrupt and wake-up enable for channel 1."]
#[inline]
pub fn intwake_en1(&self) -> INTWAKE_EN1R {
INTWAKE_EN1R::_from({
const MASK: bool = true;
const OFFSET: u8 = 10;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 11 - Enables automatically clearing the RTC general purpose registers when an event occurs on channel 1."]
#[inline]
pub fn gpclear_en1(&self) -> GPCLEAR_EN1R {
GPCLEAR_EN1R::_from({
const MASK: bool = true;
const OFFSET: u8 = 11;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 12 - Selects the polarity of an event on input pin WAKEUP1."]
#[inline]
pub fn pol1(&self) -> POL1R {
POL1R::_from({
const MASK: bool = true;
const OFFSET: u8 = 12;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 13 - Event enable control for channel 1. Event Inputs should remain DISABLED when not being used for event detection, particularly if the associated pin is being used for some other function."]
#[inline]
pub fn ev1_input_en(&self) -> EV1_INPUT_ENR {
EV1_INPUT_ENR::_from({
const MASK: bool = true;
const OFFSET: u8 = 13;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 20 - Interrupt and wake-up enable for channel 2."]
#[inline]
pub fn intwake_en2(&self) -> INTWAKE_EN2R {
INTWAKE_EN2R::_from({
const MASK: bool = true;
const OFFSET: u8 = 20;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 21 - Enables automatically clearing the RTC general purpose registers when an event occurs on channel 2."]
#[inline]
pub fn gpclear_en2(&self) -> GPCLEAR_EN2R {
GPCLEAR_EN2R::_from({
const MASK: bool = true;
const OFFSET: u8 = 21;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 22 - Selects the polarity of an event on input pin WAKEUP2."]
#[inline]
pub fn pol2(&self) -> POL2R {
POL2R::_from({
const MASK: bool = true;
const OFFSET: u8 = 22;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 23 - Event enable control for channel 2. Event Inputs should remain DISABLED when not being used for event detection, particularly if the associated pin is being used for some other function."]
#[inline]
pub fn ev2_input_en(&self) -> EV2_INPUT_ENR {
EV2_INPUT_ENR::_from({
const MASK: bool = true;
const OFFSET: u8 = 23;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bits 30:31 - Controls enabling the Event Monitor/Recorder and selecting its operating frequency. Event Monitor/Recorder registers can always be written to regardless of the state of these bits. Events occurring during the 1-sec interval immediately following enabling of the clocks may not be recognized."]
#[inline]
pub fn ermode(&self) -> ERMODER {
ERMODER::_from({
const MASK: u8 = 3;
const OFFSET: u8 = 30;
((self.bits >> OFFSET) & MASK as u32) as u8
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - Interrupt and wake-up enable for channel 0."]
#[inline]
pub fn intwake_en0(&mut self) -> _INTWAKE_EN0W {
_INTWAKE_EN0W { w: self }
}
#[doc = "Bit 1 - Enables automatically clearing the RTC general purpose registers when an event occurs on channel 0."]
#[inline]
pub fn gpclear_en0(&mut self) -> _GPCLEAR_EN0W {
_GPCLEAR_EN0W { w: self }
}
#[doc = "Bit 2 - Selects the polarity of an event on input pin WAKEUP0."]
#[inline]
pub fn pol0(&mut self) -> _POL0W {
_POL0W { w: self }
}
#[doc = "Bit 3 - Event enable control for channel 0. Event Inputs should remain DISABLED when not being used for event detection, particularly if the associated pin is being used for some other function."]
#[inline]
pub fn ev0_input_en(&mut self) -> _EV0_INPUT_ENW {
_EV0_INPUT_ENW { w: self }
}
#[doc = "Bit 10 - Interrupt and wake-up enable for channel 1."]
#[inline]
pub fn intwake_en1(&mut self) -> _INTWAKE_EN1W {
_INTWAKE_EN1W { w: self }
}
#[doc = "Bit 11 - Enables automatically clearing the RTC general purpose registers when an event occurs on channel 1."]
#[inline]
pub fn gpclear_en1(&mut self) -> _GPCLEAR_EN1W {
_GPCLEAR_EN1W { w: self }
}
#[doc = "Bit 12 - Selects the polarity of an event on input pin WAKEUP1."]
#[inline]
pub fn pol1(&mut self) -> _POL1W {
_POL1W { w: self }
}
#[doc = "Bit 13 - Event enable control for channel 1. Event Inputs should remain DISABLED when not being used for event detection, particularly if the associated pin is being used for some other function."]
#[inline]
pub fn ev1_input_en(&mut self) -> _EV1_INPUT_ENW {
_EV1_INPUT_ENW { w: self }
}
#[doc = "Bit 20 - Interrupt and wake-up enable for channel 2."]
#[inline]
pub fn intwake_en2(&mut self) -> _INTWAKE_EN2W {
_INTWAKE_EN2W { w: self }
}
#[doc = "Bit 21 - Enables automatically clearing the RTC general purpose registers when an event occurs on channel 2."]
#[inline]
pub fn gpclear_en2(&mut self) -> _GPCLEAR_EN2W {
_GPCLEAR_EN2W { w: self }
}
#[doc = "Bit 22 - Selects the polarity of an event on input pin WAKEUP2."]
#[inline]
pub fn pol2(&mut self) -> _POL2W {
_POL2W { w: self }
}
#[doc = "Bit 23 - Event enable control for channel 2. Event Inputs should remain DISABLED when not being used for event detection, particularly if the associated pin is being used for some other function."]
#[inline]
pub fn ev2_input_en(&mut self) -> _EV2_INPUT_ENW {
_EV2_INPUT_ENW { w: self }
}
#[doc = "Bits 30:31 - Controls enabling the Event Monitor/Recorder and selecting its operating frequency. Event Monitor/Recorder registers can always be written to regardless of the state of these bits. Events occurring during the 1-sec interval immediately following enabling of the clocks may not be recognized."]
#[inline]
pub fn ermode(&mut self) -> _ERMODEW {
_ERMODEW { w: self }
}
}