lpc43xx/usb1/usbintr_d/
mod.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::USBINTR_D {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct UER {
47    bits: bool,
48}
49impl UER {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bit(&self) -> bool {
53        self.bits
54    }
55    #[doc = r" Returns `true` if the bit is clear (0)"]
56    #[inline]
57    pub fn bit_is_clear(&self) -> bool {
58        !self.bit()
59    }
60    #[doc = r" Returns `true` if the bit is set (1)"]
61    #[inline]
62    pub fn bit_is_set(&self) -> bool {
63        self.bit()
64    }
65}
66#[doc = r" Value of the field"]
67pub struct UEER {
68    bits: bool,
69}
70impl UEER {
71    #[doc = r" Value of the field as raw bits"]
72    #[inline]
73    pub fn bit(&self) -> bool {
74        self.bits
75    }
76    #[doc = r" Returns `true` if the bit is clear (0)"]
77    #[inline]
78    pub fn bit_is_clear(&self) -> bool {
79        !self.bit()
80    }
81    #[doc = r" Returns `true` if the bit is set (1)"]
82    #[inline]
83    pub fn bit_is_set(&self) -> bool {
84        self.bit()
85    }
86}
87#[doc = r" Value of the field"]
88pub struct PCER {
89    bits: bool,
90}
91impl PCER {
92    #[doc = r" Value of the field as raw bits"]
93    #[inline]
94    pub fn bit(&self) -> bool {
95        self.bits
96    }
97    #[doc = r" Returns `true` if the bit is clear (0)"]
98    #[inline]
99    pub fn bit_is_clear(&self) -> bool {
100        !self.bit()
101    }
102    #[doc = r" Returns `true` if the bit is set (1)"]
103    #[inline]
104    pub fn bit_is_set(&self) -> bool {
105        self.bit()
106    }
107}
108#[doc = r" Value of the field"]
109pub struct URER {
110    bits: bool,
111}
112impl URER {
113    #[doc = r" Value of the field as raw bits"]
114    #[inline]
115    pub fn bit(&self) -> bool {
116        self.bits
117    }
118    #[doc = r" Returns `true` if the bit is clear (0)"]
119    #[inline]
120    pub fn bit_is_clear(&self) -> bool {
121        !self.bit()
122    }
123    #[doc = r" Returns `true` if the bit is set (1)"]
124    #[inline]
125    pub fn bit_is_set(&self) -> bool {
126        self.bit()
127    }
128}
129#[doc = r" Value of the field"]
130pub struct SRER {
131    bits: bool,
132}
133impl SRER {
134    #[doc = r" Value of the field as raw bits"]
135    #[inline]
136    pub fn bit(&self) -> bool {
137        self.bits
138    }
139    #[doc = r" Returns `true` if the bit is clear (0)"]
140    #[inline]
141    pub fn bit_is_clear(&self) -> bool {
142        !self.bit()
143    }
144    #[doc = r" Returns `true` if the bit is set (1)"]
145    #[inline]
146    pub fn bit_is_set(&self) -> bool {
147        self.bit()
148    }
149}
150#[doc = r" Value of the field"]
151pub struct SLER {
152    bits: bool,
153}
154impl SLER {
155    #[doc = r" Value of the field as raw bits"]
156    #[inline]
157    pub fn bit(&self) -> bool {
158        self.bits
159    }
160    #[doc = r" Returns `true` if the bit is clear (0)"]
161    #[inline]
162    pub fn bit_is_clear(&self) -> bool {
163        !self.bit()
164    }
165    #[doc = r" Returns `true` if the bit is set (1)"]
166    #[inline]
167    pub fn bit_is_set(&self) -> bool {
168        self.bit()
169    }
170}
171#[doc = r" Value of the field"]
172pub struct NAKER {
173    bits: bool,
174}
175impl NAKER {
176    #[doc = r" Value of the field as raw bits"]
177    #[inline]
178    pub fn bit(&self) -> bool {
179        self.bits
180    }
181    #[doc = r" Returns `true` if the bit is clear (0)"]
182    #[inline]
183    pub fn bit_is_clear(&self) -> bool {
184        !self.bit()
185    }
186    #[doc = r" Returns `true` if the bit is set (1)"]
187    #[inline]
188    pub fn bit_is_set(&self) -> bool {
189        self.bit()
190    }
191}
192#[doc = r" Value of the field"]
193pub struct UAIER {
194    bits: bool,
195}
196impl UAIER {
197    #[doc = r" Value of the field as raw bits"]
198    #[inline]
199    pub fn bit(&self) -> bool {
200        self.bits
201    }
202    #[doc = r" Returns `true` if the bit is clear (0)"]
203    #[inline]
204    pub fn bit_is_clear(&self) -> bool {
205        !self.bit()
206    }
207    #[doc = r" Returns `true` if the bit is set (1)"]
208    #[inline]
209    pub fn bit_is_set(&self) -> bool {
210        self.bit()
211    }
212}
213#[doc = r" Value of the field"]
214pub struct UPIAR {
215    bits: bool,
216}
217impl UPIAR {
218    #[doc = r" Value of the field as raw bits"]
219    #[inline]
220    pub fn bit(&self) -> bool {
221        self.bits
222    }
223    #[doc = r" Returns `true` if the bit is clear (0)"]
224    #[inline]
225    pub fn bit_is_clear(&self) -> bool {
226        !self.bit()
227    }
228    #[doc = r" Returns `true` if the bit is set (1)"]
229    #[inline]
230    pub fn bit_is_set(&self) -> bool {
231        self.bit()
232    }
233}
234#[doc = r" Proxy"]
235pub struct _UEW<'a> {
236    w: &'a mut W,
237}
238impl<'a> _UEW<'a> {
239    #[doc = r" Sets the field bit"]
240    pub fn set_bit(self) -> &'a mut W {
241        self.bit(true)
242    }
243    #[doc = r" Clears the field bit"]
244    pub fn clear_bit(self) -> &'a mut W {
245        self.bit(false)
246    }
247    #[doc = r" Writes raw bits to the field"]
248    #[inline]
249    pub fn bit(self, value: bool) -> &'a mut W {
250        const MASK: bool = true;
251        const OFFSET: u8 = 0;
252        self.w.bits &= !((MASK as u32) << OFFSET);
253        self.w.bits |= ((value & MASK) as u32) << OFFSET;
254        self.w
255    }
256}
257#[doc = r" Proxy"]
258pub struct _UEEW<'a> {
259    w: &'a mut W,
260}
261impl<'a> _UEEW<'a> {
262    #[doc = r" Sets the field bit"]
263    pub fn set_bit(self) -> &'a mut W {
264        self.bit(true)
265    }
266    #[doc = r" Clears the field bit"]
267    pub fn clear_bit(self) -> &'a mut W {
268        self.bit(false)
269    }
270    #[doc = r" Writes raw bits to the field"]
271    #[inline]
272    pub fn bit(self, value: bool) -> &'a mut W {
273        const MASK: bool = true;
274        const OFFSET: u8 = 1;
275        self.w.bits &= !((MASK as u32) << OFFSET);
276        self.w.bits |= ((value & MASK) as u32) << OFFSET;
277        self.w
278    }
279}
280#[doc = r" Proxy"]
281pub struct _PCEW<'a> {
282    w: &'a mut W,
283}
284impl<'a> _PCEW<'a> {
285    #[doc = r" Sets the field bit"]
286    pub fn set_bit(self) -> &'a mut W {
287        self.bit(true)
288    }
289    #[doc = r" Clears the field bit"]
290    pub fn clear_bit(self) -> &'a mut W {
291        self.bit(false)
292    }
293    #[doc = r" Writes raw bits to the field"]
294    #[inline]
295    pub fn bit(self, value: bool) -> &'a mut W {
296        const MASK: bool = true;
297        const OFFSET: u8 = 2;
298        self.w.bits &= !((MASK as u32) << OFFSET);
299        self.w.bits |= ((value & MASK) as u32) << OFFSET;
300        self.w
301    }
302}
303#[doc = r" Proxy"]
304pub struct _UREW<'a> {
305    w: &'a mut W,
306}
307impl<'a> _UREW<'a> {
308    #[doc = r" Sets the field bit"]
309    pub fn set_bit(self) -> &'a mut W {
310        self.bit(true)
311    }
312    #[doc = r" Clears the field bit"]
313    pub fn clear_bit(self) -> &'a mut W {
314        self.bit(false)
315    }
316    #[doc = r" Writes raw bits to the field"]
317    #[inline]
318    pub fn bit(self, value: bool) -> &'a mut W {
319        const MASK: bool = true;
320        const OFFSET: u8 = 6;
321        self.w.bits &= !((MASK as u32) << OFFSET);
322        self.w.bits |= ((value & MASK) as u32) << OFFSET;
323        self.w
324    }
325}
326#[doc = r" Proxy"]
327pub struct _SREW<'a> {
328    w: &'a mut W,
329}
330impl<'a> _SREW<'a> {
331    #[doc = r" Sets the field bit"]
332    pub fn set_bit(self) -> &'a mut W {
333        self.bit(true)
334    }
335    #[doc = r" Clears the field bit"]
336    pub fn clear_bit(self) -> &'a mut W {
337        self.bit(false)
338    }
339    #[doc = r" Writes raw bits to the field"]
340    #[inline]
341    pub fn bit(self, value: bool) -> &'a mut W {
342        const MASK: bool = true;
343        const OFFSET: u8 = 7;
344        self.w.bits &= !((MASK as u32) << OFFSET);
345        self.w.bits |= ((value & MASK) as u32) << OFFSET;
346        self.w
347    }
348}
349#[doc = r" Proxy"]
350pub struct _SLEW<'a> {
351    w: &'a mut W,
352}
353impl<'a> _SLEW<'a> {
354    #[doc = r" Sets the field bit"]
355    pub fn set_bit(self) -> &'a mut W {
356        self.bit(true)
357    }
358    #[doc = r" Clears the field bit"]
359    pub fn clear_bit(self) -> &'a mut W {
360        self.bit(false)
361    }
362    #[doc = r" Writes raw bits to the field"]
363    #[inline]
364    pub fn bit(self, value: bool) -> &'a mut W {
365        const MASK: bool = true;
366        const OFFSET: u8 = 8;
367        self.w.bits &= !((MASK as u32) << OFFSET);
368        self.w.bits |= ((value & MASK) as u32) << OFFSET;
369        self.w
370    }
371}
372#[doc = r" Proxy"]
373pub struct _NAKEW<'a> {
374    w: &'a mut W,
375}
376impl<'a> _NAKEW<'a> {
377    #[doc = r" Sets the field bit"]
378    pub fn set_bit(self) -> &'a mut W {
379        self.bit(true)
380    }
381    #[doc = r" Clears the field bit"]
382    pub fn clear_bit(self) -> &'a mut W {
383        self.bit(false)
384    }
385    #[doc = r" Writes raw bits to the field"]
386    #[inline]
387    pub fn bit(self, value: bool) -> &'a mut W {
388        const MASK: bool = true;
389        const OFFSET: u8 = 16;
390        self.w.bits &= !((MASK as u32) << OFFSET);
391        self.w.bits |= ((value & MASK) as u32) << OFFSET;
392        self.w
393    }
394}
395#[doc = r" Proxy"]
396pub struct _UAIEW<'a> {
397    w: &'a mut W,
398}
399impl<'a> _UAIEW<'a> {
400    #[doc = r" Sets the field bit"]
401    pub fn set_bit(self) -> &'a mut W {
402        self.bit(true)
403    }
404    #[doc = r" Clears the field bit"]
405    pub fn clear_bit(self) -> &'a mut W {
406        self.bit(false)
407    }
408    #[doc = r" Writes raw bits to the field"]
409    #[inline]
410    pub fn bit(self, value: bool) -> &'a mut W {
411        const MASK: bool = true;
412        const OFFSET: u8 = 18;
413        self.w.bits &= !((MASK as u32) << OFFSET);
414        self.w.bits |= ((value & MASK) as u32) << OFFSET;
415        self.w
416    }
417}
418#[doc = r" Proxy"]
419pub struct _UPIAW<'a> {
420    w: &'a mut W,
421}
422impl<'a> _UPIAW<'a> {
423    #[doc = r" Sets the field bit"]
424    pub fn set_bit(self) -> &'a mut W {
425        self.bit(true)
426    }
427    #[doc = r" Clears the field bit"]
428    pub fn clear_bit(self) -> &'a mut W {
429        self.bit(false)
430    }
431    #[doc = r" Writes raw bits to the field"]
432    #[inline]
433    pub fn bit(self, value: bool) -> &'a mut W {
434        const MASK: bool = true;
435        const OFFSET: u8 = 19;
436        self.w.bits &= !((MASK as u32) << OFFSET);
437        self.w.bits |= ((value & MASK) as u32) << OFFSET;
438        self.w
439    }
440}
441impl R {
442    #[doc = r" Value of the register as raw bits"]
443    #[inline]
444    pub fn bits(&self) -> u32 {
445        self.bits
446    }
447    #[doc = "Bit 0 - USB interrupt enable When this bit is one, and the USBINT bit in the USBSTS register is one, the host/device controller will issue an interrupt at the next interrupt threshold. The interrupt is acknowledged by software clearing the USBINT bit in USBSTS."]
448    #[inline]
449    pub fn ue(&self) -> UER {
450        let bits = {
451            const MASK: bool = true;
452            const OFFSET: u8 = 0;
453            ((self.bits >> OFFSET) & MASK as u32) != 0
454        };
455        UER { bits }
456    }
457    #[doc = "Bit 1 - USB error interrupt enable When this bit is a one, and the USBERRINT bit in the USBSTS register is a one, the host/device controller will issue an interrupt at the next interrupt threshold. The interrupt is acknowledged by software clearing the USBERRINT bit in the USBSTS register."]
458    #[inline]
459    pub fn uee(&self) -> UEER {
460        let bits = {
461            const MASK: bool = true;
462            const OFFSET: u8 = 1;
463            ((self.bits >> OFFSET) & MASK as u32) != 0
464        };
465        UEER { bits }
466    }
467    #[doc = "Bit 2 - Port change detect enable When this bit is a one, and the Port Change Detect bit in the USBSTS register is a one, the host/device controller will issue an interrupt. The interrupt is acknowledged by software clearing the Port Change Detect bit in USBSTS."]
468    #[inline]
469    pub fn pce(&self) -> PCER {
470        let bits = {
471            const MASK: bool = true;
472            const OFFSET: u8 = 2;
473            ((self.bits >> OFFSET) & MASK as u32) != 0
474        };
475        PCER { bits }
476    }
477    #[doc = "Bit 6 - USB reset enable When this bit is a one, and the USB Reset Received bit in the USBSTS register is a one, the device controller will issue an interrupt. The interrupt is acknowledged by software clearing the USB Reset Received bit."]
478    #[inline]
479    pub fn ure(&self) -> URER {
480        let bits = {
481            const MASK: bool = true;
482            const OFFSET: u8 = 6;
483            ((self.bits >> OFFSET) & MASK as u32) != 0
484        };
485        URER { bits }
486    }
487    #[doc = "Bit 7 - SOF received enable When this bit is a one, and the SOF Received bit in the USBSTS register is a one, the device controller will issue an interrupt. The interrupt is acknowledged by software clearing the SOF Received bit."]
488    #[inline]
489    pub fn sre(&self) -> SRER {
490        let bits = {
491            const MASK: bool = true;
492            const OFFSET: u8 = 7;
493            ((self.bits >> OFFSET) & MASK as u32) != 0
494        };
495        SRER { bits }
496    }
497    #[doc = "Bit 8 - Sleep enable When this bit is a one, and the DCSuspend bit in the USBSTS register transitions, the device controller will issue an interrupt. The interrupt is acknowledged by software writing a one to the DCSuspend bit."]
498    #[inline]
499    pub fn sle(&self) -> SLER {
500        let bits = {
501            const MASK: bool = true;
502            const OFFSET: u8 = 8;
503            ((self.bits >> OFFSET) & MASK as u32) != 0
504        };
505        SLER { bits }
506    }
507    #[doc = "Bit 16 - NAK interrupt enable This bit is set by software if it wants to enable the hardware interrupt for the NAK Interrupt bit. If both this bit and the corresponding NAK Interrupt bit are set, a hardware interrupt is generated."]
508    #[inline]
509    pub fn nake(&self) -> NAKER {
510        let bits = {
511            const MASK: bool = true;
512            const OFFSET: u8 = 16;
513            ((self.bits >> OFFSET) & MASK as u32) != 0
514        };
515        NAKER { bits }
516    }
517    #[doc = "Bit 18 - Not used by the Device controller."]
518    #[inline]
519    pub fn uaie(&self) -> UAIER {
520        let bits = {
521            const MASK: bool = true;
522            const OFFSET: u8 = 18;
523            ((self.bits >> OFFSET) & MASK as u32) != 0
524        };
525        UAIER { bits }
526    }
527    #[doc = "Bit 19 - Not used by the Device controller."]
528    #[inline]
529    pub fn upia(&self) -> UPIAR {
530        let bits = {
531            const MASK: bool = true;
532            const OFFSET: u8 = 19;
533            ((self.bits >> OFFSET) & MASK as u32) != 0
534        };
535        UPIAR { bits }
536    }
537}
538impl W {
539    #[doc = r" Reset value of the register"]
540    #[inline]
541    pub fn reset_value() -> W {
542        W { bits: 0 }
543    }
544    #[doc = r" Writes raw bits to the register"]
545    #[inline]
546    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
547        self.bits = bits;
548        self
549    }
550    #[doc = "Bit 0 - USB interrupt enable When this bit is one, and the USBINT bit in the USBSTS register is one, the host/device controller will issue an interrupt at the next interrupt threshold. The interrupt is acknowledged by software clearing the USBINT bit in USBSTS."]
551    #[inline]
552    pub fn ue(&mut self) -> _UEW {
553        _UEW { w: self }
554    }
555    #[doc = "Bit 1 - USB error interrupt enable When this bit is a one, and the USBERRINT bit in the USBSTS register is a one, the host/device controller will issue an interrupt at the next interrupt threshold. The interrupt is acknowledged by software clearing the USBERRINT bit in the USBSTS register."]
556    #[inline]
557    pub fn uee(&mut self) -> _UEEW {
558        _UEEW { w: self }
559    }
560    #[doc = "Bit 2 - Port change detect enable When this bit is a one, and the Port Change Detect bit in the USBSTS register is a one, the host/device controller will issue an interrupt. The interrupt is acknowledged by software clearing the Port Change Detect bit in USBSTS."]
561    #[inline]
562    pub fn pce(&mut self) -> _PCEW {
563        _PCEW { w: self }
564    }
565    #[doc = "Bit 6 - USB reset enable When this bit is a one, and the USB Reset Received bit in the USBSTS register is a one, the device controller will issue an interrupt. The interrupt is acknowledged by software clearing the USB Reset Received bit."]
566    #[inline]
567    pub fn ure(&mut self) -> _UREW {
568        _UREW { w: self }
569    }
570    #[doc = "Bit 7 - SOF received enable When this bit is a one, and the SOF Received bit in the USBSTS register is a one, the device controller will issue an interrupt. The interrupt is acknowledged by software clearing the SOF Received bit."]
571    #[inline]
572    pub fn sre(&mut self) -> _SREW {
573        _SREW { w: self }
574    }
575    #[doc = "Bit 8 - Sleep enable When this bit is a one, and the DCSuspend bit in the USBSTS register transitions, the device controller will issue an interrupt. The interrupt is acknowledged by software writing a one to the DCSuspend bit."]
576    #[inline]
577    pub fn sle(&mut self) -> _SLEW {
578        _SLEW { w: self }
579    }
580    #[doc = "Bit 16 - NAK interrupt enable This bit is set by software if it wants to enable the hardware interrupt for the NAK Interrupt bit. If both this bit and the corresponding NAK Interrupt bit are set, a hardware interrupt is generated."]
581    #[inline]
582    pub fn nake(&mut self) -> _NAKEW {
583        _NAKEW { w: self }
584    }
585    #[doc = "Bit 18 - Not used by the Device controller."]
586    #[inline]
587    pub fn uaie(&mut self) -> _UAIEW {
588        _UAIEW { w: self }
589    }
590    #[doc = "Bit 19 - Not used by the Device controller."]
591    #[inline]
592    pub fn upia(&mut self) -> _UPIAW {
593        _UPIAW { w: self }
594    }
595}
lpc43xx/usb1/usbintr_d/mod.rs

lpc43xx/usb1/usbintr_d/
mod.rs
