1#[doc = r" Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - Receiver Buffer Register. Contains the next received character to be read. (DLAB=0)"]
5 pub rbr: RBR,
6 #[doc = "0x04 - Divisor Latch MSB. Most significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider.(DLAB=1)"]
7 pub dlm: DLM,
8 #[doc = "0x08 - Interrupt ID Register. Identifies which interrupt(s) are pending."]
9 pub iir: IIR,
10 #[doc = "0x0c - Line Control Register. Contains controls for frame formatting and break generation."]
11 pub lcr: LCR,
12 #[doc = "0x10 - Modem Control Register. Contains controls for flow control handshaking and loopback mode."]
13 pub mcr: MCR,
14 #[doc = "0x14 - Line Status Register. Contains flags for transmit and receive status, including line errors."]
15 pub lsr: LSR,
16 #[doc = "0x18 - Modem Status Register. Contains handshake signal status flags."]
17 pub msr: MSR,
18 #[doc = "0x1c - Scratch Pad Register. 8-bit temporary storage for software."]
19 pub scr: SCR,
20 #[doc = "0x20 - Auto-baud Control Register. Contains controls for the auto-baud feature."]
21 pub acr: ACR,
22 _reserved0: [u8; 4usize],
23 #[doc = "0x28 - Fractional Divider Register. Generates a clock input for the baud rate divider."]
24 pub fdr: FDR,
25 _reserved1: [u8; 32usize],
26 #[doc = "0x4c - RS-485/EIA-485 Control. Contains controls to configure various aspects of RS-485/EIA-485 modes."]
27 pub rs485ctrl: RS485CTRL,
28 #[doc = "0x50 - RS-485/EIA-485 address match. Contains the address match value for RS-485/EIA-485 mode."]
29 pub rs485adrmatch: RS485ADRMATCH,
30 #[doc = "0x54 - RS-485/EIA-485 direction control delay."]
31 pub rs485dly: RS485DLY,
32 _reserved2: [u8; 4usize],
33 #[doc = "0x5c - Transmit Enable Register. Turns off UART transmitter for use with software flow control."]
34 pub ter: TER,
35}
36#[doc = "Receiver Buffer Register. Contains the next received character to be read. (DLAB=0)"]
37pub struct RBR {
38 register: ::vcell::VolatileCell<u32>,
39}
40#[doc = "Receiver Buffer Register. Contains the next received character to be read. (DLAB=0)"]
41pub mod rbr;
42#[doc = "Transmit Holding Register. The next character to be transmitted is written here. (DLAB=0)"]
43pub struct THR {
44 register: ::vcell::VolatileCell<u32>,
45}
46#[doc = "Transmit Holding Register. The next character to be transmitted is written here. (DLAB=0)"]
47pub mod thr;
48#[doc = "Divisor Latch LSB. Least significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider. (DLAB=1)"]
49pub struct DLL {
50 register: ::vcell::VolatileCell<u32>,
51}
52#[doc = "Divisor Latch LSB. Least significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider. (DLAB=1)"]
53pub mod dll;
54#[doc = "Divisor Latch MSB. Most significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider.(DLAB=1)"]
55pub struct DLM {
56 register: ::vcell::VolatileCell<u32>,
57}
58#[doc = "Divisor Latch MSB. Most significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider.(DLAB=1)"]
59pub mod dlm;
60#[doc = "Interrupt Enable Register. Contains individual interrupt enable bits for the 7 potential UART1 interrupts. (DLAB=0)"]
61pub struct IER {
62 register: ::vcell::VolatileCell<u32>,
63}
64#[doc = "Interrupt Enable Register. Contains individual interrupt enable bits for the 7 potential UART1 interrupts. (DLAB=0)"]
65pub mod ier;
66#[doc = "Interrupt ID Register. Identifies which interrupt(s) are pending."]
67pub struct IIR {
68 register: ::vcell::VolatileCell<u32>,
69}
70#[doc = "Interrupt ID Register. Identifies which interrupt(s) are pending."]
71pub mod iir;
72#[doc = "FIFO Control Register. Controls UART1 FIFO usage and modes."]
73pub struct FCR {
74 register: ::vcell::VolatileCell<u32>,
75}
76#[doc = "FIFO Control Register. Controls UART1 FIFO usage and modes."]
77pub mod fcr;
78#[doc = "Line Control Register. Contains controls for frame formatting and break generation."]
79pub struct LCR {
80 register: ::vcell::VolatileCell<u32>,
81}
82#[doc = "Line Control Register. Contains controls for frame formatting and break generation."]
83pub mod lcr;
84#[doc = "Modem Control Register. Contains controls for flow control handshaking and loopback mode."]
85pub struct MCR {
86 register: ::vcell::VolatileCell<u32>,
87}
88#[doc = "Modem Control Register. Contains controls for flow control handshaking and loopback mode."]
89pub mod mcr;
90#[doc = "Line Status Register. Contains flags for transmit and receive status, including line errors."]
91pub struct LSR {
92 register: ::vcell::VolatileCell<u32>,
93}
94#[doc = "Line Status Register. Contains flags for transmit and receive status, including line errors."]
95pub mod lsr;
96#[doc = "Modem Status Register. Contains handshake signal status flags."]
97pub struct MSR {
98 register: ::vcell::VolatileCell<u32>,
99}
100#[doc = "Modem Status Register. Contains handshake signal status flags."]
101pub mod msr;
102#[doc = "Scratch Pad Register. 8-bit temporary storage for software."]
103pub struct SCR {
104 register: ::vcell::VolatileCell<u32>,
105}
106#[doc = "Scratch Pad Register. 8-bit temporary storage for software."]
107pub mod scr;
108#[doc = "Auto-baud Control Register. Contains controls for the auto-baud feature."]
109pub struct ACR {
110 register: ::vcell::VolatileCell<u32>,
111}
112#[doc = "Auto-baud Control Register. Contains controls for the auto-baud feature."]
113pub mod acr;
114#[doc = "Fractional Divider Register. Generates a clock input for the baud rate divider."]
115pub struct FDR {
116 register: ::vcell::VolatileCell<u32>,
117}
118#[doc = "Fractional Divider Register. Generates a clock input for the baud rate divider."]
119pub mod fdr;
120#[doc = "RS-485/EIA-485 Control. Contains controls to configure various aspects of RS-485/EIA-485 modes."]
121pub struct RS485CTRL {
122 register: ::vcell::VolatileCell<u32>,
123}
124#[doc = "RS-485/EIA-485 Control. Contains controls to configure various aspects of RS-485/EIA-485 modes."]
125pub mod rs485ctrl;
126#[doc = "RS-485/EIA-485 address match. Contains the address match value for RS-485/EIA-485 mode."]
127pub struct RS485ADRMATCH {
128 register: ::vcell::VolatileCell<u32>,
129}
130#[doc = "RS-485/EIA-485 address match. Contains the address match value for RS-485/EIA-485 mode."]
131pub mod rs485adrmatch;
132#[doc = "RS-485/EIA-485 direction control delay."]
133pub struct RS485DLY {
134 register: ::vcell::VolatileCell<u32>,
135}
136#[doc = "RS-485/EIA-485 direction control delay."]
137pub mod rs485dly;
138#[doc = "Transmit Enable Register. Turns off UART transmitter for use with software flow control."]
139pub struct TER {
140 register: ::vcell::VolatileCell<u32>,
141}
142#[doc = "Transmit Enable Register. Turns off UART transmitter for use with software flow control."]
143pub mod ter;