lpc11xx/uart/
rs485ctrl.rs

1#[doc = "Reader of register RS485CTRL"]
2pub type R = crate::R<u32, super::RS485CTRL>;
3#[doc = "Writer for register RS485CTRL"]
4pub type W = crate::W<u32, super::RS485CTRL>;
5#[doc = "Register RS485CTRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::RS485CTRL {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "NMM enable.\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum NMMEN_A {
16    #[doc = "0: RS-485/EIA-485 Normal Multidrop Mode (NMM) is disabled"]
17    DISABLED,
18    #[doc = "1: RS-485/EIA-485 Normal Multidrop Mode (NMM) is enabled. In this mode, an address is detected when a received byte causes the UART to set the parity error and generate an interrupt"]
19    ENABLED,
20}
21impl From<NMMEN_A> for bool {
22    #[inline(always)]
23    fn from(variant: NMMEN_A) -> Self {
24        match variant {
25            NMMEN_A::DISABLED => false,
26            NMMEN_A::ENABLED => true,
27        }
28    }
29}
30#[doc = "Reader of field `NMMEN`"]
31pub type NMMEN_R = crate::R<bool, NMMEN_A>;
32impl NMMEN_R {
33    #[doc = r"Get enumerated values variant"]
34    #[inline(always)]
35    pub fn variant(&self) -> NMMEN_A {
36        match self.bits {
37            false => NMMEN_A::DISABLED,
38            true => NMMEN_A::ENABLED,
39        }
40    }
41    #[doc = "Checks if the value of the field is `DISABLED`"]
42    #[inline(always)]
43    pub fn is_disabled(&self) -> bool {
44        *self == NMMEN_A::DISABLED
45    }
46    #[doc = "Checks if the value of the field is `ENABLED`"]
47    #[inline(always)]
48    pub fn is_enabled(&self) -> bool {
49        *self == NMMEN_A::ENABLED
50    }
51}
52#[doc = "Write proxy for field `NMMEN`"]
53pub struct NMMEN_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> NMMEN_W<'a> {
57    #[doc = r"Writes `variant` to the field"]
58    #[inline(always)]
59    pub fn variant(self, variant: NMMEN_A) -> &'a mut W {
60        {
61            self.bit(variant.into())
62        }
63    }
64    #[doc = "RS-485/EIA-485 Normal Multidrop Mode (NMM) is disabled"]
65    #[inline(always)]
66    pub fn disabled(self) -> &'a mut W {
67        self.variant(NMMEN_A::DISABLED)
68    }
69    #[doc = "RS-485/EIA-485 Normal Multidrop Mode (NMM) is enabled. In this mode, an address is detected when a received byte causes the UART to set the parity error and generate an interrupt"]
70    #[inline(always)]
71    pub fn enabled(self) -> &'a mut W {
72        self.variant(NMMEN_A::ENABLED)
73    }
74    #[doc = r"Sets the field bit"]
75    #[inline(always)]
76    pub fn set_bit(self) -> &'a mut W {
77        self.bit(true)
78    }
79    #[doc = r"Clears the field bit"]
80    #[inline(always)]
81    pub fn clear_bit(self) -> &'a mut W {
82        self.bit(false)
83    }
84    #[doc = r"Writes raw bits to the field"]
85    #[inline(always)]
86    pub fn bit(self, value: bool) -> &'a mut W {
87        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
88        self.w
89    }
90}
91#[doc = "Receiver enable.\n\nValue on reset: 0"]
92#[derive(Clone, Copy, Debug, PartialEq)]
93pub enum RXDIS_A {
94    #[doc = "0: The receiver is enabled"]
95    ENABLED,
96    #[doc = "1: The receiver is disabled"]
97    DISABLED,
98}
99impl From<RXDIS_A> for bool {
100    #[inline(always)]
101    fn from(variant: RXDIS_A) -> Self {
102        match variant {
103            RXDIS_A::ENABLED => false,
104            RXDIS_A::DISABLED => true,
105        }
106    }
107}
108#[doc = "Reader of field `RXDIS`"]
109pub type RXDIS_R = crate::R<bool, RXDIS_A>;
110impl RXDIS_R {
111    #[doc = r"Get enumerated values variant"]
112    #[inline(always)]
113    pub fn variant(&self) -> RXDIS_A {
114        match self.bits {
115            false => RXDIS_A::ENABLED,
116            true => RXDIS_A::DISABLED,
117        }
118    }
119    #[doc = "Checks if the value of the field is `ENABLED`"]
120    #[inline(always)]
121    pub fn is_enabled(&self) -> bool {
122        *self == RXDIS_A::ENABLED
123    }
124    #[doc = "Checks if the value of the field is `DISABLED`"]
125    #[inline(always)]
126    pub fn is_disabled(&self) -> bool {
127        *self == RXDIS_A::DISABLED
128    }
129}
130#[doc = "Write proxy for field `RXDIS`"]
131pub struct RXDIS_W<'a> {
132    w: &'a mut W,
133}
134impl<'a> RXDIS_W<'a> {
135    #[doc = r"Writes `variant` to the field"]
136    #[inline(always)]
137    pub fn variant(self, variant: RXDIS_A) -> &'a mut W {
138        {
139            self.bit(variant.into())
140        }
141    }
142    #[doc = "The receiver is enabled"]
143    #[inline(always)]
144    pub fn enabled(self) -> &'a mut W {
145        self.variant(RXDIS_A::ENABLED)
146    }
147    #[doc = "The receiver is disabled"]
148    #[inline(always)]
149    pub fn disabled(self) -> &'a mut W {
150        self.variant(RXDIS_A::DISABLED)
151    }
152    #[doc = r"Sets the field bit"]
153    #[inline(always)]
154    pub fn set_bit(self) -> &'a mut W {
155        self.bit(true)
156    }
157    #[doc = r"Clears the field bit"]
158    #[inline(always)]
159    pub fn clear_bit(self) -> &'a mut W {
160        self.bit(false)
161    }
162    #[doc = r"Writes raw bits to the field"]
163    #[inline(always)]
164    pub fn bit(self, value: bool) -> &'a mut W {
165        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
166        self.w
167    }
168}
169#[doc = "AAD enable.\n\nValue on reset: 0"]
170#[derive(Clone, Copy, Debug, PartialEq)]
171pub enum AADEN_A {
172    #[doc = "0: Auto Address Detect (AAD) is disabled"]
173    DISABLED,
174    #[doc = "1: Auto Address Detect (AAD) is enabled"]
175    ENABLED,
176}
177impl From<AADEN_A> for bool {
178    #[inline(always)]
179    fn from(variant: AADEN_A) -> Self {
180        match variant {
181            AADEN_A::DISABLED => false,
182            AADEN_A::ENABLED => true,
183        }
184    }
185}
186#[doc = "Reader of field `AADEN`"]
187pub type AADEN_R = crate::R<bool, AADEN_A>;
188impl AADEN_R {
189    #[doc = r"Get enumerated values variant"]
190    #[inline(always)]
191    pub fn variant(&self) -> AADEN_A {
192        match self.bits {
193            false => AADEN_A::DISABLED,
194            true => AADEN_A::ENABLED,
195        }
196    }
197    #[doc = "Checks if the value of the field is `DISABLED`"]
198    #[inline(always)]
199    pub fn is_disabled(&self) -> bool {
200        *self == AADEN_A::DISABLED
201    }
202    #[doc = "Checks if the value of the field is `ENABLED`"]
203    #[inline(always)]
204    pub fn is_enabled(&self) -> bool {
205        *self == AADEN_A::ENABLED
206    }
207}
208#[doc = "Write proxy for field `AADEN`"]
209pub struct AADEN_W<'a> {
210    w: &'a mut W,
211}
212impl<'a> AADEN_W<'a> {
213    #[doc = r"Writes `variant` to the field"]
214    #[inline(always)]
215    pub fn variant(self, variant: AADEN_A) -> &'a mut W {
216        {
217            self.bit(variant.into())
218        }
219    }
220    #[doc = "Auto Address Detect (AAD) is disabled"]
221    #[inline(always)]
222    pub fn disabled(self) -> &'a mut W {
223        self.variant(AADEN_A::DISABLED)
224    }
225    #[doc = "Auto Address Detect (AAD) is enabled"]
226    #[inline(always)]
227    pub fn enabled(self) -> &'a mut W {
228        self.variant(AADEN_A::ENABLED)
229    }
230    #[doc = r"Sets the field bit"]
231    #[inline(always)]
232    pub fn set_bit(self) -> &'a mut W {
233        self.bit(true)
234    }
235    #[doc = r"Clears the field bit"]
236    #[inline(always)]
237    pub fn clear_bit(self) -> &'a mut W {
238        self.bit(false)
239    }
240    #[doc = r"Writes raw bits to the field"]
241    #[inline(always)]
242    pub fn bit(self, value: bool) -> &'a mut W {
243        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
244        self.w
245    }
246}
247#[doc = "Select direction control pin.\n\nValue on reset: 0"]
248#[derive(Clone, Copy, Debug, PartialEq)]
249pub enum SEL_A {
250    #[doc = "0: If direction control is enabled (bit DCTRL = 1), pin RTS is used for direction control"]
251    RTS,
252    #[doc = "1: If direction control is enabled (bit DCTRL = 1), pin DTR is used for direction control"]
253    DTR,
254}
255impl From<SEL_A> for bool {
256    #[inline(always)]
257    fn from(variant: SEL_A) -> Self {
258        match variant {
259            SEL_A::RTS => false,
260            SEL_A::DTR => true,
261        }
262    }
263}
264#[doc = "Reader of field `SEL`"]
265pub type SEL_R = crate::R<bool, SEL_A>;
266impl SEL_R {
267    #[doc = r"Get enumerated values variant"]
268    #[inline(always)]
269    pub fn variant(&self) -> SEL_A {
270        match self.bits {
271            false => SEL_A::RTS,
272            true => SEL_A::DTR,
273        }
274    }
275    #[doc = "Checks if the value of the field is `RTS`"]
276    #[inline(always)]
277    pub fn is_rts(&self) -> bool {
278        *self == SEL_A::RTS
279    }
280    #[doc = "Checks if the value of the field is `DTR`"]
281    #[inline(always)]
282    pub fn is_dtr(&self) -> bool {
283        *self == SEL_A::DTR
284    }
285}
286#[doc = "Write proxy for field `SEL`"]
287pub struct SEL_W<'a> {
288    w: &'a mut W,
289}
290impl<'a> SEL_W<'a> {
291    #[doc = r"Writes `variant` to the field"]
292    #[inline(always)]
293    pub fn variant(self, variant: SEL_A) -> &'a mut W {
294        {
295            self.bit(variant.into())
296        }
297    }
298    #[doc = "If direction control is enabled (bit DCTRL = 1), pin RTS is used for direction control"]
299    #[inline(always)]
300    pub fn rts(self) -> &'a mut W {
301        self.variant(SEL_A::RTS)
302    }
303    #[doc = "If direction control is enabled (bit DCTRL = 1), pin DTR is used for direction control"]
304    #[inline(always)]
305    pub fn dtr(self) -> &'a mut W {
306        self.variant(SEL_A::DTR)
307    }
308    #[doc = r"Sets the field bit"]
309    #[inline(always)]
310    pub fn set_bit(self) -> &'a mut W {
311        self.bit(true)
312    }
313    #[doc = r"Clears the field bit"]
314    #[inline(always)]
315    pub fn clear_bit(self) -> &'a mut W {
316        self.bit(false)
317    }
318    #[doc = r"Writes raw bits to the field"]
319    #[inline(always)]
320    pub fn bit(self, value: bool) -> &'a mut W {
321        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
322        self.w
323    }
324}
325#[doc = "Auto direction control enable.\n\nValue on reset: 0"]
326#[derive(Clone, Copy, Debug, PartialEq)]
327pub enum DCTRL_A {
328    #[doc = "0: Disable Auto Direction Control"]
329    DISABLE_AUTO_DIRECTI,
330    #[doc = "1: Enable Auto Direction Control"]
331    ENABLE_AUTO_DIRECTIO,
332}
333impl From<DCTRL_A> for bool {
334    #[inline(always)]
335    fn from(variant: DCTRL_A) -> Self {
336        match variant {
337            DCTRL_A::DISABLE_AUTO_DIRECTI => false,
338            DCTRL_A::ENABLE_AUTO_DIRECTIO => true,
339        }
340    }
341}
342#[doc = "Reader of field `DCTRL`"]
343pub type DCTRL_R = crate::R<bool, DCTRL_A>;
344impl DCTRL_R {
345    #[doc = r"Get enumerated values variant"]
346    #[inline(always)]
347    pub fn variant(&self) -> DCTRL_A {
348        match self.bits {
349            false => DCTRL_A::DISABLE_AUTO_DIRECTI,
350            true => DCTRL_A::ENABLE_AUTO_DIRECTIO,
351        }
352    }
353    #[doc = "Checks if the value of the field is `DISABLE_AUTO_DIRECTI`"]
354    #[inline(always)]
355    pub fn is_disable_auto_directi(&self) -> bool {
356        *self == DCTRL_A::DISABLE_AUTO_DIRECTI
357    }
358    #[doc = "Checks if the value of the field is `ENABLE_AUTO_DIRECTIO`"]
359    #[inline(always)]
360    pub fn is_enable_auto_directio(&self) -> bool {
361        *self == DCTRL_A::ENABLE_AUTO_DIRECTIO
362    }
363}
364#[doc = "Write proxy for field `DCTRL`"]
365pub struct DCTRL_W<'a> {
366    w: &'a mut W,
367}
368impl<'a> DCTRL_W<'a> {
369    #[doc = r"Writes `variant` to the field"]
370    #[inline(always)]
371    pub fn variant(self, variant: DCTRL_A) -> &'a mut W {
372        {
373            self.bit(variant.into())
374        }
375    }
376    #[doc = "Disable Auto Direction Control"]
377    #[inline(always)]
378    pub fn disable_auto_directi(self) -> &'a mut W {
379        self.variant(DCTRL_A::DISABLE_AUTO_DIRECTI)
380    }
381    #[doc = "Enable Auto Direction Control"]
382    #[inline(always)]
383    pub fn enable_auto_directio(self) -> &'a mut W {
384        self.variant(DCTRL_A::ENABLE_AUTO_DIRECTIO)
385    }
386    #[doc = r"Sets the field bit"]
387    #[inline(always)]
388    pub fn set_bit(self) -> &'a mut W {
389        self.bit(true)
390    }
391    #[doc = r"Clears the field bit"]
392    #[inline(always)]
393    pub fn clear_bit(self) -> &'a mut W {
394        self.bit(false)
395    }
396    #[doc = r"Writes raw bits to the field"]
397    #[inline(always)]
398    pub fn bit(self, value: bool) -> &'a mut W {
399        self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
400        self.w
401    }
402}
403#[doc = "Polarity control. This bit reverses the polarity of the direction control signal on the RTS (or DTR) pin.\n\nValue on reset: 0"]
404#[derive(Clone, Copy, Debug, PartialEq)]
405pub enum OINV_A {
406    #[doc = "0: The direction control pin will be driven to logic 0 when the transmitter has data to be sent. It will be driven to logic 1 after the last bit of data has been transmitted"]
407    LOW,
408    #[doc = "1: The direction control pin will be driven to logic 1 when the transmitter has data to be sent. It will be driven to logic 0 after the last bit of data has been transmitted"]
409    HIGH,
410}
411impl From<OINV_A> for bool {
412    #[inline(always)]
413    fn from(variant: OINV_A) -> Self {
414        match variant {
415            OINV_A::LOW => false,
416            OINV_A::HIGH => true,
417        }
418    }
419}
420#[doc = "Reader of field `OINV`"]
421pub type OINV_R = crate::R<bool, OINV_A>;
422impl OINV_R {
423    #[doc = r"Get enumerated values variant"]
424    #[inline(always)]
425    pub fn variant(&self) -> OINV_A {
426        match self.bits {
427            false => OINV_A::LOW,
428            true => OINV_A::HIGH,
429        }
430    }
431    #[doc = "Checks if the value of the field is `LOW`"]
432    #[inline(always)]
433    pub fn is_low(&self) -> bool {
434        *self == OINV_A::LOW
435    }
436    #[doc = "Checks if the value of the field is `HIGH`"]
437    #[inline(always)]
438    pub fn is_high(&self) -> bool {
439        *self == OINV_A::HIGH
440    }
441}
442#[doc = "Write proxy for field `OINV`"]
443pub struct OINV_W<'a> {
444    w: &'a mut W,
445}
446impl<'a> OINV_W<'a> {
447    #[doc = r"Writes `variant` to the field"]
448    #[inline(always)]
449    pub fn variant(self, variant: OINV_A) -> &'a mut W {
450        {
451            self.bit(variant.into())
452        }
453    }
454    #[doc = "The direction control pin will be driven to logic 0 when the transmitter has data to be sent. It will be driven to logic 1 after the last bit of data has been transmitted"]
455    #[inline(always)]
456    pub fn low(self) -> &'a mut W {
457        self.variant(OINV_A::LOW)
458    }
459    #[doc = "The direction control pin will be driven to logic 1 when the transmitter has data to be sent. It will be driven to logic 0 after the last bit of data has been transmitted"]
460    #[inline(always)]
461    pub fn high(self) -> &'a mut W {
462        self.variant(OINV_A::HIGH)
463    }
464    #[doc = r"Sets the field bit"]
465    #[inline(always)]
466    pub fn set_bit(self) -> &'a mut W {
467        self.bit(true)
468    }
469    #[doc = r"Clears the field bit"]
470    #[inline(always)]
471    pub fn clear_bit(self) -> &'a mut W {
472        self.bit(false)
473    }
474    #[doc = r"Writes raw bits to the field"]
475    #[inline(always)]
476    pub fn bit(self, value: bool) -> &'a mut W {
477        self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
478        self.w
479    }
480}
481impl R {
482    #[doc = "Bit 0 - NMM enable."]
483    #[inline(always)]
484    pub fn nmmen(&self) -> NMMEN_R {
485        NMMEN_R::new((self.bits & 0x01) != 0)
486    }
487    #[doc = "Bit 1 - Receiver enable."]
488    #[inline(always)]
489    pub fn rxdis(&self) -> RXDIS_R {
490        RXDIS_R::new(((self.bits >> 1) & 0x01) != 0)
491    }
492    #[doc = "Bit 2 - AAD enable."]
493    #[inline(always)]
494    pub fn aaden(&self) -> AADEN_R {
495        AADEN_R::new(((self.bits >> 2) & 0x01) != 0)
496    }
497    #[doc = "Bit 3 - Select direction control pin."]
498    #[inline(always)]
499    pub fn sel(&self) -> SEL_R {
500        SEL_R::new(((self.bits >> 3) & 0x01) != 0)
501    }
502    #[doc = "Bit 4 - Auto direction control enable."]
503    #[inline(always)]
504    pub fn dctrl(&self) -> DCTRL_R {
505        DCTRL_R::new(((self.bits >> 4) & 0x01) != 0)
506    }
507    #[doc = "Bit 5 - Polarity control. This bit reverses the polarity of the direction control signal on the RTS (or DTR) pin."]
508    #[inline(always)]
509    pub fn oinv(&self) -> OINV_R {
510        OINV_R::new(((self.bits >> 5) & 0x01) != 0)
511    }
512}
513impl W {
514    #[doc = "Bit 0 - NMM enable."]
515    #[inline(always)]
516    pub fn nmmen(&mut self) -> NMMEN_W {
517        NMMEN_W { w: self }
518    }
519    #[doc = "Bit 1 - Receiver enable."]
520    #[inline(always)]
521    pub fn rxdis(&mut self) -> RXDIS_W {
522        RXDIS_W { w: self }
523    }
524    #[doc = "Bit 2 - AAD enable."]
525    #[inline(always)]
526    pub fn aaden(&mut self) -> AADEN_W {
527        AADEN_W { w: self }
528    }
529    #[doc = "Bit 3 - Select direction control pin."]
530    #[inline(always)]
531    pub fn sel(&mut self) -> SEL_W {
532        SEL_W { w: self }
533    }
534    #[doc = "Bit 4 - Auto direction control enable."]
535    #[inline(always)]
536    pub fn dctrl(&mut self) -> DCTRL_W {
537        DCTRL_W { w: self }
538    }
539    #[doc = "Bit 5 - Polarity control. This bit reverses the polarity of the direction control signal on the RTS (or DTR) pin."]
540    #[inline(always)]
541    pub fn oinv(&mut self) -> OINV_W {
542        OINV_W { w: self }
543    }
544}
lpc11xx/uart/rs485ctrl.rs

lpc11xx/uart/
rs485ctrl.rs
