1#[doc = "Reader of register PWMC"]
2pub type R = crate::R<u32, super::PWMC>;
3#[doc = "Writer for register PWMC"]
4pub type W = crate::W<u32, super::PWMC>;
5#[doc = "Register PWMC `reset()`'s with value 0"]
6impl crate::ResetValue for super::PWMC {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "PWM channel 0 enable.\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum PWMEN0_A {
16 #[doc = "0: CT32Bn_MAT0 is controlled by EM0"]
17 CT32BN_MAT0_IS_CONTR,
18 #[doc = "1: PWM mode is enabled for CT32Bn_MAT0"]
19 PWM_MODE_IS_ENABLED_,
20}
21impl From<PWMEN0_A> for bool {
22 #[inline(always)]
23 fn from(variant: PWMEN0_A) -> Self {
24 match variant {
25 PWMEN0_A::CT32BN_MAT0_IS_CONTR => false,
26 PWMEN0_A::PWM_MODE_IS_ENABLED_ => true,
27 }
28 }
29}
30#[doc = "Reader of field `PWMEN0`"]
31pub type PWMEN0_R = crate::R<bool, PWMEN0_A>;
32impl PWMEN0_R {
33 #[doc = r"Get enumerated values variant"]
34 #[inline(always)]
35 pub fn variant(&self) -> PWMEN0_A {
36 match self.bits {
37 false => PWMEN0_A::CT32BN_MAT0_IS_CONTR,
38 true => PWMEN0_A::PWM_MODE_IS_ENABLED_,
39 }
40 }
41 #[doc = "Checks if the value of the field is `CT32BN_MAT0_IS_CONTR`"]
42 #[inline(always)]
43 pub fn is_ct32bn_mat0_is_contr(&self) -> bool {
44 *self == PWMEN0_A::CT32BN_MAT0_IS_CONTR
45 }
46 #[doc = "Checks if the value of the field is `PWM_MODE_IS_ENABLED_`"]
47 #[inline(always)]
48 pub fn is_pwm_mode_is_enabled_(&self) -> bool {
49 *self == PWMEN0_A::PWM_MODE_IS_ENABLED_
50 }
51}
52#[doc = "Write proxy for field `PWMEN0`"]
53pub struct PWMEN0_W<'a> {
54 w: &'a mut W,
55}
56impl<'a> PWMEN0_W<'a> {
57 #[doc = r"Writes `variant` to the field"]
58 #[inline(always)]
59 pub fn variant(self, variant: PWMEN0_A) -> &'a mut W {
60 {
61 self.bit(variant.into())
62 }
63 }
64 #[doc = "CT32Bn_MAT0 is controlled by EM0"]
65 #[inline(always)]
66 pub fn ct32bn_mat0_is_contr(self) -> &'a mut W {
67 self.variant(PWMEN0_A::CT32BN_MAT0_IS_CONTR)
68 }
69 #[doc = "PWM mode is enabled for CT32Bn_MAT0"]
70 #[inline(always)]
71 pub fn pwm_mode_is_enabled_(self) -> &'a mut W {
72 self.variant(PWMEN0_A::PWM_MODE_IS_ENABLED_)
73 }
74 #[doc = r"Sets the field bit"]
75 #[inline(always)]
76 pub fn set_bit(self) -> &'a mut W {
77 self.bit(true)
78 }
79 #[doc = r"Clears the field bit"]
80 #[inline(always)]
81 pub fn clear_bit(self) -> &'a mut W {
82 self.bit(false)
83 }
84 #[doc = r"Writes raw bits to the field"]
85 #[inline(always)]
86 pub fn bit(self, value: bool) -> &'a mut W {
87 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
88 self.w
89 }
90}
91#[doc = "PWM channel 1 enable.\n\nValue on reset: 0"]
92#[derive(Clone, Copy, Debug, PartialEq)]
93pub enum PWMEN1_A {
94 #[doc = "0: CT32Bn_MAT1 is controlled by EM1"]
95 CT32BN_MAT1_IS_CONTR,
96 #[doc = "1: PWM mode is enabled for CT32Bn_MAT1"]
97 PWM_MODE_IS_ENABLED_,
98}
99impl From<PWMEN1_A> for bool {
100 #[inline(always)]
101 fn from(variant: PWMEN1_A) -> Self {
102 match variant {
103 PWMEN1_A::CT32BN_MAT1_IS_CONTR => false,
104 PWMEN1_A::PWM_MODE_IS_ENABLED_ => true,
105 }
106 }
107}
108#[doc = "Reader of field `PWMEN1`"]
109pub type PWMEN1_R = crate::R<bool, PWMEN1_A>;
110impl PWMEN1_R {
111 #[doc = r"Get enumerated values variant"]
112 #[inline(always)]
113 pub fn variant(&self) -> PWMEN1_A {
114 match self.bits {
115 false => PWMEN1_A::CT32BN_MAT1_IS_CONTR,
116 true => PWMEN1_A::PWM_MODE_IS_ENABLED_,
117 }
118 }
119 #[doc = "Checks if the value of the field is `CT32BN_MAT1_IS_CONTR`"]
120 #[inline(always)]
121 pub fn is_ct32bn_mat1_is_contr(&self) -> bool {
122 *self == PWMEN1_A::CT32BN_MAT1_IS_CONTR
123 }
124 #[doc = "Checks if the value of the field is `PWM_MODE_IS_ENABLED_`"]
125 #[inline(always)]
126 pub fn is_pwm_mode_is_enabled_(&self) -> bool {
127 *self == PWMEN1_A::PWM_MODE_IS_ENABLED_
128 }
129}
130#[doc = "Write proxy for field `PWMEN1`"]
131pub struct PWMEN1_W<'a> {
132 w: &'a mut W,
133}
134impl<'a> PWMEN1_W<'a> {
135 #[doc = r"Writes `variant` to the field"]
136 #[inline(always)]
137 pub fn variant(self, variant: PWMEN1_A) -> &'a mut W {
138 {
139 self.bit(variant.into())
140 }
141 }
142 #[doc = "CT32Bn_MAT1 is controlled by EM1"]
143 #[inline(always)]
144 pub fn ct32bn_mat1_is_contr(self) -> &'a mut W {
145 self.variant(PWMEN1_A::CT32BN_MAT1_IS_CONTR)
146 }
147 #[doc = "PWM mode is enabled for CT32Bn_MAT1"]
148 #[inline(always)]
149 pub fn pwm_mode_is_enabled_(self) -> &'a mut W {
150 self.variant(PWMEN1_A::PWM_MODE_IS_ENABLED_)
151 }
152 #[doc = r"Sets the field bit"]
153 #[inline(always)]
154 pub fn set_bit(self) -> &'a mut W {
155 self.bit(true)
156 }
157 #[doc = r"Clears the field bit"]
158 #[inline(always)]
159 pub fn clear_bit(self) -> &'a mut W {
160 self.bit(false)
161 }
162 #[doc = r"Writes raw bits to the field"]
163 #[inline(always)]
164 pub fn bit(self, value: bool) -> &'a mut W {
165 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
166 self.w
167 }
168}
169#[doc = "PWM channel 2 enable.\n\nValue on reset: 0"]
170#[derive(Clone, Copy, Debug, PartialEq)]
171pub enum PWMEN2_A {
172 #[doc = "0: CT32Bn_MAT2 is controlled by EM2"]
173 CT32BN_MAT2_IS_CONTR,
174 #[doc = "1: PWM mode is enabled for CT32Bn_MAT2"]
175 PWM_MODE_IS_ENABLED_,
176}
177impl From<PWMEN2_A> for bool {
178 #[inline(always)]
179 fn from(variant: PWMEN2_A) -> Self {
180 match variant {
181 PWMEN2_A::CT32BN_MAT2_IS_CONTR => false,
182 PWMEN2_A::PWM_MODE_IS_ENABLED_ => true,
183 }
184 }
185}
186#[doc = "Reader of field `PWMEN2`"]
187pub type PWMEN2_R = crate::R<bool, PWMEN2_A>;
188impl PWMEN2_R {
189 #[doc = r"Get enumerated values variant"]
190 #[inline(always)]
191 pub fn variant(&self) -> PWMEN2_A {
192 match self.bits {
193 false => PWMEN2_A::CT32BN_MAT2_IS_CONTR,
194 true => PWMEN2_A::PWM_MODE_IS_ENABLED_,
195 }
196 }
197 #[doc = "Checks if the value of the field is `CT32BN_MAT2_IS_CONTR`"]
198 #[inline(always)]
199 pub fn is_ct32bn_mat2_is_contr(&self) -> bool {
200 *self == PWMEN2_A::CT32BN_MAT2_IS_CONTR
201 }
202 #[doc = "Checks if the value of the field is `PWM_MODE_IS_ENABLED_`"]
203 #[inline(always)]
204 pub fn is_pwm_mode_is_enabled_(&self) -> bool {
205 *self == PWMEN2_A::PWM_MODE_IS_ENABLED_
206 }
207}
208#[doc = "Write proxy for field `PWMEN2`"]
209pub struct PWMEN2_W<'a> {
210 w: &'a mut W,
211}
212impl<'a> PWMEN2_W<'a> {
213 #[doc = r"Writes `variant` to the field"]
214 #[inline(always)]
215 pub fn variant(self, variant: PWMEN2_A) -> &'a mut W {
216 {
217 self.bit(variant.into())
218 }
219 }
220 #[doc = "CT32Bn_MAT2 is controlled by EM2"]
221 #[inline(always)]
222 pub fn ct32bn_mat2_is_contr(self) -> &'a mut W {
223 self.variant(PWMEN2_A::CT32BN_MAT2_IS_CONTR)
224 }
225 #[doc = "PWM mode is enabled for CT32Bn_MAT2"]
226 #[inline(always)]
227 pub fn pwm_mode_is_enabled_(self) -> &'a mut W {
228 self.variant(PWMEN2_A::PWM_MODE_IS_ENABLED_)
229 }
230 #[doc = r"Sets the field bit"]
231 #[inline(always)]
232 pub fn set_bit(self) -> &'a mut W {
233 self.bit(true)
234 }
235 #[doc = r"Clears the field bit"]
236 #[inline(always)]
237 pub fn clear_bit(self) -> &'a mut W {
238 self.bit(false)
239 }
240 #[doc = r"Writes raw bits to the field"]
241 #[inline(always)]
242 pub fn bit(self, value: bool) -> &'a mut W {
243 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
244 self.w
245 }
246}
247#[doc = "PWM channel 3 enable Note: It is recommended to use match channel 3 to set the PWM cycle.\n\nValue on reset: 0"]
248#[derive(Clone, Copy, Debug, PartialEq)]
249pub enum PWMEN3_A {
250 #[doc = "0: CT32Bn_MAT3 is controlled by EM3"]
251 CT32BN_MAT3_IS_CONTR,
252 #[doc = "1: PWM mode is enabled for CT32Bn_MAT3"]
253 PWM_MODE_IS_ENABLED_,
254}
255impl From<PWMEN3_A> for bool {
256 #[inline(always)]
257 fn from(variant: PWMEN3_A) -> Self {
258 match variant {
259 PWMEN3_A::CT32BN_MAT3_IS_CONTR => false,
260 PWMEN3_A::PWM_MODE_IS_ENABLED_ => true,
261 }
262 }
263}
264#[doc = "Reader of field `PWMEN3`"]
265pub type PWMEN3_R = crate::R<bool, PWMEN3_A>;
266impl PWMEN3_R {
267 #[doc = r"Get enumerated values variant"]
268 #[inline(always)]
269 pub fn variant(&self) -> PWMEN3_A {
270 match self.bits {
271 false => PWMEN3_A::CT32BN_MAT3_IS_CONTR,
272 true => PWMEN3_A::PWM_MODE_IS_ENABLED_,
273 }
274 }
275 #[doc = "Checks if the value of the field is `CT32BN_MAT3_IS_CONTR`"]
276 #[inline(always)]
277 pub fn is_ct32bn_mat3_is_contr(&self) -> bool {
278 *self == PWMEN3_A::CT32BN_MAT3_IS_CONTR
279 }
280 #[doc = "Checks if the value of the field is `PWM_MODE_IS_ENABLED_`"]
281 #[inline(always)]
282 pub fn is_pwm_mode_is_enabled_(&self) -> bool {
283 *self == PWMEN3_A::PWM_MODE_IS_ENABLED_
284 }
285}
286#[doc = "Write proxy for field `PWMEN3`"]
287pub struct PWMEN3_W<'a> {
288 w: &'a mut W,
289}
290impl<'a> PWMEN3_W<'a> {
291 #[doc = r"Writes `variant` to the field"]
292 #[inline(always)]
293 pub fn variant(self, variant: PWMEN3_A) -> &'a mut W {
294 {
295 self.bit(variant.into())
296 }
297 }
298 #[doc = "CT32Bn_MAT3 is controlled by EM3"]
299 #[inline(always)]
300 pub fn ct32bn_mat3_is_contr(self) -> &'a mut W {
301 self.variant(PWMEN3_A::CT32BN_MAT3_IS_CONTR)
302 }
303 #[doc = "PWM mode is enabled for CT32Bn_MAT3"]
304 #[inline(always)]
305 pub fn pwm_mode_is_enabled_(self) -> &'a mut W {
306 self.variant(PWMEN3_A::PWM_MODE_IS_ENABLED_)
307 }
308 #[doc = r"Sets the field bit"]
309 #[inline(always)]
310 pub fn set_bit(self) -> &'a mut W {
311 self.bit(true)
312 }
313 #[doc = r"Clears the field bit"]
314 #[inline(always)]
315 pub fn clear_bit(self) -> &'a mut W {
316 self.bit(false)
317 }
318 #[doc = r"Writes raw bits to the field"]
319 #[inline(always)]
320 pub fn bit(self, value: bool) -> &'a mut W {
321 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
322 self.w
323 }
324}
325impl R {
326 #[doc = "Bit 0 - PWM channel 0 enable."]
327 #[inline(always)]
328 pub fn pwmen0(&self) -> PWMEN0_R {
329 PWMEN0_R::new((self.bits & 0x01) != 0)
330 }
331 #[doc = "Bit 1 - PWM channel 1 enable."]
332 #[inline(always)]
333 pub fn pwmen1(&self) -> PWMEN1_R {
334 PWMEN1_R::new(((self.bits >> 1) & 0x01) != 0)
335 }
336 #[doc = "Bit 2 - PWM channel 2 enable."]
337 #[inline(always)]
338 pub fn pwmen2(&self) -> PWMEN2_R {
339 PWMEN2_R::new(((self.bits >> 2) & 0x01) != 0)
340 }
341 #[doc = "Bit 3 - PWM channel 3 enable Note: It is recommended to use match channel 3 to set the PWM cycle."]
342 #[inline(always)]
343 pub fn pwmen3(&self) -> PWMEN3_R {
344 PWMEN3_R::new(((self.bits >> 3) & 0x01) != 0)
345 }
346}
347impl W {
348 #[doc = "Bit 0 - PWM channel 0 enable."]
349 #[inline(always)]
350 pub fn pwmen0(&mut self) -> PWMEN0_W {
351 PWMEN0_W { w: self }
352 }
353 #[doc = "Bit 1 - PWM channel 1 enable."]
354 #[inline(always)]
355 pub fn pwmen1(&mut self) -> PWMEN1_W {
356 PWMEN1_W { w: self }
357 }
358 #[doc = "Bit 2 - PWM channel 2 enable."]
359 #[inline(always)]
360 pub fn pwmen2(&mut self) -> PWMEN2_W {
361 PWMEN2_W { w: self }
362 }
363 #[doc = "Bit 3 - PWM channel 3 enable Note: It is recommended to use match channel 3 to set the PWM cycle."]
364 #[inline(always)]
365 pub fn pwmen3(&mut self) -> PWMEN3_W {
366 PWMEN3_W { w: self }
367 }
368}