1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::INTSTAT {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = r" Value of the field"]
46pub struct EP0OUTR {
47 bits: bool,
48}
49impl EP0OUTR {
50 #[doc = r" Value of the field as raw bits"]
51 #[inline]
52 pub fn bit(&self) -> bool {
53 self.bits
54 }
55 #[doc = r" Returns `true` if the bit is clear (0)"]
56 #[inline]
57 pub fn bit_is_clear(&self) -> bool {
58 !self.bit()
59 }
60 #[doc = r" Returns `true` if the bit is set (1)"]
61 #[inline]
62 pub fn bit_is_set(&self) -> bool {
63 self.bit()
64 }
65}
66#[doc = r" Value of the field"]
67pub struct EP0INR {
68 bits: bool,
69}
70impl EP0INR {
71 #[doc = r" Value of the field as raw bits"]
72 #[inline]
73 pub fn bit(&self) -> bool {
74 self.bits
75 }
76 #[doc = r" Returns `true` if the bit is clear (0)"]
77 #[inline]
78 pub fn bit_is_clear(&self) -> bool {
79 !self.bit()
80 }
81 #[doc = r" Returns `true` if the bit is set (1)"]
82 #[inline]
83 pub fn bit_is_set(&self) -> bool {
84 self.bit()
85 }
86}
87#[doc = r" Value of the field"]
88pub struct EP1OUTR {
89 bits: bool,
90}
91impl EP1OUTR {
92 #[doc = r" Value of the field as raw bits"]
93 #[inline]
94 pub fn bit(&self) -> bool {
95 self.bits
96 }
97 #[doc = r" Returns `true` if the bit is clear (0)"]
98 #[inline]
99 pub fn bit_is_clear(&self) -> bool {
100 !self.bit()
101 }
102 #[doc = r" Returns `true` if the bit is set (1)"]
103 #[inline]
104 pub fn bit_is_set(&self) -> bool {
105 self.bit()
106 }
107}
108#[doc = r" Value of the field"]
109pub struct EP1INR {
110 bits: bool,
111}
112impl EP1INR {
113 #[doc = r" Value of the field as raw bits"]
114 #[inline]
115 pub fn bit(&self) -> bool {
116 self.bits
117 }
118 #[doc = r" Returns `true` if the bit is clear (0)"]
119 #[inline]
120 pub fn bit_is_clear(&self) -> bool {
121 !self.bit()
122 }
123 #[doc = r" Returns `true` if the bit is set (1)"]
124 #[inline]
125 pub fn bit_is_set(&self) -> bool {
126 self.bit()
127 }
128}
129#[doc = r" Value of the field"]
130pub struct EP2OUTR {
131 bits: bool,
132}
133impl EP2OUTR {
134 #[doc = r" Value of the field as raw bits"]
135 #[inline]
136 pub fn bit(&self) -> bool {
137 self.bits
138 }
139 #[doc = r" Returns `true` if the bit is clear (0)"]
140 #[inline]
141 pub fn bit_is_clear(&self) -> bool {
142 !self.bit()
143 }
144 #[doc = r" Returns `true` if the bit is set (1)"]
145 #[inline]
146 pub fn bit_is_set(&self) -> bool {
147 self.bit()
148 }
149}
150#[doc = r" Value of the field"]
151pub struct EP2INR {
152 bits: bool,
153}
154impl EP2INR {
155 #[doc = r" Value of the field as raw bits"]
156 #[inline]
157 pub fn bit(&self) -> bool {
158 self.bits
159 }
160 #[doc = r" Returns `true` if the bit is clear (0)"]
161 #[inline]
162 pub fn bit_is_clear(&self) -> bool {
163 !self.bit()
164 }
165 #[doc = r" Returns `true` if the bit is set (1)"]
166 #[inline]
167 pub fn bit_is_set(&self) -> bool {
168 self.bit()
169 }
170}
171#[doc = r" Value of the field"]
172pub struct EP3OUTR {
173 bits: bool,
174}
175impl EP3OUTR {
176 #[doc = r" Value of the field as raw bits"]
177 #[inline]
178 pub fn bit(&self) -> bool {
179 self.bits
180 }
181 #[doc = r" Returns `true` if the bit is clear (0)"]
182 #[inline]
183 pub fn bit_is_clear(&self) -> bool {
184 !self.bit()
185 }
186 #[doc = r" Returns `true` if the bit is set (1)"]
187 #[inline]
188 pub fn bit_is_set(&self) -> bool {
189 self.bit()
190 }
191}
192#[doc = r" Value of the field"]
193pub struct EP3INR {
194 bits: bool,
195}
196impl EP3INR {
197 #[doc = r" Value of the field as raw bits"]
198 #[inline]
199 pub fn bit(&self) -> bool {
200 self.bits
201 }
202 #[doc = r" Returns `true` if the bit is clear (0)"]
203 #[inline]
204 pub fn bit_is_clear(&self) -> bool {
205 !self.bit()
206 }
207 #[doc = r" Returns `true` if the bit is set (1)"]
208 #[inline]
209 pub fn bit_is_set(&self) -> bool {
210 self.bit()
211 }
212}
213#[doc = r" Value of the field"]
214pub struct EP4OUTR {
215 bits: bool,
216}
217impl EP4OUTR {
218 #[doc = r" Value of the field as raw bits"]
219 #[inline]
220 pub fn bit(&self) -> bool {
221 self.bits
222 }
223 #[doc = r" Returns `true` if the bit is clear (0)"]
224 #[inline]
225 pub fn bit_is_clear(&self) -> bool {
226 !self.bit()
227 }
228 #[doc = r" Returns `true` if the bit is set (1)"]
229 #[inline]
230 pub fn bit_is_set(&self) -> bool {
231 self.bit()
232 }
233}
234#[doc = r" Value of the field"]
235pub struct EP4INR {
236 bits: bool,
237}
238impl EP4INR {
239 #[doc = r" Value of the field as raw bits"]
240 #[inline]
241 pub fn bit(&self) -> bool {
242 self.bits
243 }
244 #[doc = r" Returns `true` if the bit is clear (0)"]
245 #[inline]
246 pub fn bit_is_clear(&self) -> bool {
247 !self.bit()
248 }
249 #[doc = r" Returns `true` if the bit is set (1)"]
250 #[inline]
251 pub fn bit_is_set(&self) -> bool {
252 self.bit()
253 }
254}
255#[doc = r" Value of the field"]
256pub struct FRAME_INTR {
257 bits: bool,
258}
259impl FRAME_INTR {
260 #[doc = r" Value of the field as raw bits"]
261 #[inline]
262 pub fn bit(&self) -> bool {
263 self.bits
264 }
265 #[doc = r" Returns `true` if the bit is clear (0)"]
266 #[inline]
267 pub fn bit_is_clear(&self) -> bool {
268 !self.bit()
269 }
270 #[doc = r" Returns `true` if the bit is set (1)"]
271 #[inline]
272 pub fn bit_is_set(&self) -> bool {
273 self.bit()
274 }
275}
276#[doc = r" Value of the field"]
277pub struct DEV_INTR {
278 bits: bool,
279}
280impl DEV_INTR {
281 #[doc = r" Value of the field as raw bits"]
282 #[inline]
283 pub fn bit(&self) -> bool {
284 self.bits
285 }
286 #[doc = r" Returns `true` if the bit is clear (0)"]
287 #[inline]
288 pub fn bit_is_clear(&self) -> bool {
289 !self.bit()
290 }
291 #[doc = r" Returns `true` if the bit is set (1)"]
292 #[inline]
293 pub fn bit_is_set(&self) -> bool {
294 self.bit()
295 }
296}
297#[doc = r" Proxy"]
298pub struct _EP0OUTW<'a> {
299 w: &'a mut W,
300}
301impl<'a> _EP0OUTW<'a> {
302 #[doc = r" Sets the field bit"]
303 pub fn set_bit(self) -> &'a mut W {
304 self.bit(true)
305 }
306 #[doc = r" Clears the field bit"]
307 pub fn clear_bit(self) -> &'a mut W {
308 self.bit(false)
309 }
310 #[doc = r" Writes raw bits to the field"]
311 #[inline]
312 pub fn bit(self, value: bool) -> &'a mut W {
313 const MASK: bool = true;
314 const OFFSET: u8 = 0;
315 self.w.bits &= !((MASK as u32) << OFFSET);
316 self.w.bits |= ((value & MASK) as u32) << OFFSET;
317 self.w
318 }
319}
320#[doc = r" Proxy"]
321pub struct _EP0INW<'a> {
322 w: &'a mut W,
323}
324impl<'a> _EP0INW<'a> {
325 #[doc = r" Sets the field bit"]
326 pub fn set_bit(self) -> &'a mut W {
327 self.bit(true)
328 }
329 #[doc = r" Clears the field bit"]
330 pub fn clear_bit(self) -> &'a mut W {
331 self.bit(false)
332 }
333 #[doc = r" Writes raw bits to the field"]
334 #[inline]
335 pub fn bit(self, value: bool) -> &'a mut W {
336 const MASK: bool = true;
337 const OFFSET: u8 = 1;
338 self.w.bits &= !((MASK as u32) << OFFSET);
339 self.w.bits |= ((value & MASK) as u32) << OFFSET;
340 self.w
341 }
342}
343#[doc = r" Proxy"]
344pub struct _EP1OUTW<'a> {
345 w: &'a mut W,
346}
347impl<'a> _EP1OUTW<'a> {
348 #[doc = r" Sets the field bit"]
349 pub fn set_bit(self) -> &'a mut W {
350 self.bit(true)
351 }
352 #[doc = r" Clears the field bit"]
353 pub fn clear_bit(self) -> &'a mut W {
354 self.bit(false)
355 }
356 #[doc = r" Writes raw bits to the field"]
357 #[inline]
358 pub fn bit(self, value: bool) -> &'a mut W {
359 const MASK: bool = true;
360 const OFFSET: u8 = 2;
361 self.w.bits &= !((MASK as u32) << OFFSET);
362 self.w.bits |= ((value & MASK) as u32) << OFFSET;
363 self.w
364 }
365}
366#[doc = r" Proxy"]
367pub struct _EP1INW<'a> {
368 w: &'a mut W,
369}
370impl<'a> _EP1INW<'a> {
371 #[doc = r" Sets the field bit"]
372 pub fn set_bit(self) -> &'a mut W {
373 self.bit(true)
374 }
375 #[doc = r" Clears the field bit"]
376 pub fn clear_bit(self) -> &'a mut W {
377 self.bit(false)
378 }
379 #[doc = r" Writes raw bits to the field"]
380 #[inline]
381 pub fn bit(self, value: bool) -> &'a mut W {
382 const MASK: bool = true;
383 const OFFSET: u8 = 3;
384 self.w.bits &= !((MASK as u32) << OFFSET);
385 self.w.bits |= ((value & MASK) as u32) << OFFSET;
386 self.w
387 }
388}
389#[doc = r" Proxy"]
390pub struct _EP2OUTW<'a> {
391 w: &'a mut W,
392}
393impl<'a> _EP2OUTW<'a> {
394 #[doc = r" Sets the field bit"]
395 pub fn set_bit(self) -> &'a mut W {
396 self.bit(true)
397 }
398 #[doc = r" Clears the field bit"]
399 pub fn clear_bit(self) -> &'a mut W {
400 self.bit(false)
401 }
402 #[doc = r" Writes raw bits to the field"]
403 #[inline]
404 pub fn bit(self, value: bool) -> &'a mut W {
405 const MASK: bool = true;
406 const OFFSET: u8 = 4;
407 self.w.bits &= !((MASK as u32) << OFFSET);
408 self.w.bits |= ((value & MASK) as u32) << OFFSET;
409 self.w
410 }
411}
412#[doc = r" Proxy"]
413pub struct _EP2INW<'a> {
414 w: &'a mut W,
415}
416impl<'a> _EP2INW<'a> {
417 #[doc = r" Sets the field bit"]
418 pub fn set_bit(self) -> &'a mut W {
419 self.bit(true)
420 }
421 #[doc = r" Clears the field bit"]
422 pub fn clear_bit(self) -> &'a mut W {
423 self.bit(false)
424 }
425 #[doc = r" Writes raw bits to the field"]
426 #[inline]
427 pub fn bit(self, value: bool) -> &'a mut W {
428 const MASK: bool = true;
429 const OFFSET: u8 = 5;
430 self.w.bits &= !((MASK as u32) << OFFSET);
431 self.w.bits |= ((value & MASK) as u32) << OFFSET;
432 self.w
433 }
434}
435#[doc = r" Proxy"]
436pub struct _EP3OUTW<'a> {
437 w: &'a mut W,
438}
439impl<'a> _EP3OUTW<'a> {
440 #[doc = r" Sets the field bit"]
441 pub fn set_bit(self) -> &'a mut W {
442 self.bit(true)
443 }
444 #[doc = r" Clears the field bit"]
445 pub fn clear_bit(self) -> &'a mut W {
446 self.bit(false)
447 }
448 #[doc = r" Writes raw bits to the field"]
449 #[inline]
450 pub fn bit(self, value: bool) -> &'a mut W {
451 const MASK: bool = true;
452 const OFFSET: u8 = 6;
453 self.w.bits &= !((MASK as u32) << OFFSET);
454 self.w.bits |= ((value & MASK) as u32) << OFFSET;
455 self.w
456 }
457}
458#[doc = r" Proxy"]
459pub struct _EP3INW<'a> {
460 w: &'a mut W,
461}
462impl<'a> _EP3INW<'a> {
463 #[doc = r" Sets the field bit"]
464 pub fn set_bit(self) -> &'a mut W {
465 self.bit(true)
466 }
467 #[doc = r" Clears the field bit"]
468 pub fn clear_bit(self) -> &'a mut W {
469 self.bit(false)
470 }
471 #[doc = r" Writes raw bits to the field"]
472 #[inline]
473 pub fn bit(self, value: bool) -> &'a mut W {
474 const MASK: bool = true;
475 const OFFSET: u8 = 7;
476 self.w.bits &= !((MASK as u32) << OFFSET);
477 self.w.bits |= ((value & MASK) as u32) << OFFSET;
478 self.w
479 }
480}
481#[doc = r" Proxy"]
482pub struct _EP4OUTW<'a> {
483 w: &'a mut W,
484}
485impl<'a> _EP4OUTW<'a> {
486 #[doc = r" Sets the field bit"]
487 pub fn set_bit(self) -> &'a mut W {
488 self.bit(true)
489 }
490 #[doc = r" Clears the field bit"]
491 pub fn clear_bit(self) -> &'a mut W {
492 self.bit(false)
493 }
494 #[doc = r" Writes raw bits to the field"]
495 #[inline]
496 pub fn bit(self, value: bool) -> &'a mut W {
497 const MASK: bool = true;
498 const OFFSET: u8 = 8;
499 self.w.bits &= !((MASK as u32) << OFFSET);
500 self.w.bits |= ((value & MASK) as u32) << OFFSET;
501 self.w
502 }
503}
504#[doc = r" Proxy"]
505pub struct _EP4INW<'a> {
506 w: &'a mut W,
507}
508impl<'a> _EP4INW<'a> {
509 #[doc = r" Sets the field bit"]
510 pub fn set_bit(self) -> &'a mut W {
511 self.bit(true)
512 }
513 #[doc = r" Clears the field bit"]
514 pub fn clear_bit(self) -> &'a mut W {
515 self.bit(false)
516 }
517 #[doc = r" Writes raw bits to the field"]
518 #[inline]
519 pub fn bit(self, value: bool) -> &'a mut W {
520 const MASK: bool = true;
521 const OFFSET: u8 = 9;
522 self.w.bits &= !((MASK as u32) << OFFSET);
523 self.w.bits |= ((value & MASK) as u32) << OFFSET;
524 self.w
525 }
526}
527#[doc = r" Proxy"]
528pub struct _FRAME_INTW<'a> {
529 w: &'a mut W,
530}
531impl<'a> _FRAME_INTW<'a> {
532 #[doc = r" Sets the field bit"]
533 pub fn set_bit(self) -> &'a mut W {
534 self.bit(true)
535 }
536 #[doc = r" Clears the field bit"]
537 pub fn clear_bit(self) -> &'a mut W {
538 self.bit(false)
539 }
540 #[doc = r" Writes raw bits to the field"]
541 #[inline]
542 pub fn bit(self, value: bool) -> &'a mut W {
543 const MASK: bool = true;
544 const OFFSET: u8 = 30;
545 self.w.bits &= !((MASK as u32) << OFFSET);
546 self.w.bits |= ((value & MASK) as u32) << OFFSET;
547 self.w
548 }
549}
550#[doc = r" Proxy"]
551pub struct _DEV_INTW<'a> {
552 w: &'a mut W,
553}
554impl<'a> _DEV_INTW<'a> {
555 #[doc = r" Sets the field bit"]
556 pub fn set_bit(self) -> &'a mut W {
557 self.bit(true)
558 }
559 #[doc = r" Clears the field bit"]
560 pub fn clear_bit(self) -> &'a mut W {
561 self.bit(false)
562 }
563 #[doc = r" Writes raw bits to the field"]
564 #[inline]
565 pub fn bit(self, value: bool) -> &'a mut W {
566 const MASK: bool = true;
567 const OFFSET: u8 = 31;
568 self.w.bits &= !((MASK as u32) << OFFSET);
569 self.w.bits |= ((value & MASK) as u32) << OFFSET;
570 self.w
571 }
572}
573impl R {
574 #[doc = r" Value of the register as raw bits"]
575 #[inline]
576 pub fn bits(&self) -> u32 {
577 self.bits
578 }
579 #[doc = "Bit 0 - Interrupt status register bit for the Control EP0 OUT direction. This bit will be set if NBytes transitions to zero or the skip bit is set by software or a SETUP packet is successfully received for the control EP0. If the IntOnNAK_CO is set, this bit will also be set when a NAK is transmitted for the Control EP0 OUT direction. Software can clear this bit by writing a one to it."]
580 #[inline]
581 pub fn ep0out(&self) -> EP0OUTR {
582 let bits = {
583 const MASK: bool = true;
584 const OFFSET: u8 = 0;
585 ((self.bits >> OFFSET) & MASK as u32) != 0
586 };
587 EP0OUTR { bits }
588 }
589 #[doc = "Bit 1 - Interrupt status register bit for the Control EP0 IN direction. This bit will be set if NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_CI is set, this bit will also be set when a NAK is transmitted for the Control EP0 IN direction. Software can clear this bit by writing a one to it."]
590 #[inline]
591 pub fn ep0in(&self) -> EP0INR {
592 let bits = {
593 const MASK: bool = true;
594 const OFFSET: u8 = 1;
595 ((self.bits >> OFFSET) & MASK as u32) != 0
596 };
597 EP0INR { bits }
598 }
599 #[doc = "Bit 2 - Interrupt status register bit for the EP1 OUT direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AO is set, this bit will also be set when a NAK is transmitted for the EP1 OUT direction. Software can clear this bit by writing a one to it."]
600 #[inline]
601 pub fn ep1out(&self) -> EP1OUTR {
602 let bits = {
603 const MASK: bool = true;
604 const OFFSET: u8 = 2;
605 ((self.bits >> OFFSET) & MASK as u32) != 0
606 };
607 EP1OUTR { bits }
608 }
609 #[doc = "Bit 3 - Interrupt status register bit for the EP1 IN direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AI is set, this bit will also be set when a NAK is transmitted for the EP1 IN direction. Software can clear this bit by writing a one to it."]
610 #[inline]
611 pub fn ep1in(&self) -> EP1INR {
612 let bits = {
613 const MASK: bool = true;
614 const OFFSET: u8 = 3;
615 ((self.bits >> OFFSET) & MASK as u32) != 0
616 };
617 EP1INR { bits }
618 }
619 #[doc = "Bit 4 - Interrupt status register bit for the EP2 OUT direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AO is set, this bit will also be set when a NAK is transmitted for the EP2 OUT direction. Software can clear this bit by writing a one to it."]
620 #[inline]
621 pub fn ep2out(&self) -> EP2OUTR {
622 let bits = {
623 const MASK: bool = true;
624 const OFFSET: u8 = 4;
625 ((self.bits >> OFFSET) & MASK as u32) != 0
626 };
627 EP2OUTR { bits }
628 }
629 #[doc = "Bit 5 - Interrupt status register bit for the EP2 IN direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AI is set, this bit will also be set when a NAK is transmitted for the EP2 IN direction. Software can clear this bit by writing a one to it."]
630 #[inline]
631 pub fn ep2in(&self) -> EP2INR {
632 let bits = {
633 const MASK: bool = true;
634 const OFFSET: u8 = 5;
635 ((self.bits >> OFFSET) & MASK as u32) != 0
636 };
637 EP2INR { bits }
638 }
639 #[doc = "Bit 6 - Interrupt status register bit for the EP3 OUT direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AO is set, this bit will also be set when a NAK is transmitted for the EP3 OUT direction. Software can clear this bit by writing a one to it."]
640 #[inline]
641 pub fn ep3out(&self) -> EP3OUTR {
642 let bits = {
643 const MASK: bool = true;
644 const OFFSET: u8 = 6;
645 ((self.bits >> OFFSET) & MASK as u32) != 0
646 };
647 EP3OUTR { bits }
648 }
649 #[doc = "Bit 7 - Interrupt status register bit for the EP3 IN direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AI is set, this bit will also be set when a NAK is transmitted for the EP3 IN direction. Software can clear this bit by writing a one to it."]
650 #[inline]
651 pub fn ep3in(&self) -> EP3INR {
652 let bits = {
653 const MASK: bool = true;
654 const OFFSET: u8 = 7;
655 ((self.bits >> OFFSET) & MASK as u32) != 0
656 };
657 EP3INR { bits }
658 }
659 #[doc = "Bit 8 - Interrupt status register bit for the EP4 OUT direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AO is set, this bit will also be set when a NAK is transmitted for the EP4 OUT direction. Software can clear this bit by writing a one to it."]
660 #[inline]
661 pub fn ep4out(&self) -> EP4OUTR {
662 let bits = {
663 const MASK: bool = true;
664 const OFFSET: u8 = 8;
665 ((self.bits >> OFFSET) & MASK as u32) != 0
666 };
667 EP4OUTR { bits }
668 }
669 #[doc = "Bit 9 - Interrupt status register bit for the EP4 IN direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AI is set, this bit will also be set when a NAK is transmitted for the EP4 IN direction. Software can clear this bit by writing a one to it."]
670 #[inline]
671 pub fn ep4in(&self) -> EP4INR {
672 let bits = {
673 const MASK: bool = true;
674 const OFFSET: u8 = 9;
675 ((self.bits >> OFFSET) & MASK as u32) != 0
676 };
677 EP4INR { bits }
678 }
679 #[doc = "Bit 30 - Frame interrupt. This bit is set to one every millisecond when the VbusDebounced bit and the DCON bit are set. This bit can be used by software when handling isochronous endpoints. Software can clear this bit by writing a one to it."]
680 #[inline]
681 pub fn frame_int(&self) -> FRAME_INTR {
682 let bits = {
683 const MASK: bool = true;
684 const OFFSET: u8 = 30;
685 ((self.bits >> OFFSET) & MASK as u32) != 0
686 };
687 FRAME_INTR { bits }
688 }
689 #[doc = "Bit 31 - Device status interrupt. This bit is set by HW when one of the bits in the Device Status Change register are set. Software can clear this bit by writing a one to it."]
690 #[inline]
691 pub fn dev_int(&self) -> DEV_INTR {
692 let bits = {
693 const MASK: bool = true;
694 const OFFSET: u8 = 31;
695 ((self.bits >> OFFSET) & MASK as u32) != 0
696 };
697 DEV_INTR { bits }
698 }
699}
700impl W {
701 #[doc = r" Reset value of the register"]
702 #[inline]
703 pub fn reset_value() -> W {
704 W { bits: 0 }
705 }
706 #[doc = r" Writes raw bits to the register"]
707 #[inline]
708 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
709 self.bits = bits;
710 self
711 }
712 #[doc = "Bit 0 - Interrupt status register bit for the Control EP0 OUT direction. This bit will be set if NBytes transitions to zero or the skip bit is set by software or a SETUP packet is successfully received for the control EP0. If the IntOnNAK_CO is set, this bit will also be set when a NAK is transmitted for the Control EP0 OUT direction. Software can clear this bit by writing a one to it."]
713 #[inline]
714 pub fn ep0out(&mut self) -> _EP0OUTW {
715 _EP0OUTW { w: self }
716 }
717 #[doc = "Bit 1 - Interrupt status register bit for the Control EP0 IN direction. This bit will be set if NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_CI is set, this bit will also be set when a NAK is transmitted for the Control EP0 IN direction. Software can clear this bit by writing a one to it."]
718 #[inline]
719 pub fn ep0in(&mut self) -> _EP0INW {
720 _EP0INW { w: self }
721 }
722 #[doc = "Bit 2 - Interrupt status register bit for the EP1 OUT direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AO is set, this bit will also be set when a NAK is transmitted for the EP1 OUT direction. Software can clear this bit by writing a one to it."]
723 #[inline]
724 pub fn ep1out(&mut self) -> _EP1OUTW {
725 _EP1OUTW { w: self }
726 }
727 #[doc = "Bit 3 - Interrupt status register bit for the EP1 IN direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AI is set, this bit will also be set when a NAK is transmitted for the EP1 IN direction. Software can clear this bit by writing a one to it."]
728 #[inline]
729 pub fn ep1in(&mut self) -> _EP1INW {
730 _EP1INW { w: self }
731 }
732 #[doc = "Bit 4 - Interrupt status register bit for the EP2 OUT direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AO is set, this bit will also be set when a NAK is transmitted for the EP2 OUT direction. Software can clear this bit by writing a one to it."]
733 #[inline]
734 pub fn ep2out(&mut self) -> _EP2OUTW {
735 _EP2OUTW { w: self }
736 }
737 #[doc = "Bit 5 - Interrupt status register bit for the EP2 IN direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AI is set, this bit will also be set when a NAK is transmitted for the EP2 IN direction. Software can clear this bit by writing a one to it."]
738 #[inline]
739 pub fn ep2in(&mut self) -> _EP2INW {
740 _EP2INW { w: self }
741 }
742 #[doc = "Bit 6 - Interrupt status register bit for the EP3 OUT direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AO is set, this bit will also be set when a NAK is transmitted for the EP3 OUT direction. Software can clear this bit by writing a one to it."]
743 #[inline]
744 pub fn ep3out(&mut self) -> _EP3OUTW {
745 _EP3OUTW { w: self }
746 }
747 #[doc = "Bit 7 - Interrupt status register bit for the EP3 IN direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AI is set, this bit will also be set when a NAK is transmitted for the EP3 IN direction. Software can clear this bit by writing a one to it."]
748 #[inline]
749 pub fn ep3in(&mut self) -> _EP3INW {
750 _EP3INW { w: self }
751 }
752 #[doc = "Bit 8 - Interrupt status register bit for the EP4 OUT direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AO is set, this bit will also be set when a NAK is transmitted for the EP4 OUT direction. Software can clear this bit by writing a one to it."]
753 #[inline]
754 pub fn ep4out(&mut self) -> _EP4OUTW {
755 _EP4OUTW { w: self }
756 }
757 #[doc = "Bit 9 - Interrupt status register bit for the EP4 IN direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AI is set, this bit will also be set when a NAK is transmitted for the EP4 IN direction. Software can clear this bit by writing a one to it."]
758 #[inline]
759 pub fn ep4in(&mut self) -> _EP4INW {
760 _EP4INW { w: self }
761 }
762 #[doc = "Bit 30 - Frame interrupt. This bit is set to one every millisecond when the VbusDebounced bit and the DCON bit are set. This bit can be used by software when handling isochronous endpoints. Software can clear this bit by writing a one to it."]
763 #[inline]
764 pub fn frame_int(&mut self) -> _FRAME_INTW {
765 _FRAME_INTW { w: self }
766 }
767 #[doc = "Bit 31 - Device status interrupt. This bit is set by HW when one of the bits in the Device Status Change register are set. Software can clear this bit by writing a one to it."]
768 #[inline]
769 pub fn dev_int(&mut self) -> _DEV_INTW {
770 _DEV_INTW { w: self }
771 }
772}