use bit_field::BitField;
use core::fmt::Debug;
impl_define_csr!(
Tcfg,
"Timer Configuration\n\
This register is the interface to the software configuration timer.\n\
The number of valid bits of the timer is determined by the implementation,\n\
so the length of the TimeVal field in this register will change accordingly."
);
impl_read_csr!(0x41, Tcfg);
impl Debug for Tcfg {
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
f.debug_struct("TCfg")
.field("is_enabled", &self.en())
.field("is_periodic", &self.periodic())
.field("InitVal of (dec) timer", &self.init_val())
.finish()
}
}
impl Tcfg {
pub fn en(&self) -> bool {
!self.bits.get_bit(0)
}
pub fn periodic(&self) -> bool {
self.bits.get_bit(1)
}
pub fn init_val(&self) -> usize {
(self.bits >> 2) << 2
}
}
pub fn set_en(enable: bool) {
set_csr_loong_bit!(0x41, 0, enable);
}
pub fn set_periodic(loop_: bool) {
set_csr_loong_bit!(0x41, 1, loop_);
}
pub fn set_init_val(val: usize) {
set_csr_loong_bits!(0x41, 2.., val >> 2);
}