use crate::register::CpuMode;
use bit_field::BitField;
use core::fmt::Debug;
impl_define_csr!(
TlbRPrmd,
"TLB Refill Exception Pre-exception Mode Information (TLBRPRMD)
When a TLB refill exception is triggered,
the hardware saves the processor core’s PLV, Guest mode, global IE, and WE into this register,
for restoration of the processor core accordingly when the exception returns.
"
);
impl_read_csr!(0x8f, TlbRPrmd);
impl Debug for TlbRPrmd {
fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
f.debug_struct("TLBPrMd")
.field("pplv", &self.pplv())
.field("pie", &self.pie())
.field("pwe", &self.pwe())
.finish()
}
}
impl TlbRPrmd {
pub fn pplv(&self) -> usize {
self.bits.get_bits(0..2)
}
pub fn pie(&self) -> bool {
self.bits.get_bit(2)
}
pub fn pwe(&self) -> bool {
self.bits.get_bit(4)
}
}
pub fn set_pplv(pplv: CpuMode) {
set_csr_loong_bits!(0x8f, 0..2, pplv as usize);
}
pub fn set_pie(pie: bool) {
set_csr_loong_bit!(0x8f, 2, pie);
}
pub fn set_pwe(pwe: bool) {
set_csr_loong_bit!(0x8f, 4, pwe);
}