//! LLVM SelectionDAG — DAG-based instruction selection.
//! Phase 5 — LLVM.CODEGEN.DAG.1 Court.
//!
//! The SelectionDAG represents a basic block as a directed acyclic graph
//! of SDNodes. Each node represents an operation (add, load, store, etc.)
//! and edges represent data dependencies.
//!
//! ## Modules
//! - `sd_node`: SDNode types, SDValue, SelectionDAG, and node flags
//! - `dag_builder`: SelectionDAGBuilder that converts LLVM IR to DAG nodes
// Re-export key types for convenience
pub use SelectionDAGBuilder;
pub use DAGCombiner;
pub use ;
pub use ;
pub use ;