llvm-native-core 0.1.15

LLVM-native core semantic engine — IR, CodeGen, X86 MC, Clang frontend pipeline
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//! SystemZ Target Backend — IBM z/Architecture (s390x).
//!
//! The SystemZ (s390x) architecture is IBM's 64-bit big-endian CISC ISA.
//! This backend provides complete register definitions, instruction set
//! metadata, instruction selection, MC encoding, and target machine
//! configuration.
//!
//! Key characteristics:
//! - 16 64-bit GPRs (r0–r15), r15 = stack pointer
//! - 16 64-bit FPRs (f0–f15)
//! - 16 32-bit Access Registers (a0–a15)
//! - 64-bit Program Status Word (PSW)
//! - 2-bit Condition Code (CC)
//! - Big-endian byte order
//! - Instructions: 2, 4, or 6 bytes

pub mod systemz_instr_info;
pub mod systemz_isel;
pub mod systemz_isel_full;
pub mod systemz_mc_encoder;
pub mod systemz_mc_encoder_full;
pub mod systemz_register_info;
pub mod systemz_target_machine;
pub mod systemz_x86_bridge;

pub use systemz_instr_info::{SystemzInstrDesc, SystemzInstrInfo, SystemzOpcode};
pub use systemz_isel::SystemzInstructionSelector;
pub use systemz_mc_encoder::SystemzMCEncoder;
pub use systemz_register_info::{
    SystemzRegister, SystemzRegisterInfo, SZ_AR_COUNT, SZ_FPR_COUNT, SZ_GPR_COUNT,
};
pub use systemz_target_machine::SystemzTargetMachine;

/// SystemZ pointer size (64 bits).
pub const SZ_POINTER_SIZE: u32 = 8;

/// SystemZ is big-endian.
pub const SZ_ENDIANNESS: &str = "big";

/// SystemZ stack alignment (8 bytes).
pub const SZ_STACK_ALIGNMENT: u32 = 8;

/// SystemZ red zone size (160 bytes — ABI defined).
pub const SZ_RED_ZONE_SIZE: u32 = 160;

/// Default page size.
pub const SZ_PAGE_SIZE: u32 = 4096;

/// Maximum instruction size in bytes.
pub const SZ_MAX_INSTR_SIZE: u32 = 6;

#[cfg(test)]
mod tests {
    use super::*;

    #[test]
    fn test_systemz_constants() {
        assert_eq!(SZ_POINTER_SIZE, 8);
        assert_eq!(SZ_ENDIANNESS, "big");
        assert_eq!(SZ_STACK_ALIGNMENT, 8);
        assert_eq!(SZ_RED_ZONE_SIZE, 160);
        assert_eq!(SZ_PAGE_SIZE, 4096);
        assert_eq!(SZ_MAX_INSTR_SIZE, 6);
    }
}