llvm-native-core 0.1.15

LLVM-native core semantic engine — IR, CodeGen, X86 MC, Clang frontend pipeline
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//! AVR Target Backend — 8-bit AVR microcontroller (ATmega/ATtiny).
//!
//! The AVR architecture is an 8-bit RISC ISA used in Arduino boards and
//! many embedded systems. This backend provides complete instruction set
//! metadata, instruction selection, MC encoding, and target machine
//! definition.
//!
//! Clean-room behavioral reconstruction from Atmel AVR Instruction Set
//! Manual (0856I–AVR–07/2014), the GNU AVR toolchain, and published
//! specifications. Zero LLVM source code consultation.

pub mod avr_instr_info;
pub mod avr_isel;
pub mod avr_mc_encoder;
pub mod avr_target_machine;
pub mod avr_x86_bridge;

pub use avr_instr_info::{AvrInstrDesc, AvrInstrInfo, AvrOpcode};
pub use avr_isel::AvrInstructionSelector;
pub use avr_mc_encoder::AvrMCEncoder;
pub use avr_target_machine::AvrTargetMachine;

/// AVR is an 8-bit architecture.
pub const AVR_POINTER_SIZE: u32 = 2;

/// AVR is little-endian (though it's 8-bit, multi-byte values are LE).
pub const AVR_ENDIANNESS: &str = "little";

/// AVR stack alignment (1 byte — no alignment requirement).
pub const AVR_STACK_ALIGNMENT: u32 = 1;

/// AVR has no red zone.
pub const AVR_RED_ZONE_SIZE: u32 = 0;

/// AVR page size (flash programming page).
pub const AVR_PAGE_SIZE: u32 = 128;

/// Maximum number of AVR registers (R0–R31).
pub const AVR_GPR_COUNT: u8 = 32;

/// I/O register space (0x00–0x3F for IN/OUT; 0x00–0x1F for SBI/CBI).
pub const AVR_IO_REG_COUNT: u16 = 64;

/// SRAM start address (0x0100 on classic ATmega devices).
pub const AVR_SRAM_START: u16 = 0x0100;

#[cfg(test)]
mod tests {
    use super::*;

    #[test]
    fn test_avr_constants() {
        assert_eq!(AVR_POINTER_SIZE, 2);
        assert_eq!(AVR_ENDIANNESS, "little");
        assert_eq!(AVR_STACK_ALIGNMENT, 1);
        assert_eq!(AVR_RED_ZONE_SIZE, 0);
        assert_eq!(AVR_PAGE_SIZE, 128);
        assert_eq!(AVR_GPR_COUNT, 32);
        assert_eq!(AVR_IO_REG_COUNT, 64);
        assert_eq!(AVR_SRAM_START, 0x0100);
    }
}