llvm-native-core 0.1.10

//! X86 Subtarget Features — Complete CPU model database, feature flag catalog,
//! processor family classification, per-CPU scheduling model info, and feature
//! dependency resolution for the X86 target backend.
//!
//! Clean-room behavioral reconstruction from:
//! - Intel® 64 and IA-32 Architectures Software Developer's Manual (vols 1-3)
//! - AMD64 Architecture Programmer's Manual (vols 1-5)
//! - Intel® Architecture Instruction Set Extensions Programming Reference
//! - Agner Fog's microarchitecture documentation (publicly available)
//! - CPUID instruction documentation (Intel/AMD)
//! - GCC/LLVM target attribute documentation (behavioral reference only)
//!
//! Zero LLVM source code consultation. All behavior reconstructed from
//! published specifications and black-box oracle interrogation.
//!
//! Coverage:
//! - 100+ CPU models across Intel, AMD, VIA, Zhaoxin
//! - 80+ feature flags covering ISA extensions and microarchitectural tuning
//! - Processor family classification for dispatch decisions
//! - Per-CPU scheduling model metadata (issue width, ROB size, buffers)
//! - Feature dependency chains for transitive enablement
//! - Complete test suite with 90+ test cases

use std::collections::HashSet;

// ============================================================================
// X86Feature — canonical feature flag identifiers
// ============================================================================

/// Canonical feature flag identifiers for all X86 subtarget features.
///
/// Each variant represents a single toggleable processor capability.
/// Feature names use LLVM-compatible underscore-separated lowercase strings.
///
/// # Categories
///
/// * **ISA extensions** — instruction set additions (SSE, AVX, etc.)
/// * **Microarchitecture features** — pipeline/execution properties
/// * **Tuning features** — code-generation preference flags
/// * **Security features** — CET, SGX, SMEP, etc.
/// * **AMX features** — Advanced Matrix Extensions
#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub enum X86Feature {
    // ── Baseline ──────────────────────────────────────────────────────────
    /// x87 FPU instructions (always present on modern x86).
    X87,
    /// CMOVcc (conditional move) instructions (i686+).
    Cmov,
    /// MMX multimedia extension (Pentium MMX+).
    Mmx,
    /// FXSAVE / FXRSTOR (fast FPU state save/restore).
    Fxr,
    /// NOPL — multi-byte NOP with operand-size prefix.
    Nopl,
    /// SAHF / LAHF instructions in 64-bit mode.
    Sahf,
    /// LAHF and SAHF (synonym covering both).
    LahfSahf,

    // ── SSE family ────────────────────────────────────────────────────────
    /// Streaming SIMD Extensions (Pentium III).
    Sse,
    /// SSE2 (Pentium 4, x86-64 baseline).
    Sse2,
    /// SSE3 (Prescott, 2004).
    Sse3,
    /// Supplemental SSE3 (Core 2, 2006).
    Ssse3,
    /// SSE4.1 (Penryn, 2007).
    Sse41,
    /// SSE4.2 (Nehalem, 2008).
    Sse42,

    // ── AVX family ────────────────────────────────────────────────────────
    /// Advanced Vector Extensions (256-bit, Sandy Bridge).
    Avx,
    /// AVX2 — integer vector instructions (Haswell).
    Avx2,
    /// AVX-512 Foundation (512-bit vector ISA).
    Avx512f,
    /// AVX-512 Conflict Detection Instructions.
    Avx512cd,
    /// AVX-512 Exponential & Reciprocal Instructions (Xeon Phi).
    Avx512er,
    /// AVX-512 Prefetch Instructions (Xeon Phi).
    Avx512pf,
    /// AVX-512 Byte & Word Instructions.
    Avx512bw,
    /// AVX-512 Doubleword & Quadword Instructions.
    Avx512dq,
    /// AVX-512 Vector Length Extensions.
    Avx512vl,
    /// AVX-512 Vector Byte Manipulation Instructions.
    Avx512vbmi,
    /// AVX-512 VBMI2 — additional byte/word permute instructions.
    Avx512vbmi2,
    /// AVX-512 Vector Neural Network Instructions.
    Avx512vnni,
    /// AVX-512 Bit Algorithms.
    Avx512bitalg,
    /// AVX-512 Vector Population Count D/Q.
    Avx512vpopcntdq,
    /// AVX-512 16-bit Floating Point (FP16) instructions.
    Avx512fp16,
    /// AVX-512 BFloat16 instructions.
    Avx512bf16,
    /// AVX-512 Integer Fused Multiply-Add.
    Avx512ifma,
    /// AVX-512 VP2INTERSECT (vector pair intersection).
    Avx512vp2intersect,

    // ── AVX-VNNI family ───────────────────────────────────────────────────
    /// AVX Vector Neural Network Instructions (VNNI) — 256-bit.
    AvxVnni,
    /// AVX VNNI INT8 — 8-bit integer VNNI.
    AvxVnniInt8,
    /// AVX VNNI INT16 — 16-bit integer VNNI.
    AvxVnniInt16,
    /// AVX IFMA — Integer Fused Multiply-Add.
    AvxIfma,
    /// AVX NE Convert — neural engine conversion instructions.
    AvxNeConvert,

    // ── AVX10 family ──────────────────────────────────────────────────────
    /// AVX10.1 256-bit subset.
    Avx10_1_256,
    /// AVX10.1 512-bit.
    Avx10_1_512,
    /// AVX10.2 — converged AVX10/AVX-512 baseline.
    Avx10_2,

    // ── FMA / F16C / XOP ──────────────────────────────────────────────────
    /// Fused Multiply-Add (FMA3 — 3-operand form, Haswell).
    Fma,
    /// FMA4 — 4-operand FMA (AMD Bulldozer family).
    Fma4,
    /// F16C — 16-bit float conversion instructions.
    F16c,
    /// XOP — eXtended Operations (AMD Bulldozer family).
    Xop,
    /// LWP — Lightweight Profiling (AMD Bulldozer family).
    Lwp,

    // ── Bit manipulation ──────────────────────────────────────────────────
    /// BMI — Bit Manipulation Instruction set 1.
    Bmi,
    /// BMI2 — Bit Manipulation Instruction Set 2.
    Bmi2,
    /// TBM — Trailing Bit Manipulation (AMD).
    Tbm,
    /// LZCNT — Leading Zero Count.
    Lzcnt,
    /// POPCNT — Population Count.
    Popcnt,
    /// MOVBE — Move Big-Endian (Atom, Haswell+).
    Movbe,

    // ── Random number / crypto ────────────────────────────────────────────
    /// RDRAND — hardware random number generator.
    Rdrnd,
    /// RDSEED — hardware seed for random number generation.
    Rdseed,
    /// ADX — Multi-Precision Add-Carry Instruction Extensions.
    Adx,
    /// SHA — Secure Hash Algorithm instructions (SHA-1, SHA-256).
    Sha,
    /// SHA512 — SHA-512 instructions.
    Sha512,
    /// SM3 — Chinese cryptographic hash.
    Sm3,
    /// SM4 — Chinese block cipher.
    Sm4,
    /// AES — Advanced Encryption Standard instructions.
    Aes,
    /// PCLMUL — Carry-Less Multiplication (PCLMULQDQ).
    Pclmul,
    /// VAES — Vector AES instructions (AVX-512 / AVX10).
    Vaes,
    /// VPCLMULQDQ — Vector PCLMULQDQ.
    Vpclmulqdq,
    /// GFNI — Galois Field New Instructions.
    Gfni,

    // ── Cache / memory operations ─────────────────────────────────────────
    /// CLFLUSHOPT — optimized cache line flush.
    Clflushopt,
    /// CLWB — Cache Line Write Back.
    Clwb,
    /// CLZERO — zero cache line (AMD).
    Clzero,
    /// PREFETCHW — prefetch with intent to write (3DNow! / AMD).
    Prfchw,
    /// PREFETCHWT1 — prefetch with T1 hint (Xeon Phi).
    Prefetchwt1,
    /// PREFETCHI — prefetch instruction (code prefetch).
    Prefetchi,
    /// MWAITX — MONITORX / MWAITX (AMD power management).
    Mwaitx,
    /// WBNOINVD — Write Back and Do Not Invalidate Cache.
    Wbnoinvd,
    /// CLDEMOTE — cache line demote.
    Cldemote,

    // ── System / security ────────────────────────────────────────────────
    /// RDPID — Read Processor ID.
    Rdpid,
    /// MOVDIRI — Move Doubleword as Direct Store.
    Movdiri,
    /// MOVDIR64B — Move 64 Bytes as Direct Store.
    Movdir64b,
    /// INVPCID — Invalidate Process-Context Identifier.
    Invpcid,
    /// INVLPGA — Invalidate TLB Entry (AMD SVM).
    Invlpg,
    /// PTWRITE — Write data to processor trace packet.
    Ptwrite,
    /// ENQCMD — Enqueue Command.
    Enqcmd,
    /// SERIALIZE — Serialize instruction execution.
    Serialize,
    /// TSXLDTRK — TSX suspend load address tracking.
    Tsxldtrk,
    /// CET-SS — Control-flow Enforcement Technology (Shadow Stack).
    CetSs,
    /// WAITPKG — WAITPKG (UMONITOR / UMWAIT / TPAUSE).
    Waitpkg,
    /// PCONFIG — Platform Configuration.
    Pconfig,
    /// SGX — Software Guard Extensions.
    Sgx,
    /// PKU — Protection Keys for User-mode pages.
    Pku,
    /// SMAP — Supervisor Mode Access Prevention.
    Smap,
    /// SMEP — Supervisor Mode Execution Prevention.
    Smep,
    /// MPX — Memory Protection Extensions (deprecated).
    Mpx,
    /// RTM — Restricted Transactional Memory (TSX).
    Rtm,
    /// HLE — Hardware Lock Elision (TSX).
    Hle,
    /// FSGSBASE — RDFSBASE / RDGSBASE / WRFSBASE / WRGSBASE.
    Fsgsbase,
    /// PT — Processor Trace.
    Pt,
    /// UINTR — User Interrupts.
    Uintr,
    /// HRESET — History Reset.
    Hreset,
    /// KL — Key Locker.
    Kl,
    /// WIDEKL — Wide Key Locker.
    WideKl,
    /// CMPCCXADD — Compare and ADD if condition met.
    Cmpccxadd,
    /// RAO-INT — Remote Atomic Operations on integers.
    RaoInt,

    // ── AMX (Advanced Matrix Extensions) ──────────────────────────────────
    /// AMX-TILE — tile architecture support.
    AmxTile,
    /// AMX-BF16 — bfloat16 tile operations.
    AmxBf16,
    /// AMX-INT8 — 8-bit integer tile operations.
    AmxInt8,
    /// AMX-FP16 — 16-bit floating-point tile operations.
    AmxFp16,

    // ── XSAVE family ──────────────────────────────────────────────────────
    /// XSAVE / XRSTOR (processor extended state save/restore).
    Xsave,
    /// XSAVEOPT — optimized XSAVE.
    Xsaveopt,
    /// XSAVEC — compacted XSAVE.
    Xsavec,
    /// XSAVES — supervisor-mode XSAVE.
    Xsaves,

    // ── 3DNow! (AMD legacy) ───────────────────────────────────────────────
    /// 3DNow! SIMD instructions (AMD K6-2, Athlon).
    ThreeDNow,
    /// 3DNow! extensions (AMD Athlon/Geode).
    ThreeDNowA,

    // ── Tuning / microarchitectural flags ─────────────────────────────────
    /// Avoid LEA with scaling factor due to slow 3-operand LEA.
    Slow3OpsLea,
    /// INC/DEC are slower than ADD/SUB (P4 / Atom).
    SlowIncDec,
    /// LEA instruction has high latency.
    SlowLea,
    /// PMULLD is slower than expected.
    SlowPmulld,
    /// SHLD/SHRD are microcoded and slow.
    SlowShld,
    /// 16-byte unaligned memory access is expensive.
    SlowUnalignedMem16,
    /// 32-byte unaligned memory access is expensive.
    SlowUnalignedMem32,
    /// 32-bit integer division is slow.
    SlowDivide32,
    /// 64-bit integer division is slow.
    SlowDivide64,
    /// Use software floating-point (no hardware FPU).
    SoftFloat,

    /// Fast 11-byte NOP padding.
    Fast11ByteNop,
    /// Fast 15-byte NOP padding.
    Fast15ByteNop,
    /// BEXTR is efficient (single uop).
    FastBextr,
    /// Gather instructions are efficient.
    FastGather,
    /// Horizontal operations (HADD, HSUB) are efficient.
    FastHops,
    /// LZCNT is fast.
    FastLzcnt,
    /// Scalar FSQRT is fast.
    FastScalarFsqrt,
    /// Scalar shift masks are efficient.
    FastScalarShiftMasks,
    /// Shift-and-rotate is efficient.
    FastShiftRotate,
    /// Variable cross-lane shuffles are efficient.
    FastVariableCrosslaneShuffle,
    /// Variable per-lane shuffles are efficient.
    FastVariablePerlaneShuffle,

    // ── Tuning preferences ────────────────────────────────────────────────
    /// Avoid LEA scale factor multiplication.
    AvoidLeaScale,
    /// General-purpose multiplication uses GLM (Atom).
    UseGlmul,
    /// General-purpose multiplication uses SLM (Silvermont).
    UseSlmul,
    /// Prefer 128-bit vector width over wider.
    Prefer128Bit,
    /// Prefer 256-bit vector width.
    Prefer256Bit,
    /// Prefer 512-bit vector width (AVX-512).
    Prefer512Bit,
    /// Prefer mask registers (k0-k7) for predicates.
    PreferMaskRegisters,
    /// Prefer not to use gather instructions.
    PreferNoGather,
    /// Prefer not to use scatter instructions.
    PreferNoScatter,
    /// Tune for slow 3-operand LEA.
    TuneSlow3OpsLea,
    /// Optimize for code size.
    OptForSize,
    /// Pad short functions with NOPs.
    PadShortFunctions,
    /// Avoid partial register stalls (write to full register).
    AvoidPartialRegStall,
    /// Use INC/DEC instructions.
    UseIncDec,
    /// Use SQRT estimate (reduced precision).
    UseSqrtEstimate,
    /// Use reciprocal estimate (reduced precision).
    UseRecipEstimate,
    /// Insert delay after DIV instructions.
    UseDivEqDelay,
    /// Convert branches to CMOV more aggressively.
    UseCmovBranch,
    /// Use BSR instruction.
    UseBsr,
    /// LEA uses address-generation unit.
    LeaUsesAg,
    /// LEA uses ALU.
    LeaUsesAlu,
}

impl X86Feature {
    /// Return the canonical string name for this feature.
    pub fn name(self) -> &'static str {
        match self {
            X86Feature::X87 => "x87",
            X86Feature::Cmov => "cmov",
            X86Feature::Mmx => "mmx",
            X86Feature::Fxr => "fxr",
            X86Feature::Nopl => "nopl",
            X86Feature::Sahf => "sahf",
            X86Feature::LahfSahf => "lahf_sahf",
            X86Feature::Sse => "sse",
            X86Feature::Sse2 => "sse2",
            X86Feature::Sse3 => "sse3",
            X86Feature::Ssse3 => "ssse3",
            X86Feature::Sse41 => "sse4.1",
            X86Feature::Sse42 => "sse4.2",
            X86Feature::Avx => "avx",
            X86Feature::Avx2 => "avx2",
            X86Feature::Avx512f => "avx512f",
            X86Feature::Avx512cd => "avx512cd",
            X86Feature::Avx512er => "avx512er",
            X86Feature::Avx512pf => "avx512pf",
            X86Feature::Avx512bw => "avx512bw",
            X86Feature::Avx512dq => "avx512dq",
            X86Feature::Avx512vl => "avx512vl",
            X86Feature::Avx512vbmi => "avx512vbmi",
            X86Feature::Avx512vbmi2 => "avx512vbmi2",
            X86Feature::Avx512vnni => "avx512vnni",
            X86Feature::Avx512bitalg => "avx512bitalg",
            X86Feature::Avx512vpopcntdq => "avx512vpopcntdq",
            X86Feature::Avx512fp16 => "avx512fp16",
            X86Feature::Avx512bf16 => "avx512bf16",
            X86Feature::Avx512ifma => "avx512ifma",
            X86Feature::Avx512vp2intersect => "avx512vp2intersect",
            X86Feature::AvxVnni => "avx_vnni",
            X86Feature::AvxVnniInt8 => "avx_vnni_int8",
            X86Feature::AvxVnniInt16 => "avx_vnni_int16",
            X86Feature::AvxIfma => "avx_ifma",
            X86Feature::AvxNeConvert => "avx_ne_convert",
            X86Feature::Avx10_1_256 => "avx10.1-256",
            X86Feature::Avx10_1_512 => "avx10.1-512",
            X86Feature::Avx10_2 => "avx10.2",
            X86Feature::Fma => "fma",
            X86Feature::Fma4 => "fma4",
            X86Feature::F16c => "f16c",
            X86Feature::Xop => "xop",
            X86Feature::Lwp => "lwp",
            X86Feature::Bmi => "bmi",
            X86Feature::Bmi2 => "bmi2",
            X86Feature::Tbm => "tbm",
            X86Feature::Lzcnt => "lzcnt",
            X86Feature::Popcnt => "popcnt",
            X86Feature::Movbe => "movbe",
            X86Feature::Rdrnd => "rdrnd",
            X86Feature::Rdseed => "rdseed",
            X86Feature::Adx => "adx",
            X86Feature::Sha => "sha",
            X86Feature::Sha512 => "sha512",
            X86Feature::Sm3 => "sm3",
            X86Feature::Sm4 => "sm4",
            X86Feature::Aes => "aes",
            X86Feature::Pclmul => "pclmul",
            X86Feature::Vaes => "vaes",
            X86Feature::Vpclmulqdq => "vpclmulqdq",
            X86Feature::Gfni => "gfni",
            X86Feature::Clflushopt => "clflushopt",
            X86Feature::Clwb => "clwb",
            X86Feature::Clzero => "clzero",
            X86Feature::Prfchw => "prfchw",
            X86Feature::Prefetchwt1 => "prefetchwt1",
            X86Feature::Prefetchi => "prefetchi",
            X86Feature::Mwaitx => "mwaitx",
            X86Feature::Wbnoinvd => "wbnoinvd",
            X86Feature::Cldemote => "cldemote",
            X86Feature::Rdpid => "rdpid",
            X86Feature::Movdiri => "movdiri",
            X86Feature::Movdir64b => "movdir64b",
            X86Feature::Invpcid => "invpcid",
            X86Feature::Invlpg => "invlpg",
            X86Feature::Ptwrite => "ptwrite",
            X86Feature::Enqcmd => "enqcmd",
            X86Feature::Serialize => "serialize",
            X86Feature::Tsxldtrk => "tsxldtrk",
            X86Feature::CetSs => "cet_ss",
            X86Feature::Waitpkg => "waitpkg",
            X86Feature::Pconfig => "pconfig",
            X86Feature::Sgx => "sgx",
            X86Feature::Pku => "pku",
            X86Feature::Smap => "smap",
            X86Feature::Smep => "smep",
            X86Feature::Mpx => "mpx",
            X86Feature::Rtm => "rtm",
            X86Feature::Hle => "hle",
            X86Feature::Fsgsbase => "fsgsbase",
            X86Feature::Pt => "pt",
            X86Feature::Uintr => "uintr",
            X86Feature::Hreset => "hreset",
            X86Feature::Kl => "kl",
            X86Feature::WideKl => "widekl",
            X86Feature::Cmpccxadd => "cmpccxadd",
            X86Feature::RaoInt => "raoint",
            X86Feature::AmxTile => "amx_tile",
            X86Feature::AmxBf16 => "amx_bf16",
            X86Feature::AmxInt8 => "amx_int8",
            X86Feature::AmxFp16 => "amx_fp16",
            X86Feature::Xsave => "xsave",
            X86Feature::Xsaveopt => "xsaveopt",
            X86Feature::Xsavec => "xsavec",
            X86Feature::Xsaves => "xsaves",
            X86Feature::ThreeDNow => "3dnow",
            X86Feature::ThreeDNowA => "3dnowa",
            X86Feature::Slow3OpsLea => "slow_3ops_lea",
            X86Feature::SlowIncDec => "slow_incdec",
            X86Feature::SlowLea => "slow_lea",
            X86Feature::SlowPmulld => "slow_pmulld",
            X86Feature::SlowShld => "slow_shld",
            X86Feature::SlowUnalignedMem16 => "slow_unaligned_mem_16",
            X86Feature::SlowUnalignedMem32 => "slow_unaligned_mem_32",
            X86Feature::SlowDivide32 => "slow_divide_32",
            X86Feature::SlowDivide64 => "slow_divide_64",
            X86Feature::SoftFloat => "soft_float",
            X86Feature::Fast11ByteNop => "fast_11bytenop",
            X86Feature::Fast15ByteNop => "fast_15bytenop",
            X86Feature::FastBextr => "fast_bextr",
            X86Feature::FastGather => "fast_gather",
            X86Feature::FastHops => "fast_hops",
            X86Feature::FastLzcnt => "fast_lzcnt",
            X86Feature::FastScalarFsqrt => "fast_scalar_fsqrt",
            X86Feature::FastScalarShiftMasks => "fast_scalar_shift_masks",
            X86Feature::FastShiftRotate => "fast_shift_rotate",
            X86Feature::FastVariableCrosslaneShuffle => "fast_variable_crosslane_shuffle",
            X86Feature::FastVariablePerlaneShuffle => "fast_variable_perlane_shuffle",
            X86Feature::AvoidLeaScale => "avoid_lea_scale",
            X86Feature::UseGlmul => "use_glmul",
            X86Feature::UseSlmul => "use_slmul",
            X86Feature::Prefer128Bit => "prefer_128_bit",
            X86Feature::Prefer256Bit => "prefer_256_bit",
            X86Feature::Prefer512Bit => "prefer_512_bit",
            X86Feature::PreferMaskRegisters => "prefer_mask_registers",
            X86Feature::PreferNoGather => "prefer_no_gather",
            X86Feature::PreferNoScatter => "prefer_no_scatter",
            X86Feature::TuneSlow3OpsLea => "tune_slow_3ops_lea",
            X86Feature::OptForSize => "opt_for_size",
            X86Feature::PadShortFunctions => "pad_short_functions",
            X86Feature::AvoidPartialRegStall => "avoid_partial_reg_stall",
            X86Feature::UseIncDec => "use_incdec",
            X86Feature::UseSqrtEstimate => "use_sqrt_estimate",
            X86Feature::UseRecipEstimate => "use_recip_estimate",
            X86Feature::UseDivEqDelay => "use_div_eq_delay",
            X86Feature::UseCmovBranch => "use_cmov_branch",
            X86Feature::UseBsr => "use_bsr",
            X86Feature::LeaUsesAg => "lea_uses_ag",
            X86Feature::LeaUsesAlu => "lea_uses_alu",
        }
    }

    /// Return a short human-readable description of this feature.
    pub fn description(self) -> &'static str {
        match self {
            X86Feature::X87 => "x87 FPU instructions",
            X86Feature::Cmov => "CMOVcc conditional move",
            X86Feature::Mmx => "MMX multimedia extension",
            X86Feature::Fxr => "FXSAVE/FXRSTOR fast FPU save/restore",
            X86Feature::Nopl => "Multi-byte NOP with operand-size prefix",
            X86Feature::Sahf => "SAHF instruction in 64-bit mode",
            X86Feature::LahfSahf => "LAHF/SAHF instructions",
            X86Feature::Sse => "SSE — Streaming SIMD Extensions",
            X86Feature::Sse2 => "SSE2 — double-precision and integer SIMD",
            X86Feature::Sse3 => "SSE3 — horizontal add/sub, monitor/mwait",
            X86Feature::Ssse3 => "SSSE3 — Supplemental SSE3",
            X86Feature::Sse41 => "SSE4.1 — dot product, rounding, blend",
            X86Feature::Sse42 => "SSE4.2 — string/text, CRC32, POPCNT",
            X86Feature::Avx => "AVX — 256-bit vector extensions",
            X86Feature::Avx2 => "AVX2 — integer vector, gather, FMA",
            X86Feature::Avx512f => "AVX-512 Foundation",
            X86Feature::Avx512cd => "AVX-512 Conflict Detection",
            X86Feature::Avx512er => "AVX-512 Exponential & Reciprocal",
            X86Feature::Avx512pf => "AVX-512 Prefetch",
            X86Feature::Avx512bw => "AVX-512 Byte & Word",
            X86Feature::Avx512dq => "AVX-512 Doubleword & Quadword",
            X86Feature::Avx512vl => "AVX-512 Vector Length Extensions",
            X86Feature::Avx512vbmi => "AVX-512 VBMI — byte permute",
            X86Feature::Avx512vbmi2 => "AVX-512 VBMI2 — byte/word permute",
            X86Feature::Avx512vnni => "AVX-512 VNNI — neural network",
            X86Feature::Avx512bitalg => "AVX-512 Bit Algorithms",
            X86Feature::Avx512vpopcntdq => "AVX-512 VPOPCNTD/Q",
            X86Feature::Avx512fp16 => "AVX-512 FP16 — 16-bit float",
            X86Feature::Avx512bf16 => "AVX-512 BF16 — bfloat16",
            X86Feature::Avx512ifma => "AVX-512 IFMA — integer FMA",
            X86Feature::Avx512vp2intersect => "AVX-512 VP2INTERSECT",
            X86Feature::AvxVnni => "AVX VNNI — 256-bit neural network",
            X86Feature::AvxVnniInt8 => "AVX VNNI INT8",
            X86Feature::AvxVnniInt16 => "AVX VNNI INT16",
            X86Feature::AvxIfma => "AVX IFMA — integer FMA",
            X86Feature::AvxNeConvert => "AVX NE Convert",
            X86Feature::Avx10_1_256 => "AVX10.1 256-bit",
            X86Feature::Avx10_1_512 => "AVX10.1 512-bit",
            X86Feature::Avx10_2 => "AVX10.2 converged baseline",
            X86Feature::Fma => "FMA — Fused Multiply-Add (3-operand)",
            X86Feature::Fma4 => "FMA4 — 4-operand FMA (AMD)",
            X86Feature::F16c => "F16C — 16-bit float conversion",
            X86Feature::Xop => "XOP — eXtended Operations (AMD)",
            X86Feature::Lwp => "LWP — Lightweight Profiling (AMD)",
            X86Feature::Bmi => "BMI — Bit Manipulation Instructions 1",
            X86Feature::Bmi2 => "BMI2 — Bit Manipulation Instructions 2",
            X86Feature::Tbm => "TBM — Trailing Bit Manipulation (AMD)",
            X86Feature::Lzcnt => "LZCNT — Leading Zero Count",
            X86Feature::Popcnt => "POPCNT — Population Count",
            X86Feature::Movbe => "MOVBE — Move Big-Endian",
            X86Feature::Rdrnd => "RDRAND — hardware random number",
            X86Feature::Rdseed => "RDSEED — hardware random seed",
            X86Feature::Adx => "ADX — Multi-Precision Add-Carry",
            X86Feature::Sha => "SHA — Secure Hash Algorithm",
            X86Feature::Sha512 => "SHA512 — SHA-512 instructions",
            X86Feature::Sm3 => "SM3 — Chinese cryptographic hash",
            X86Feature::Sm4 => "SM4 — Chinese block cipher",
            X86Feature::Aes => "AES — Advanced Encryption Standard",
            X86Feature::Pclmul => "PCLMUL — Carry-Less Multiplication",
            X86Feature::Vaes => "VAES — Vector AES instructions",
            X86Feature::Vpclmulqdq => "VPCLMULQDQ — Vector carry-less multiply",
            X86Feature::Gfni => "GFNI — Galois Field New Instructions",
            X86Feature::Clflushopt => "CLFLUSHOPT — optimized cache flush",
            X86Feature::Clwb => "CLWB — Cache Line Write Back",
            X86Feature::Clzero => "CLZERO — zero cache line (AMD)",
            X86Feature::Prfchw => "PREFETCHW — prefetch with intent to write",
            X86Feature::Prefetchwt1 => "PREFETCHWT1 — prefetch T1 hint",
            X86Feature::Prefetchi => "PREFETCHI — instruction prefetch",
            X86Feature::Mwaitx => "MWAITX/MONITORX — AMD power management",
            X86Feature::Wbnoinvd => "WBNOINVD — Write Back No Invalidate",
            X86Feature::Cldemote => "CLDEMOTE — cache line demote",
            X86Feature::Rdpid => "RDPID — Read Processor ID",
            X86Feature::Movdiri => "MOVDIRI — direct store doubleword",
            X86Feature::Movdir64b => "MOVDIR64B — direct store 64 bytes",
            X86Feature::Invpcid => "INVPCID — Invalidate Process-Context ID",
            X86Feature::Invlpg => "INVLPGA — Invalidate TLB Entry (AMD SVM)",
            X86Feature::Ptwrite => "PTWRITE — write to processor trace",
            X86Feature::Enqcmd => "ENQCMD — Enqueue Command",
            X86Feature::Serialize => "SERIALIZE — serialize instruction exec",
            X86Feature::Tsxldtrk => "TSXLDTRK — TSX suspend address tracking",
            X86Feature::CetSs => "CET-SS — Control-flow Enforcement Shadow Stack",
            X86Feature::Waitpkg => "WAITPKG — UMONITOR/UMWAIT/TPAUSE",
            X86Feature::Pconfig => "PCONFIG — Platform Configuration",
            X86Feature::Sgx => "SGX — Software Guard Extensions",
            X86Feature::Pku => "PKU — Protection Keys for Userspace",
            X86Feature::Smap => "SMAP — Supervisor Mode Access Prevention",
            X86Feature::Smep => "SMEP — Supervisor Mode Execution Prevention",
            X86Feature::Mpx => "MPX — Memory Protection Extensions",
            X86Feature::Rtm => "RTM — Restricted Transactional Memory",
            X86Feature::Hle => "HLE — Hardware Lock Elision",
            X86Feature::Fsgsbase => "FSGSBASE — FS/GS base register access",
            X86Feature::Pt => "PT — Processor Trace",
            X86Feature::Uintr => "UINTR — User Interrupts",
            X86Feature::Hreset => "HRESET — History Reset",
            X86Feature::Kl => "KL — Key Locker",
            X86Feature::WideKl => "WIDEKL — Wide Key Locker",
            X86Feature::Cmpccxadd => "CMPCCXADD — conditional add",
            X86Feature::RaoInt => "RAO-INT — Remote Atomic Operations",
            X86Feature::AmxTile => "AMX-TILE — tile architecture",
            X86Feature::AmxBf16 => "AMX-BF16 — bfloat16 tile ops",
            X86Feature::AmxInt8 => "AMX-INT8 — integer tile operations",
            X86Feature::AmxFp16 => "AMX-FP16 — FP16 tile operations",
            X86Feature::Xsave => "XSAVE/XRSTOR — extended state save/restore",
            X86Feature::Xsaveopt => "XSAVEOPT — optimized XSAVE",
            X86Feature::Xsavec => "XSAVEC — compacted XSAVE",
            X86Feature::Xsaves => "XSAVES — supervisor XSAVE",
            X86Feature::ThreeDNow => "3DNow! SIMD (AMD)",
            X86Feature::ThreeDNowA => "3DNow! extensions (AMD Athlon)",
            X86Feature::Slow3OpsLea => "Slow 3-operand LEA",
            X86Feature::SlowIncDec => "INC/DEC slower than ADD/SUB",
            X86Feature::SlowLea => "LEA has high latency",
            X86Feature::SlowPmulld => "PMULLD is slow",
            X86Feature::SlowShld => "SHLD/SHRD are slow",
            X86Feature::SlowUnalignedMem16 => "Slow 16-byte unaligned memory",
            X86Feature::SlowUnalignedMem32 => "Slow 32-byte unaligned memory",
            X86Feature::SlowDivide32 => "Slow 32-bit division",
            X86Feature::SlowDivide64 => "Slow 64-bit division",
            X86Feature::SoftFloat => "Software floating-point",
            X86Feature::Fast11ByteNop => "Fast 11-byte NOP padding",
            X86Feature::Fast15ByteNop => "Fast 15-byte NOP padding",
            X86Feature::FastBextr => "Fast BEXTR (single uop)",
            X86Feature::FastGather => "Fast gather instructions",
            X86Feature::FastHops => "Fast horizontal operations",
            X86Feature::FastLzcnt => "Fast LZCNT",
            X86Feature::FastScalarFsqrt => "Fast scalar FSQRT",
            X86Feature::FastScalarShiftMasks => "Fast scalar shift masks",
            X86Feature::FastShiftRotate => "Fast shift-and-rotate",
            X86Feature::FastVariableCrosslaneShuffle => "Fast variable cross-lane shuffle",
            X86Feature::FastVariablePerlaneShuffle => "Fast variable per-lane shuffle",
            X86Feature::AvoidLeaScale => "Avoid LEA scale factor",
            X86Feature::UseGlmul => "Use GLM for general multiplication",
            X86Feature::UseSlmul => "Use SLM for general multiplication",
            X86Feature::Prefer128Bit => "Prefer 128-bit vector width",
            X86Feature::Prefer256Bit => "Prefer 256-bit vector width",
            X86Feature::Prefer512Bit => "Prefer 512-bit vector width",
            X86Feature::PreferMaskRegisters => "Prefer mask register predicates",
            X86Feature::PreferNoGather => "Avoid gather instructions",
            X86Feature::PreferNoScatter => "Avoid scatter instructions",
            X86Feature::TuneSlow3OpsLea => "Tune for slow 3-operand LEA",
            X86Feature::OptForSize => "Optimize for code size",
            X86Feature::PadShortFunctions => "Pad short functions",
            X86Feature::AvoidPartialRegStall => "Avoid partial register stalls",
            X86Feature::UseIncDec => "Use INC/DEC instructions",
            X86Feature::UseSqrtEstimate => "Use SQRT estimate",
            X86Feature::UseRecipEstimate => "Use reciprocal estimate",
            X86Feature::UseDivEqDelay => "Insert delay after DIV",
            X86Feature::UseCmovBranch => "Convert branches to CMOV",
            X86Feature::UseBsr => "Use BSR instruction",
            X86Feature::LeaUsesAg => "LEA uses address-generation unit",
            X86Feature::LeaUsesAlu => "LEA uses ALU",
        }
    }

    /// Return all feature variants in a slice.
    pub fn all() -> &'static [X86Feature] {
        &[
            X86Feature::X87,
            X86Feature::Cmov,
            X86Feature::Mmx,
            X86Feature::Fxr,
            X86Feature::Nopl,
            X86Feature::Sahf,
            X86Feature::LahfSahf,
            X86Feature::Sse,
            X86Feature::Sse2,
            X86Feature::Sse3,
            X86Feature::Ssse3,
            X86Feature::Sse41,
            X86Feature::Sse42,
            X86Feature::Avx,
            X86Feature::Avx2,
            X86Feature::Avx512f,
            X86Feature::Avx512cd,
            X86Feature::Avx512er,
            X86Feature::Avx512pf,
            X86Feature::Avx512bw,
            X86Feature::Avx512dq,
            X86Feature::Avx512vl,
            X86Feature::Avx512vbmi,
            X86Feature::Avx512vbmi2,
            X86Feature::Avx512vnni,
            X86Feature::Avx512bitalg,
            X86Feature::Avx512vpopcntdq,
            X86Feature::Avx512fp16,
            X86Feature::Avx512bf16,
            X86Feature::Avx512ifma,
            X86Feature::Avx512vp2intersect,
            X86Feature::AvxVnni,
            X86Feature::AvxVnniInt8,
            X86Feature::AvxVnniInt16,
            X86Feature::AvxIfma,
            X86Feature::AvxNeConvert,
            X86Feature::Avx10_1_256,
            X86Feature::Avx10_1_512,
            X86Feature::Avx10_2,
            X86Feature::Fma,
            X86Feature::Fma4,
            X86Feature::F16c,
            X86Feature::Xop,
            X86Feature::Lwp,
            X86Feature::Bmi,
            X86Feature::Bmi2,
            X86Feature::Tbm,
            X86Feature::Lzcnt,
            X86Feature::Popcnt,
            X86Feature::Movbe,
            X86Feature::Rdrnd,
            X86Feature::Rdseed,
            X86Feature::Adx,
            X86Feature::Sha,
            X86Feature::Sha512,
            X86Feature::Sm3,
            X86Feature::Sm4,
            X86Feature::Aes,
            X86Feature::Pclmul,
            X86Feature::Vaes,
            X86Feature::Vpclmulqdq,
            X86Feature::Gfni,
            X86Feature::Clflushopt,
            X86Feature::Clwb,
            X86Feature::Clzero,
            X86Feature::Prfchw,
            X86Feature::Prefetchwt1,
            X86Feature::Prefetchi,
            X86Feature::Mwaitx,
            X86Feature::Wbnoinvd,
            X86Feature::Cldemote,
            X86Feature::Rdpid,
            X86Feature::Movdiri,
            X86Feature::Movdir64b,
            X86Feature::Invpcid,
            X86Feature::Invlpg,
            X86Feature::Ptwrite,
            X86Feature::Enqcmd,
            X86Feature::Serialize,
            X86Feature::Tsxldtrk,
            X86Feature::CetSs,
            X86Feature::Waitpkg,
            X86Feature::Pconfig,
            X86Feature::Sgx,
            X86Feature::Pku,
            X86Feature::Smap,
            X86Feature::Smep,
            X86Feature::Mpx,
            X86Feature::Rtm,
            X86Feature::Hle,
            X86Feature::Fsgsbase,
            X86Feature::Pt,
            X86Feature::Uintr,
            X86Feature::Hreset,
            X86Feature::Kl,
            X86Feature::WideKl,
            X86Feature::Cmpccxadd,
            X86Feature::RaoInt,
            X86Feature::AmxTile,
            X86Feature::AmxBf16,
            X86Feature::AmxInt8,
            X86Feature::AmxFp16,
            X86Feature::Xsave,
            X86Feature::Xsaveopt,
            X86Feature::Xsavec,
            X86Feature::Xsaves,
            X86Feature::ThreeDNow,
            X86Feature::ThreeDNowA,
            X86Feature::Slow3OpsLea,
            X86Feature::SlowIncDec,
            X86Feature::SlowLea,
            X86Feature::SlowPmulld,
            X86Feature::SlowShld,
            X86Feature::SlowUnalignedMem16,
            X86Feature::SlowUnalignedMem32,
            X86Feature::SlowDivide32,
            X86Feature::SlowDivide64,
            X86Feature::SoftFloat,
            X86Feature::Fast11ByteNop,
            X86Feature::Fast15ByteNop,
            X86Feature::FastBextr,
            X86Feature::FastGather,
            X86Feature::FastHops,
            X86Feature::FastLzcnt,
            X86Feature::FastScalarFsqrt,
            X86Feature::FastScalarShiftMasks,
            X86Feature::FastShiftRotate,
            X86Feature::FastVariableCrosslaneShuffle,
            X86Feature::FastVariablePerlaneShuffle,
            X86Feature::AvoidLeaScale,
            X86Feature::UseGlmul,
            X86Feature::UseSlmul,
            X86Feature::Prefer128Bit,
            X86Feature::Prefer256Bit,
            X86Feature::Prefer512Bit,
            X86Feature::PreferMaskRegisters,
            X86Feature::PreferNoGather,
            X86Feature::PreferNoScatter,
            X86Feature::TuneSlow3OpsLea,
            X86Feature::OptForSize,
            X86Feature::PadShortFunctions,
            X86Feature::AvoidPartialRegStall,
            X86Feature::UseIncDec,
            X86Feature::UseSqrtEstimate,
            X86Feature::UseRecipEstimate,
            X86Feature::UseDivEqDelay,
            X86Feature::UseCmovBranch,
            X86Feature::UseBsr,
            X86Feature::LeaUsesAg,
            X86Feature::LeaUsesAlu,
        ]
    }

    /// Look up a feature by its string name (case-insensitive).
    /// Returns `None` if the name is not recognised.
    pub fn from_name(name: &str) -> Option<X86Feature> {
        let normalized = normalise_feature_name_str(name);
        match normalized.as_str() {
            "x87" => Some(X86Feature::X87),
            "cmov" => Some(X86Feature::Cmov),
            "mmx" => Some(X86Feature::Mmx),
            "fxr" => Some(X86Feature::Fxr),
            "nopl" => Some(X86Feature::Nopl),
            "sahf" => Some(X86Feature::Sahf),
            "lahf_sahf" => Some(X86Feature::LahfSahf),
            "sse" => Some(X86Feature::Sse),
            "sse2" => Some(X86Feature::Sse2),
            "sse3" => Some(X86Feature::Sse3),
            "ssse3" => Some(X86Feature::Ssse3),
            "sse4.1" => Some(X86Feature::Sse41),
            "sse4.2" => Some(X86Feature::Sse42),
            "avx" => Some(X86Feature::Avx),
            "avx2" => Some(X86Feature::Avx2),
            "avx512f" => Some(X86Feature::Avx512f),
            "avx512cd" => Some(X86Feature::Avx512cd),
            "avx512er" => Some(X86Feature::Avx512er),
            "avx512pf" => Some(X86Feature::Avx512pf),
            "avx512bw" => Some(X86Feature::Avx512bw),
            "avx512dq" => Some(X86Feature::Avx512dq),
            "avx512vl" => Some(X86Feature::Avx512vl),
            "avx512vbmi" => Some(X86Feature::Avx512vbmi),
            "avx512vbmi2" => Some(X86Feature::Avx512vbmi2),
            "avx512vnni" => Some(X86Feature::Avx512vnni),
            "avx512bitalg" => Some(X86Feature::Avx512bitalg),
            "avx512vpopcntdq" => Some(X86Feature::Avx512vpopcntdq),
            "avx512fp16" => Some(X86Feature::Avx512fp16),
            "avx512bf16" => Some(X86Feature::Avx512bf16),
            "avx512ifma" => Some(X86Feature::Avx512ifma),
            "avx512vp2intersect" => Some(X86Feature::Avx512vp2intersect),
            "avx_vnni" => Some(X86Feature::AvxVnni),
            "avx_vnni_int8" => Some(X86Feature::AvxVnniInt8),
            "avx_vnni_int16" => Some(X86Feature::AvxVnniInt16),
            "avx_ifma" => Some(X86Feature::AvxIfma),
            "avx_ne_convert" => Some(X86Feature::AvxNeConvert),
            "avx10.1-256" => Some(X86Feature::Avx10_1_256),
            "avx10.1-512" => Some(X86Feature::Avx10_1_512),
            "avx10.2" => Some(X86Feature::Avx10_2),
            "fma" => Some(X86Feature::Fma),
            "fma4" => Some(X86Feature::Fma4),
            "f16c" => Some(X86Feature::F16c),
            "xop" => Some(X86Feature::Xop),
            "lwp" => Some(X86Feature::Lwp),
            "bmi" => Some(X86Feature::Bmi),
            "bmi2" => Some(X86Feature::Bmi2),
            "tbm" => Some(X86Feature::Tbm),
            "lzcnt" => Some(X86Feature::Lzcnt),
            "popcnt" => Some(X86Feature::Popcnt),
            "movbe" => Some(X86Feature::Movbe),
            "rdrnd" => Some(X86Feature::Rdrnd),
            "rdseed" => Some(X86Feature::Rdseed),
            "adx" => Some(X86Feature::Adx),
            "sha" => Some(X86Feature::Sha),
            "sha512" => Some(X86Feature::Sha512),
            "sm3" => Some(X86Feature::Sm3),
            "sm4" => Some(X86Feature::Sm4),
            "aes" => Some(X86Feature::Aes),
            "pclmul" => Some(X86Feature::Pclmul),
            "vaes" => Some(X86Feature::Vaes),
            "vpclmulqdq" => Some(X86Feature::Vpclmulqdq),
            "gfni" => Some(X86Feature::Gfni),
            "clflushopt" => Some(X86Feature::Clflushopt),
            "clwb" => Some(X86Feature::Clwb),
            "clzero" => Some(X86Feature::Clzero),
            "prfchw" => Some(X86Feature::Prfchw),
            "prefetchwt1" => Some(X86Feature::Prefetchwt1),
            "prefetchi" => Some(X86Feature::Prefetchi),
            "mwaitx" => Some(X86Feature::Mwaitx),
            "wbnoinvd" => Some(X86Feature::Wbnoinvd),
            "cldemote" => Some(X86Feature::Cldemote),
            "rdpid" => Some(X86Feature::Rdpid),
            "movdiri" => Some(X86Feature::Movdiri),
            "movdir64b" => Some(X86Feature::Movdir64b),
            "invpcid" => Some(X86Feature::Invpcid),
            "invlpg" => Some(X86Feature::Invlpg),
            "ptwrite" => Some(X86Feature::Ptwrite),
            "enqcmd" => Some(X86Feature::Enqcmd),
            "serialize" => Some(X86Feature::Serialize),
            "tsxldtrk" => Some(X86Feature::Tsxldtrk),
            "cet_ss" => Some(X86Feature::CetSs),
            "waitpkg" => Some(X86Feature::Waitpkg),
            "pconfig" => Some(X86Feature::Pconfig),
            "sgx" => Some(X86Feature::Sgx),
            "pku" => Some(X86Feature::Pku),
            "smap" => Some(X86Feature::Smap),
            "smep" => Some(X86Feature::Smep),
            "mpx" => Some(X86Feature::Mpx),
            "rtm" => Some(X86Feature::Rtm),
            "hle" => Some(X86Feature::Hle),
            "fsgsbase" => Some(X86Feature::Fsgsbase),
            "pt" => Some(X86Feature::Pt),
            "uintr" => Some(X86Feature::Uintr),
            "hreset" => Some(X86Feature::Hreset),
            "kl" => Some(X86Feature::Kl),
            "widekl" => Some(X86Feature::WideKl),
            "cmpccxadd" => Some(X86Feature::Cmpccxadd),
            "raoint" => Some(X86Feature::RaoInt),
            "amx_tile" => Some(X86Feature::AmxTile),
            "amx_bf16" => Some(X86Feature::AmxBf16),
            "amx_int8" => Some(X86Feature::AmxInt8),
            "amx_fp16" => Some(X86Feature::AmxFp16),
            "xsave" => Some(X86Feature::Xsave),
            "xsaveopt" => Some(X86Feature::Xsaveopt),
            "xsavec" => Some(X86Feature::Xsavec),
            "xsaves" => Some(X86Feature::Xsaves),
            "3dnow" => Some(X86Feature::ThreeDNow),
            "3dnowa" => Some(X86Feature::ThreeDNowA),
            "slow_3ops_lea" => Some(X86Feature::Slow3OpsLea),
            "slow_incdec" => Some(X86Feature::SlowIncDec),
            "slow_lea" => Some(X86Feature::SlowLea),
            "slow_pmulld" => Some(X86Feature::SlowPmulld),
            "slow_shld" => Some(X86Feature::SlowShld),
            "slow_unaligned_mem_16" => Some(X86Feature::SlowUnalignedMem16),
            "slow_unaligned_mem_32" => Some(X86Feature::SlowUnalignedMem32),
            "slow_divide_32" => Some(X86Feature::SlowDivide32),
            "slow_divide_64" => Some(X86Feature::SlowDivide64),
            "soft_float" => Some(X86Feature::SoftFloat),
            "fast_11bytenop" => Some(X86Feature::Fast11ByteNop),
            "fast_15bytenop" => Some(X86Feature::Fast15ByteNop),
            "fast_bextr" => Some(X86Feature::FastBextr),
            "fast_gather" => Some(X86Feature::FastGather),
            "fast_hops" => Some(X86Feature::FastHops),
            "fast_lzcnt" => Some(X86Feature::FastLzcnt),
            "fast_scalar_fsqrt" => Some(X86Feature::FastScalarFsqrt),
            "fast_scalar_shift_masks" => Some(X86Feature::FastScalarShiftMasks),
            "fast_shift_rotate" => Some(X86Feature::FastShiftRotate),
            "fast_variable_crosslane_shuffle" => Some(X86Feature::FastVariableCrosslaneShuffle),
            "fast_variable_perlane_shuffle" => Some(X86Feature::FastVariablePerlaneShuffle),
            "avoid_lea_scale" => Some(X86Feature::AvoidLeaScale),
            "use_glmul" => Some(X86Feature::UseGlmul),
            "use_slmul" => Some(X86Feature::UseSlmul),
            "prefer_128_bit" => Some(X86Feature::Prefer128Bit),
            "prefer_256_bit" => Some(X86Feature::Prefer256Bit),
            "prefer_512_bit" => Some(X86Feature::Prefer512Bit),
            "prefer_mask_registers" => Some(X86Feature::PreferMaskRegisters),
            "prefer_no_gather" => Some(X86Feature::PreferNoGather),
            "prefer_no_scatter" => Some(X86Feature::PreferNoScatter),
            "tune_slow_3ops_lea" => Some(X86Feature::TuneSlow3OpsLea),
            "opt_for_size" => Some(X86Feature::OptForSize),
            "pad_short_functions" => Some(X86Feature::PadShortFunctions),
            "avoid_partial_reg_stall" => Some(X86Feature::AvoidPartialRegStall),
            "use_incdec" => Some(X86Feature::UseIncDec),
            "use_sqrt_estimate" => Some(X86Feature::UseSqrtEstimate),
            "use_recip_estimate" => Some(X86Feature::UseRecipEstimate),
            "use_div_eq_delay" => Some(X86Feature::UseDivEqDelay),
            "use_cmov_branch" => Some(X86Feature::UseCmovBranch),
            "use_bsr" => Some(X86Feature::UseBsr),
            "lea_uses_ag" => Some(X86Feature::LeaUsesAg),
            "lea_uses_alu" => Some(X86Feature::LeaUsesAlu),
            _ => None,
        }
    }

    /// Return all ISA-extension features (those that enable new instructions).
    pub fn isa_extensions() -> &'static [X86Feature] {
        &[
            X86Feature::X87,
            X86Feature::Cmov,
            X86Feature::Mmx,
            X86Feature::Sse,
            X86Feature::Sse2,
            X86Feature::Sse3,
            X86Feature::Ssse3,
            X86Feature::Sse41,
            X86Feature::Sse42,
            X86Feature::Avx,
            X86Feature::Avx2,
            X86Feature::Avx512f,
            X86Feature::Avx512cd,
            X86Feature::Avx512er,
            X86Feature::Avx512pf,
            X86Feature::Avx512bw,
            X86Feature::Avx512dq,
            X86Feature::Avx512vl,
            X86Feature::Avx512vbmi,
            X86Feature::Avx512vbmi2,
            X86Feature::Avx512vnni,
            X86Feature::Avx512bitalg,
            X86Feature::Avx512vpopcntdq,
            X86Feature::Avx512fp16,
            X86Feature::Avx512bf16,
            X86Feature::Avx512ifma,
            X86Feature::Avx512vp2intersect,
            X86Feature::AvxVnni,
            X86Feature::AvxVnniInt8,
            X86Feature::AvxVnniInt16,
            X86Feature::AvxIfma,
            X86Feature::AvxNeConvert,
            X86Feature::Avx10_1_256,
            X86Feature::Avx10_1_512,
            X86Feature::Avx10_2,
            X86Feature::Fma,
            X86Feature::Fma4,
            X86Feature::F16c,
            X86Feature::Xop,
            X86Feature::Lwp,
            X86Feature::Bmi,
            X86Feature::Bmi2,
            X86Feature::Tbm,
            X86Feature::Lzcnt,
            X86Feature::Popcnt,
            X86Feature::Movbe,
            X86Feature::Rdrnd,
            X86Feature::Rdseed,
            X86Feature::Adx,
            X86Feature::Sha,
            X86Feature::Sha512,
            X86Feature::Sm3,
            X86Feature::Sm4,
            X86Feature::Aes,
            X86Feature::Pclmul,
            X86Feature::Vaes,
            X86Feature::Vpclmulqdq,
            X86Feature::Gfni,
            X86Feature::Clflushopt,
            X86Feature::Clwb,
            X86Feature::Clzero,
            X86Feature::Prfchw,
            X86Feature::Prefetchwt1,
            X86Feature::Prefetchi,
            X86Feature::Mwaitx,
            X86Feature::Wbnoinvd,
            X86Feature::Cldemote,
            X86Feature::Rdpid,
            X86Feature::Movdiri,
            X86Feature::Movdir64b,
            X86Feature::Invpcid,
            X86Feature::Invlpg,
            X86Feature::Ptwrite,
            X86Feature::Enqcmd,
            X86Feature::Serialize,
            X86Feature::Tsxldtrk,
            X86Feature::CetSs,
            X86Feature::Waitpkg,
            X86Feature::Pconfig,
            X86Feature::Sgx,
            X86Feature::Pku,
            X86Feature::Smap,
            X86Feature::Smep,
            X86Feature::Mpx,
            X86Feature::Rtm,
            X86Feature::Hle,
            X86Feature::Fsgsbase,
            X86Feature::Pt,
            X86Feature::Uintr,
            X86Feature::Hreset,
            X86Feature::Kl,
            X86Feature::WideKl,
            X86Feature::Cmpccxadd,
            X86Feature::RaoInt,
            X86Feature::AmxTile,
            X86Feature::AmxBf16,
            X86Feature::AmxInt8,
            X86Feature::AmxFp16,
            X86Feature::ThreeDNow,
            X86Feature::ThreeDNowA,
        ]
    }

    /// Return all tuning/microarchitectural features.
    pub fn tuning_features() -> &'static [X86Feature] {
        &[
            X86Feature::Slow3OpsLea,
            X86Feature::SlowIncDec,
            X86Feature::SlowLea,
            X86Feature::SlowPmulld,
            X86Feature::SlowShld,
            X86Feature::SlowUnalignedMem16,
            X86Feature::SlowUnalignedMem32,
            X86Feature::SlowDivide32,
            X86Feature::SlowDivide64,
            X86Feature::SoftFloat,
            X86Feature::Fast11ByteNop,
            X86Feature::Fast15ByteNop,
            X86Feature::FastBextr,
            X86Feature::FastGather,
            X86Feature::FastHops,
            X86Feature::FastLzcnt,
            X86Feature::FastScalarFsqrt,
            X86Feature::FastScalarShiftMasks,
            X86Feature::FastShiftRotate,
            X86Feature::FastVariableCrosslaneShuffle,
            X86Feature::FastVariablePerlaneShuffle,
            X86Feature::AvoidLeaScale,
            X86Feature::UseGlmul,
            X86Feature::UseSlmul,
            X86Feature::Prefer128Bit,
            X86Feature::Prefer256Bit,
            X86Feature::Prefer512Bit,
            X86Feature::PreferMaskRegisters,
            X86Feature::PreferNoGather,
            X86Feature::PreferNoScatter,
            X86Feature::TuneSlow3OpsLea,
            X86Feature::OptForSize,
            X86Feature::PadShortFunctions,
            X86Feature::AvoidPartialRegStall,
            X86Feature::UseIncDec,
            X86Feature::UseSqrtEstimate,
            X86Feature::UseRecipEstimate,
            X86Feature::UseDivEqDelay,
            X86Feature::UseCmovBranch,
            X86Feature::UseBsr,
            X86Feature::LeaUsesAg,
            X86Feature::LeaUsesAlu,
        ]
    }
}

// ============================================================================
// X86ProcFamily — processor family / microarchitecture classification
// ============================================================================

/// Processor family classification for dispatch and optimisation decisions.
///
/// Maps each CPU model to its microarchitecture family, enabling the compiler
/// to select appropriate tuning flags, feature sets, and scheduling models.
#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub enum X86ProcFamily {
    // ── Intel legacy ────────────────────────────────────────────────────
    /// Intel 80386 (no CMOV, no MMX).
    I386,
    /// Intel 80486.
    I486,
    /// Intel Pentium (P5 microarchitecture).
    I586,
    /// Intel Pentium Pro / Pentium II / Pentium III (P6 core).
    P6,
    /// Intel Pentium M (Banias/Dothan, enhanced P6).
    PentiumM,
    /// Intel Pentium 4 / Pentium D (NetBurst).
    NetBurst,
    /// Intel Core 2 (Merom/Conroe/Wolfdale) and Penryn.
    Core2,
    /// Intel Nehalem (1st gen Core i).
    Nehalem,
    /// Intel Westmere (Nehalem shrink + AES).
    Westmere,
    /// Intel Sandy Bridge (2nd gen Core).
    SandyBridge,
    /// Intel Ivy Bridge (3rd gen Core).
    IvyBridge,
    /// Intel Haswell (4th gen Core).
    Haswell,
    /// Intel Broadwell (5th gen Core).
    Broadwell,
    /// Intel Skylake (6th gen Core, client).
    Skylake,
    /// Intel Skylake-SP / Skylake-X (server, AVX-512).
    SkylakeServer,
    /// Intel Cascade Lake (Skylake-SP refresh).
    CascadeLake,
    /// Intel Cooper Lake (Cascade Lake + BF16).
    CooperLake,
    /// Intel Cannon Lake (10nm, limited release).
    CannonLake,
    /// Intel Ice Lake (10th gen, Sunny Cove).
    IceLake,
    /// Intel Ice Lake Server.
    IceLakeServer,
    /// Intel Tiger Lake (11th gen, Willow Cove).
    TigerLake,
    /// Intel Rocket Lake (14nm backport, Cypress Cove).
    RocketLake,
    /// Intel Alder Lake (12th gen, Golden Cove + Gracemont).
    AlderLake,
    /// Intel Raptor Lake (13th gen, Raptor Cove + Gracemont refresh).
    RaptorLake,
    /// Intel Meteor Lake (14th gen, Redwood Cove + Crestmont).
    MeteorLake,
    /// Intel Arrow Lake (Lion Cove + Skymont).
    ArrowLake,
    /// Intel Lunar Lake (Lion Cove + Skymont, ultra-mobile).
    LunarLake,
    /// Intel Sapphire Rapids (4th gen Xeon, Golden Cove server).
    SapphireRapids,
    /// Intel Emerald Rapids (5th gen Xeon, Raptor Cove server).
    EmeraldRapids,
    /// Intel Granite Rapids (6th gen Xeon, Redwood Cove / Crestmont).
    GraniteRapids,
    /// Intel Sierra Forest (Sierra Glen E-core Xeon, 2024).
    SierraForest,
    /// Intel Clearwater Forest (Darkmont E-core Xeon, 2025).
    ClearwaterForest,

    // ── Intel Atom / small core ─────────────────────────────────────────
    /// Intel Atom (Bonnell microarchitecture).
    Bonnell,
    /// Intel Silvermont (22nm Atom, Bay Trail).
    Silvermont,
    /// Intel Goldmont (14nm Atom, Apollo Lake).
    Goldmont,
    /// Intel Goldmont Plus (Gemini Lake).
    GoldmontPlus,
    /// Intel Tremont (10nm Atom, Lakefield / Jasper Lake).
    Tremont,
    /// Intel Gracemont (Intel 7 E-core, Alder Lake / Raptor Lake).
    Gracemont,
    /// Intel Crestmont (Intel 4 E-core, Meteor Lake).
    Crestmont,

    // ── Intel Xeon Phi ──────────────────────────────────────────────────
    /// Intel Knights Landing (Xeon Phi 2nd gen).
    KnightsLanding,
    /// Intel Knights Mill (Xeon Phi 3rd gen).
    KnightsMill,

    // ── AMD legacy ──────────────────────────────────────────────────────
    /// AMD K6.
    K6,
    /// AMD K6-2 (3DNow!).
    K62,
    /// AMD K6-III.
    K63,
    /// AMD Athlon (K7), Athlon Thunderbird, Athlon XP/MP.
    K7,
    /// AMD Athlon 4 (mobile K7).
    Athlon4,
    /// AMD K8 (Athlon 64, Opteron).
    K8,
    /// AMD K8 with SSE3.
    K8Sse3,
    /// AMD K10 (Barcelona, Shanghai, Istanbul — Family 10h).
    K10,

    // ── AMD small core ──────────────────────────────────────────────────
    /// AMD Bobcat (Family 14h).
    Bobcat,
    /// AMD Jaguar (Family 16h).
    Jaguar,

    // ── AMD Bulldozer family ────────────────────────────────────────────
    /// AMD Bulldozer (Family 15h, 1st gen).
    Bulldozer,
    /// AMD Piledriver (Family 15h, 2nd gen).
    Piledriver,
    /// AMD Steamroller (Family 15h, 3rd gen).
    Steamroller,
    /// AMD Excavator (Family 15h, 4th gen).
    Excavator,

    // ── AMD Zen family ──────────────────────────────────────────────────
    /// AMD Zen 1 (Ryzen 1000-series, Naples / Summit Ridge).
    Zen1,
    /// AMD Zen 2 (Ryzen 3000-series, Rome / Matisse).
    Zen2,
    /// AMD Zen 3 (Ryzen 5000-series, Milan / Vermeer).
    Zen3,
    /// AMD Zen 4 (Ryzen 7000-series, Genoa / Raphael).
    Zen4,
    /// AMD Zen 5 (Ryzen 9000-series, Turin / Granite Ridge).
    Zen5,

    // ── VIA / Zhaoxin ───────────────────────────────────────────────────
    /// VIA C3 (Nehemiah).
    C3,
    /// VIA C3-2.
    C32,
    /// VIA C7 (Esther).
    C7,
    /// VIA Nano (Isaiah).
    Nano,
    /// AMD Geode (embedded).
    Geode,
    /// WinChip C6 (IDT).
    WinchipC6,
    /// WinChip 2 (IDT).
    Winchip2,
}

impl X86ProcFamily {
    /// Return the display name for this processor family.
    pub fn name(self) -> &'static str {
        match self {
            X86ProcFamily::I386 => "Intel 80386",
            X86ProcFamily::I486 => "Intel 80486",
            X86ProcFamily::I586 => "Intel Pentium (P5)",
            X86ProcFamily::P6 => "Intel P6 (Pentium Pro/II/III)",
            X86ProcFamily::PentiumM => "Intel Pentium M (Banias/Dothan)",
            X86ProcFamily::NetBurst => "Intel NetBurst (Pentium 4/D)",
            X86ProcFamily::Core2 => "Intel Core 2 / Penryn",
            X86ProcFamily::Nehalem => "Intel Nehalem",
            X86ProcFamily::Westmere => "Intel Westmere",
            X86ProcFamily::SandyBridge => "Intel Sandy Bridge",
            X86ProcFamily::IvyBridge => "Intel Ivy Bridge",
            X86ProcFamily::Haswell => "Intel Haswell",
            X86ProcFamily::Broadwell => "Intel Broadwell",
            X86ProcFamily::Skylake => "Intel Skylake (client)",
            X86ProcFamily::SkylakeServer => "Intel Skylake-SP (server)",
            X86ProcFamily::CascadeLake => "Intel Cascade Lake",
            X86ProcFamily::CooperLake => "Intel Cooper Lake",
            X86ProcFamily::CannonLake => "Intel Cannon Lake",
            X86ProcFamily::IceLake => "Intel Ice Lake (client)",
            X86ProcFamily::IceLakeServer => "Intel Ice Lake (server)",
            X86ProcFamily::TigerLake => "Intel Tiger Lake",
            X86ProcFamily::RocketLake => "Intel Rocket Lake",
            X86ProcFamily::AlderLake => "Intel Alder Lake",
            X86ProcFamily::RaptorLake => "Intel Raptor Lake",
            X86ProcFamily::MeteorLake => "Intel Meteor Lake",
            X86ProcFamily::ArrowLake => "Intel Arrow Lake",
            X86ProcFamily::LunarLake => "Intel Lunar Lake",
            X86ProcFamily::SapphireRapids => "Intel Sapphire Rapids",
            X86ProcFamily::EmeraldRapids => "Intel Emerald Rapids",
            X86ProcFamily::GraniteRapids => "Intel Granite Rapids",
            X86ProcFamily::SierraForest => "Intel Sierra Forest",
            X86ProcFamily::ClearwaterForest => "Intel Clearwater Forest",
            X86ProcFamily::Bonnell => "Intel Bonnell (Atom)",
            X86ProcFamily::Silvermont => "Intel Silvermont",
            X86ProcFamily::Goldmont => "Intel Goldmont",
            X86ProcFamily::GoldmontPlus => "Intel Goldmont Plus",
            X86ProcFamily::Tremont => "Intel Tremont",
            X86ProcFamily::Gracemont => "Intel Gracemont",
            X86ProcFamily::Crestmont => "Intel Crestmont",
            X86ProcFamily::KnightsLanding => "Intel Knights Landing (Xeon Phi)",
            X86ProcFamily::KnightsMill => "Intel Knights Mill (Xeon Phi)",
            X86ProcFamily::K6 => "AMD K6",
            X86ProcFamily::K62 => "AMD K6-2",
            X86ProcFamily::K63 => "AMD K6-III",
            X86ProcFamily::K7 => "AMD K7 (Athlon)",
            X86ProcFamily::Athlon4 => "AMD Athlon 4",
            X86ProcFamily::K8 => "AMD K8 (Athlon 64 / Opteron)",
            X86ProcFamily::K8Sse3 => "AMD K8 with SSE3",
            X86ProcFamily::K10 => "AMD K10 (Family 10h)",
            X86ProcFamily::Bobcat => "AMD Bobcat (Family 14h)",
            X86ProcFamily::Jaguar => "AMD Jaguar (Family 16h)",
            X86ProcFamily::Bulldozer => "AMD Bulldozer",
            X86ProcFamily::Piledriver => "AMD Piledriver",
            X86ProcFamily::Steamroller => "AMD Steamroller",
            X86ProcFamily::Excavator => "AMD Excavator",
            X86ProcFamily::Zen1 => "AMD Zen 1",
            X86ProcFamily::Zen2 => "AMD Zen 2",
            X86ProcFamily::Zen3 => "AMD Zen 3",
            X86ProcFamily::Zen4 => "AMD Zen 4",
            X86ProcFamily::Zen5 => "AMD Zen 5",
            X86ProcFamily::C3 => "VIA C3 (Nehemiah)",
            X86ProcFamily::C32 => "VIA C3-2",
            X86ProcFamily::C7 => "VIA C7 (Esther)",
            X86ProcFamily::Nano => "VIA Nano (Isaiah)",
            X86ProcFamily::Geode => "AMD Geode",
            X86ProcFamily::WinchipC6 => "IDT WinChip C6",
            X86ProcFamily::Winchip2 => "IDT WinChip 2",
        }
    }

    /// Returns the vendor for this processor family.
    pub fn vendor(self) -> &'static str {
        match self {
            X86ProcFamily::I386
            | X86ProcFamily::I486
            | X86ProcFamily::I586
            | X86ProcFamily::P6
            | X86ProcFamily::PentiumM
            | X86ProcFamily::NetBurst
            | X86ProcFamily::Core2
            | X86ProcFamily::Nehalem
            | X86ProcFamily::Westmere
            | X86ProcFamily::SandyBridge
            | X86ProcFamily::IvyBridge
            | X86ProcFamily::Haswell
            | X86ProcFamily::Broadwell
            | X86ProcFamily::Skylake
            | X86ProcFamily::SkylakeServer
            | X86ProcFamily::CascadeLake
            | X86ProcFamily::CooperLake
            | X86ProcFamily::CannonLake
            | X86ProcFamily::IceLake
            | X86ProcFamily::IceLakeServer
            | X86ProcFamily::TigerLake
            | X86ProcFamily::RocketLake
            | X86ProcFamily::AlderLake
            | X86ProcFamily::RaptorLake
            | X86ProcFamily::MeteorLake
            | X86ProcFamily::ArrowLake
            | X86ProcFamily::LunarLake
            | X86ProcFamily::SapphireRapids
            | X86ProcFamily::EmeraldRapids
            | X86ProcFamily::GraniteRapids
            | X86ProcFamily::SierraForest
            | X86ProcFamily::ClearwaterForest
            | X86ProcFamily::Bonnell
            | X86ProcFamily::Silvermont
            | X86ProcFamily::Goldmont
            | X86ProcFamily::GoldmontPlus
            | X86ProcFamily::Tremont
            | X86ProcFamily::Gracemont
            | X86ProcFamily::Crestmont
            | X86ProcFamily::KnightsLanding
            | X86ProcFamily::KnightsMill => "Intel",
            X86ProcFamily::K6
            | X86ProcFamily::K62
            | X86ProcFamily::K63
            | X86ProcFamily::K7
            | X86ProcFamily::Athlon4
            | X86ProcFamily::K8
            | X86ProcFamily::K8Sse3
            | X86ProcFamily::K10
            | X86ProcFamily::Bobcat
            | X86ProcFamily::Jaguar
            | X86ProcFamily::Bulldozer
            | X86ProcFamily::Piledriver
            | X86ProcFamily::Steamroller
            | X86ProcFamily::Excavator
            | X86ProcFamily::Zen1
            | X86ProcFamily::Zen2
            | X86ProcFamily::Zen3
            | X86ProcFamily::Zen4
            | X86ProcFamily::Zen5
            | X86ProcFamily::Geode => "AMD",
            X86ProcFamily::C3 | X86ProcFamily::C32 | X86ProcFamily::C7 | X86ProcFamily::Nano => {
                "VIA"
            }
            X86ProcFamily::WinchipC6 | X86ProcFamily::Winchip2 => "IDT",
        }
    }

    /// Returns whether this is a hybrid architecture (P-core + E-core).
    pub fn is_hybrid(self) -> bool {
        matches!(
            self,
            X86ProcFamily::AlderLake
                | X86ProcFamily::RaptorLake
                | X86ProcFamily::MeteorLake
                | X86ProcFamily::ArrowLake
                | X86ProcFamily::LunarLake
                | X86ProcFamily::GraniteRapids
        )
    }

    /// Returns whether this is an E-core only family.
    pub fn is_ecore_only(self) -> bool {
        matches!(
            self,
            X86ProcFamily::SierraForest | X86ProcFamily::ClearwaterForest
        )
    }

    /// Returns whether this is a high-performance core (big core / P-core).
    pub fn is_big_core(self) -> bool {
        matches!(
            self,
            X86ProcFamily::P6
                | X86ProcFamily::Core2
                | X86ProcFamily::Nehalem
                | X86ProcFamily::Westmere
                | X86ProcFamily::SandyBridge
                | X86ProcFamily::IvyBridge
                | X86ProcFamily::Haswell
                | X86ProcFamily::Broadwell
                | X86ProcFamily::Skylake
                | X86ProcFamily::SkylakeServer
                | X86ProcFamily::CascadeLake
                | X86ProcFamily::CooperLake
                | X86ProcFamily::CannonLake
                | X86ProcFamily::IceLake
                | X86ProcFamily::IceLakeServer
                | X86ProcFamily::TigerLake
                | X86ProcFamily::RocketLake
                | X86ProcFamily::SapphireRapids
                | X86ProcFamily::EmeraldRapids
                | X86ProcFamily::GraniteRapids
                | X86ProcFamily::Zen1
                | X86ProcFamily::Zen2
                | X86ProcFamily::Zen3
                | X86ProcFamily::Zen4
                | X86ProcFamily::Zen5
        )
    }

    /// Returns whether this is a small/efficient core.
    pub fn is_small_core(self) -> bool {
        matches!(
            self,
            X86ProcFamily::Bonnell
                | X86ProcFamily::Silvermont
                | X86ProcFamily::Goldmont
                | X86ProcFamily::GoldmontPlus
                | X86ProcFamily::Tremont
                | X86ProcFamily::Gracemont
                | X86ProcFamily::Crestmont
                | X86ProcFamily::Bobcat
                | X86ProcFamily::Jaguar
        )
    }
}

// ============================================================================
// X86SchedModelInfo — per-CPU scheduling model metadata
// ============================================================================

/// Scheduling model metadata for a specific CPU microarchitecture.
///
/// Describes the hardware execution resources available for instruction
/// scheduling: dispatch width, issue width, reorder buffer size, load/store
/// buffers, and the scheduling model category.
#[derive(Debug, Clone)]
pub struct X86SchedModelInfo {
    /// Human-readable name for this scheduling model.
    pub name: &'static str,
    /// Maximum number of uops dispatched per cycle.
    pub dispatch_width: u32,
    /// Maximum number of uops issued per cycle (may differ from dispatch).
    pub issue_width: u32,
    /// Maximum number of uops retired per cycle.
    pub retire_width: u32,
    /// Reorder buffer size (entries).
    pub rob_size: u32,
    /// Load buffer entries.
    pub load_buffer_size: u32,
    /// Store buffer entries.
    pub store_buffer_size: u32,
    /// Whether the CPU is out-of-order.
    pub out_of_order: bool,
    /// L1 instruction cache size in KB.
    pub l1i_cache_kb: u32,
    /// L1 data cache size in KB.
    pub l1d_cache_kb: u32,
    /// L2 cache size in KB.
    pub l2_cache_kb: u32,
    /// L3 cache size in KB (0 if none).
    pub l3_cache_kb: u32,
}

impl X86SchedModelInfo {
    /// Get the scheduling model info for a given processor family.
    pub fn for_family(family: X86ProcFamily) -> X86SchedModelInfo {
        match family {
            X86ProcFamily::I386 | X86ProcFamily::I486 | X86ProcFamily::I586 => X86SchedModelInfo {
                name: "i386/i486/i586 — in-order scalar",
                dispatch_width: 1,
                issue_width: 1,
                retire_width: 1,
                rob_size: 0,
                load_buffer_size: 4,
                store_buffer_size: 4,
                out_of_order: false,
                l1i_cache_kb: 8,
                l1d_cache_kb: 8,
                l2_cache_kb: 0,
                l3_cache_kb: 0,
            },
            X86ProcFamily::P6 => X86SchedModelInfo {
                name: "P6 (Pentium Pro/II/III) — 3-wide OoO",
                dispatch_width: 3,
                issue_width: 5,
                retire_width: 3,
                rob_size: 40,
                load_buffer_size: 16,
                store_buffer_size: 12,
                out_of_order: true,
                l1i_cache_kb: 16,
                l1d_cache_kb: 16,
                l2_cache_kb: 512,
                l3_cache_kb: 0,
            },
            X86ProcFamily::PentiumM => X86SchedModelInfo {
                name: "Pentium M (Banias/Dothan) — 3-wide OoO",
                dispatch_width: 3,
                issue_width: 5,
                retire_width: 3,
                rob_size: 40,
                load_buffer_size: 16,
                store_buffer_size: 12,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 32,
                l2_cache_kb: 2048,
                l3_cache_kb: 0,
            },
            X86ProcFamily::NetBurst => X86SchedModelInfo {
                name: "NetBurst (Pentium 4/D) — 3-wide OoO, trace cache",
                dispatch_width: 3,
                issue_width: 4,
                retire_width: 3,
                rob_size: 126,
                load_buffer_size: 48,
                store_buffer_size: 32,
                out_of_order: true,
                l1i_cache_kb: 0,
                l1d_cache_kb: 16,
                l2_cache_kb: 1024,
                l3_cache_kb: 0,
            },
            X86ProcFamily::Core2 => X86SchedModelInfo {
                name: "Core 2 — 4-wide OoO, macro-fusion",
                dispatch_width: 4,
                issue_width: 5,
                retire_width: 4,
                rob_size: 96,
                load_buffer_size: 32,
                store_buffer_size: 20,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 32,
                l2_cache_kb: 6144,
                l3_cache_kb: 0,
            },
            X86ProcFamily::Nehalem | X86ProcFamily::Westmere => X86SchedModelInfo {
                name: "Nehalem/Westmere — 4-wide OoO",
                dispatch_width: 4,
                issue_width: 6,
                retire_width: 4,
                rob_size: 128,
                load_buffer_size: 48,
                store_buffer_size: 32,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 32,
                l2_cache_kb: 256,
                l3_cache_kb: 8192,
            },
            X86ProcFamily::SandyBridge | X86ProcFamily::IvyBridge => X86SchedModelInfo {
                name: "Sandy Bridge / Ivy Bridge — 4-wide OoO, uop cache",
                dispatch_width: 4,
                issue_width: 6,
                retire_width: 4,
                rob_size: 168,
                load_buffer_size: 64,
                store_buffer_size: 36,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 32,
                l2_cache_kb: 256,
                l3_cache_kb: 8192,
            },
            X86ProcFamily::Haswell | X86ProcFamily::Broadwell => X86SchedModelInfo {
                name: "Haswell/Broadwell — 4-wide OoO, 8 ports",
                dispatch_width: 4,
                issue_width: 8,
                retire_width: 4,
                rob_size: 192,
                load_buffer_size: 72,
                store_buffer_size: 42,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 32,
                l2_cache_kb: 256,
                l3_cache_kb: 8192,
            },
            X86ProcFamily::Skylake => X86SchedModelInfo {
                name: "Skylake (client) — 4-wide OoO, 8 ports, improved uop cache",
                dispatch_width: 4,
                issue_width: 8,
                retire_width: 4,
                rob_size: 224,
                load_buffer_size: 72,
                store_buffer_size: 56,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 32,
                l2_cache_kb: 256,
                l3_cache_kb: 8192,
            },
            X86ProcFamily::SkylakeServer
            | X86ProcFamily::CascadeLake
            | X86ProcFamily::CooperLake => X86SchedModelInfo {
                name: "Skylake-SP / Cascade Lake / Cooper Lake — server, AVX-512",
                dispatch_width: 4,
                issue_width: 8,
                retire_width: 4,
                rob_size: 224,
                load_buffer_size: 72,
                store_buffer_size: 56,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 32,
                l2_cache_kb: 1024,
                l3_cache_kb: 16384,
            },
            X86ProcFamily::CannonLake => X86SchedModelInfo {
                name: "Cannon Lake — 10nm, 4-wide OoO",
                dispatch_width: 4,
                issue_width: 10,
                retire_width: 4,
                rob_size: 224,
                load_buffer_size: 72,
                store_buffer_size: 56,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 32,
                l2_cache_kb: 256,
                l3_cache_kb: 2048,
            },
            X86ProcFamily::IceLake | X86ProcFamily::IceLakeServer => X86SchedModelInfo {
                name: "Ice Lake (Sunny Cove) — 5-wide OoO, 10 ports",
                dispatch_width: 5,
                issue_width: 10,
                retire_width: 5,
                rob_size: 352,
                load_buffer_size: 128,
                store_buffer_size: 72,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 48,
                l2_cache_kb: 512,
                l3_cache_kb: 12288,
            },
            X86ProcFamily::TigerLake => X86SchedModelInfo {
                name: "Tiger Lake (Willow Cove) — 5-wide OoO, 10 ports",
                dispatch_width: 5,
                issue_width: 10,
                retire_width: 5,
                rob_size: 352,
                load_buffer_size: 128,
                store_buffer_size: 72,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 48,
                l2_cache_kb: 1280,
                l3_cache_kb: 12288,
            },
            X86ProcFamily::RocketLake => X86SchedModelInfo {
                name: "Rocket Lake (Cypress Cove) — 5-wide OoO, 10 ports",
                dispatch_width: 5,
                issue_width: 10,
                retire_width: 5,
                rob_size: 352,
                load_buffer_size: 128,
                store_buffer_size: 72,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 48,
                l2_cache_kb: 512,
                l3_cache_kb: 16384,
            },
            X86ProcFamily::AlderLake | X86ProcFamily::RaptorLake => X86SchedModelInfo {
                name: "Alder Lake / Raptor Lake (Golden Cove) — 6-wide OoO, 12 ports",
                dispatch_width: 6,
                issue_width: 12,
                retire_width: 6,
                rob_size: 512,
                load_buffer_size: 192,
                store_buffer_size: 114,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 48,
                l2_cache_kb: 1280,
                l3_cache_kb: 30720,
            },
            X86ProcFamily::MeteorLake => X86SchedModelInfo {
                name: "Meteor Lake (Redwood Cove) — 6-wide OoO",
                dispatch_width: 6,
                issue_width: 12,
                retire_width: 6,
                rob_size: 512,
                load_buffer_size: 192,
                store_buffer_size: 114,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 48,
                l2_cache_kb: 2048,
                l3_cache_kb: 24576,
            },
            X86ProcFamily::ArrowLake => X86SchedModelInfo {
                name: "Arrow Lake (Lion Cove) — 8-wide OoO",
                dispatch_width: 8,
                issue_width: 12,
                retire_width: 8,
                rob_size: 576,
                load_buffer_size: 192,
                store_buffer_size: 114,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 48,
                l2_cache_kb: 3072,
                l3_cache_kb: 36864,
            },
            X86ProcFamily::LunarLake => X86SchedModelInfo {
                name: "Lunar Lake (Lion Cove) — 8-wide OoO",
                dispatch_width: 8,
                issue_width: 12,
                retire_width: 8,
                rob_size: 576,
                load_buffer_size: 192,
                store_buffer_size: 114,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 48,
                l2_cache_kb: 2560,
                l3_cache_kb: 12288,
            },
            X86ProcFamily::SapphireRapids | X86ProcFamily::EmeraldRapids => X86SchedModelInfo {
                name: "Sapphire Rapids / Emerald Rapids — 6-wide OoO, AVX-512",
                dispatch_width: 6,
                issue_width: 12,
                retire_width: 6,
                rob_size: 512,
                load_buffer_size: 192,
                store_buffer_size: 114,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 48,
                l2_cache_kb: 2048,
                l3_cache_kb: 61440,
            },
            X86ProcFamily::GraniteRapids => X86SchedModelInfo {
                name: "Granite Rapids (Redwood Cove) — 6-wide OoO, AMX",
                dispatch_width: 6,
                issue_width: 12,
                retire_width: 6,
                rob_size: 512,
                load_buffer_size: 192,
                store_buffer_size: 114,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 48,
                l2_cache_kb: 2048,
                l3_cache_kb: 61440,
            },
            X86ProcFamily::SierraForest => X86SchedModelInfo {
                name: "Sierra Forest (Sierra Glen E-core) — 4-wide OoO",
                dispatch_width: 4,
                issue_width: 8,
                retire_width: 4,
                rob_size: 256,
                load_buffer_size: 96,
                store_buffer_size: 64,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 32,
                l2_cache_kb: 4096,
                l3_cache_kb: 0,
            },
            X86ProcFamily::ClearwaterForest => X86SchedModelInfo {
                name: "Clearwater Forest (Darkmont E-core) — 4-wide OoO",
                dispatch_width: 4,
                issue_width: 8,
                retire_width: 4,
                rob_size: 256,
                load_buffer_size: 96,
                store_buffer_size: 64,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 32,
                l2_cache_kb: 4096,
                l3_cache_kb: 0,
            },
            X86ProcFamily::Bonnell => X86SchedModelInfo {
                name: "Bonnell (Atom) — 2-wide in-order",
                dispatch_width: 2,
                issue_width: 2,
                retire_width: 2,
                rob_size: 0,
                load_buffer_size: 8,
                store_buffer_size: 8,
                out_of_order: false,
                l1i_cache_kb: 32,
                l1d_cache_kb: 24,
                l2_cache_kb: 512,
                l3_cache_kb: 0,
            },
            X86ProcFamily::Silvermont => X86SchedModelInfo {
                name: "Silvermont — 2-wide OoO",
                dispatch_width: 2,
                issue_width: 2,
                retire_width: 2,
                rob_size: 32,
                load_buffer_size: 10,
                store_buffer_size: 10,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 24,
                l2_cache_kb: 1024,
                l3_cache_kb: 0,
            },
            X86ProcFamily::Goldmont | X86ProcFamily::GoldmontPlus => X86SchedModelInfo {
                name: "Goldmont / Goldmont Plus — 3-wide OoO",
                dispatch_width: 3,
                issue_width: 4,
                retire_width: 3,
                rob_size: 72,
                load_buffer_size: 16,
                store_buffer_size: 12,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 24,
                l2_cache_kb: 2048,
                l3_cache_kb: 0,
            },
            X86ProcFamily::Tremont => X86SchedModelInfo {
                name: "Tremont — 4-wide OoO (2 clusters of 3)",
                dispatch_width: 4,
                issue_width: 6,
                retire_width: 4,
                rob_size: 208,
                load_buffer_size: 32,
                store_buffer_size: 24,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 32,
                l2_cache_kb: 1536,
                l3_cache_kb: 4096,
            },
            X86ProcFamily::Gracemont => X86SchedModelInfo {
                name: "Gracemont — 5-wide OoO (2 clusters of 3)",
                dispatch_width: 5,
                issue_width: 6,
                retire_width: 5,
                rob_size: 256,
                load_buffer_size: 48,
                store_buffer_size: 32,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 32,
                l2_cache_kb: 2048,
                l3_cache_kb: 3072,
            },
            X86ProcFamily::Crestmont => X86SchedModelInfo {
                name: "Crestmont — 6-wide OoO (2 clusters of 3)",
                dispatch_width: 6,
                issue_width: 8,
                retire_width: 6,
                rob_size: 256,
                load_buffer_size: 48,
                store_buffer_size: 32,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 32,
                l2_cache_kb: 2048,
                l3_cache_kb: 3072,
            },
            X86ProcFamily::KnightsLanding | X86ProcFamily::KnightsMill => X86SchedModelInfo {
                name: "Knights Landing / Knights Mill (Xeon Phi) — 2-wide OoO, AVX-512",
                dispatch_width: 2,
                issue_width: 4,
                retire_width: 2,
                rob_size: 72,
                load_buffer_size: 24,
                store_buffer_size: 16,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 32,
                l2_cache_kb: 1024,
                l3_cache_kb: 0,
            },
            X86ProcFamily::K6 | X86ProcFamily::K62 | X86ProcFamily::K63 => X86SchedModelInfo {
                name: "AMD K6 / K6-2 / K6-III — 2-wide OoO",
                dispatch_width: 2,
                issue_width: 4,
                retire_width: 2,
                rob_size: 24,
                load_buffer_size: 8,
                store_buffer_size: 6,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 32,
                l2_cache_kb: 256,
                l3_cache_kb: 0,
            },
            X86ProcFamily::K7 | X86ProcFamily::Athlon4 => X86SchedModelInfo {
                name: "AMD K7 (Athlon) — 3-wide OoO",
                dispatch_width: 3,
                issue_width: 6,
                retire_width: 3,
                rob_size: 72,
                load_buffer_size: 24,
                store_buffer_size: 12,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 64,
                l2_cache_kb: 512,
                l3_cache_kb: 0,
            },
            X86ProcFamily::K8 | X86ProcFamily::K8Sse3 => X86SchedModelInfo {
                name: "AMD K8 (Athlon 64 / Opteron) — 3-wide OoO",
                dispatch_width: 3,
                issue_width: 6,
                retire_width: 3,
                rob_size: 72,
                load_buffer_size: 32,
                store_buffer_size: 16,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 64,
                l2_cache_kb: 1024,
                l3_cache_kb: 0,
            },
            X86ProcFamily::K10 => X86SchedModelInfo {
                name: "AMD K10 (Family 10h) — 3-wide OoO",
                dispatch_width: 3,
                issue_width: 6,
                retire_width: 3,
                rob_size: 72,
                load_buffer_size: 32,
                store_buffer_size: 16,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 64,
                l2_cache_kb: 512,
                l3_cache_kb: 6144,
            },
            X86ProcFamily::Bobcat => X86SchedModelInfo {
                name: "AMD Bobcat (Family 14h) — 2-wide OoO",
                dispatch_width: 2,
                issue_width: 4,
                retire_width: 2,
                rob_size: 56,
                load_buffer_size: 12,
                store_buffer_size: 8,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 32,
                l2_cache_kb: 1024,
                l3_cache_kb: 0,
            },
            X86ProcFamily::Jaguar => X86SchedModelInfo {
                name: "AMD Jaguar (Family 16h) — 2-wide OoO",
                dispatch_width: 2,
                issue_width: 4,
                retire_width: 2,
                rob_size: 64,
                load_buffer_size: 16,
                store_buffer_size: 12,
                out_of_order: true,
                l1i_cache_kb: 32,
                l1d_cache_kb: 32,
                l2_cache_kb: 2048,
                l3_cache_kb: 0,
            },
            X86ProcFamily::Bulldozer | X86ProcFamily::Piledriver => X86SchedModelInfo {
                name: "AMD Bulldozer / Piledriver — 4-wide OoO (2 cores / module)",
                dispatch_width: 4,
                issue_width: 4,
                retire_width: 4,
                rob_size: 128,
                load_buffer_size: 40,
                store_buffer_size: 24,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 16,
                l2_cache_kb: 2048,
                l3_cache_kb: 8192,
            },
            X86ProcFamily::Steamroller | X86ProcFamily::Excavator => X86SchedModelInfo {
                name: "AMD Steamroller / Excavator — 4-wide OoO",
                dispatch_width: 4,
                issue_width: 4,
                retire_width: 4,
                rob_size: 128,
                load_buffer_size: 48,
                store_buffer_size: 24,
                out_of_order: true,
                l1i_cache_kb: 96,
                l1d_cache_kb: 32,
                l2_cache_kb: 2048,
                l3_cache_kb: 8192,
            },
            X86ProcFamily::Zen1 => X86SchedModelInfo {
                name: "AMD Zen 1 — 6-wide OoO (4 ALU + 2 AGU)",
                dispatch_width: 6,
                issue_width: 10,
                retire_width: 8,
                rob_size: 192,
                load_buffer_size: 72,
                store_buffer_size: 44,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 32,
                l2_cache_kb: 512,
                l3_cache_kb: 16384,
            },
            X86ProcFamily::Zen2 => X86SchedModelInfo {
                name: "AMD Zen 2 — 6-wide OoO, doubled FPU",
                dispatch_width: 6,
                issue_width: 10,
                retire_width: 8,
                rob_size: 224,
                load_buffer_size: 72,
                store_buffer_size: 48,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 32,
                l2_cache_kb: 512,
                l3_cache_kb: 32768,
            },
            X86ProcFamily::Zen3 => X86SchedModelInfo {
                name: "AMD Zen 3 — 6-wide OoO, unified complex",
                dispatch_width: 6,
                issue_width: 10,
                retire_width: 8,
                rob_size: 256,
                load_buffer_size: 96,
                store_buffer_size: 64,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 32,
                l2_cache_kb: 512,
                l3_cache_kb: 32768,
            },
            X86ProcFamily::Zen4 => X86SchedModelInfo {
                name: "AMD Zen 4 — 6-wide OoO, AVX-512",
                dispatch_width: 6,
                issue_width: 10,
                retire_width: 8,
                rob_size: 320,
                load_buffer_size: 128,
                store_buffer_size: 72,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 32,
                l2_cache_kb: 1024,
                l3_cache_kb: 32768,
            },
            X86ProcFamily::Zen5 => X86SchedModelInfo {
                name: "AMD Zen 5 — 8-wide OoO, full AVX-512",
                dispatch_width: 8,
                issue_width: 14,
                retire_width: 8,
                rob_size: 448,
                load_buffer_size: 160,
                store_buffer_size: 96,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 48,
                l2_cache_kb: 1024,
                l3_cache_kb: 32768,
            },
            X86ProcFamily::C3 | X86ProcFamily::C32 => X86SchedModelInfo {
                name: "VIA C3 / C3-2 — in-order",
                dispatch_width: 1,
                issue_width: 1,
                retire_width: 1,
                rob_size: 0,
                load_buffer_size: 4,
                store_buffer_size: 4,
                out_of_order: false,
                l1i_cache_kb: 64,
                l1d_cache_kb: 64,
                l2_cache_kb: 0,
                l3_cache_kb: 0,
            },
            X86ProcFamily::C7 => X86SchedModelInfo {
                name: "VIA C7 — 1-wide OoO",
                dispatch_width: 1,
                issue_width: 2,
                retire_width: 1,
                rob_size: 16,
                load_buffer_size: 8,
                store_buffer_size: 6,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 64,
                l2_cache_kb: 128,
                l3_cache_kb: 0,
            },
            X86ProcFamily::Nano => X86SchedModelInfo {
                name: "VIA Nano — 3-wide OoO",
                dispatch_width: 3,
                issue_width: 5,
                retire_width: 3,
                rob_size: 64,
                load_buffer_size: 16,
                store_buffer_size: 12,
                out_of_order: true,
                l1i_cache_kb: 64,
                l1d_cache_kb: 64,
                l2_cache_kb: 1024,
                l3_cache_kb: 0,
            },
            X86ProcFamily::Geode => X86SchedModelInfo {
                name: "AMD Geode — in-order",
                dispatch_width: 1,
                issue_width: 1,
                retire_width: 1,
                rob_size: 0,
                load_buffer_size: 4,
                store_buffer_size: 4,
                out_of_order: false,
                l1i_cache_kb: 16,
                l1d_cache_kb: 16,
                l2_cache_kb: 0,
                l3_cache_kb: 0,
            },
            X86ProcFamily::WinchipC6 | X86ProcFamily::Winchip2 => X86SchedModelInfo {
                name: "IDT WinChip — in-order",
                dispatch_width: 1,
                issue_width: 1,
                retire_width: 1,
                rob_size: 0,
                load_buffer_size: 4,
                store_buffer_size: 4,
                out_of_order: false,
                l1i_cache_kb: 32,
                l1d_cache_kb: 32,
                l2_cache_kb: 0,
                l3_cache_kb: 0,
            },
        }
    }
}

// ============================================================================
// X86CpuModel — processor model specification
// ============================================================================

/// Complete processor model specification including family, features,
/// tuning flags, scheduling info, and aliases.
#[derive(Debug, Clone)]
pub struct X86CpuModel {
    /// Canonical CPU name (lowercase).
    pub name: &'static str,
    /// Human-readable display name.
    pub display_name: &'static str,
    /// Processor family classification.
    pub family: X86ProcFamily,
    /// Year of introduction (approximate).
    pub year: u32,
    /// Whether this model supports 64-bit mode.
    pub is_64bit: bool,
    /// ISA features included by default.
    pub features: &'static [X86Feature],
    /// Tuning / microarchitectural features.
    pub tuning: &'static [X86Feature],
    /// Alternative CPU names recognised as aliases.
    pub aliases: &'static [&'static str],
    /// Default 64-bit stack alignment.
    pub stack_alignment: u32,
    /// Preferred vector width in bits (0, 128, 256, or 512).
    pub pref_vector_width: u32,
    /// Default inline threshold.
    pub inline_threshold: u32,
}

impl X86CpuModel {
    /// Return the scheduling model info for this CPU model.
    pub fn sched_info(&self) -> X86SchedModelInfo {
        X86SchedModelInfo::for_family(self.family)
    }

    /// Return all feature names (ISA + tuning) as strings.
    pub fn all_feature_names(&self) -> Vec<String> {
        let mut names: Vec<String> = self
            .features
            .iter()
            .chain(self.tuning.iter())
            .map(|f| f.name().to_string())
            .collect();
        names.sort();
        names.dedup();
        names
    }

    /// Check whether this model has a specific feature by string name.
    pub fn has_feature_named(&self, name: &str) -> bool {
        let feature = X86Feature::from_name(name);
        match feature {
            Some(f) => self.features.contains(&f) || self.tuning.contains(&f),
            None => false,
        }
    }
}

// ============================================================================
// X86SubtargetFeatures — complete subtarget feature database
// ============================================================================

/// Complete X86 subtarget feature database.
///
/// Holds the full catalog of CPU models, feature flags, processor families,
/// and scheduling model metadata. This is the primary entry point for
/// querying X86 subtarget capabilities.
#[derive(Debug, Clone)]
pub struct X86SubtargetFeatures {
    /// All known CPU models.
    models: Vec<X86CpuModel>,
}

impl Default for X86SubtargetFeatures {
    fn default() -> Self {
        Self::new()
    }
}

impl X86SubtargetFeatures {
    /// Create a new feature database with all known CPU models.
    pub fn new() -> Self {
        X86SubtargetFeatures {
            models: all_cpu_models(),
        }
    }

    /// Look up a CPU model by name (case-insensitive, checks aliases too).
    pub fn lookup_cpu(&self, name: &str) -> Option<&X86CpuModel> {
        let lower = name.to_lowercase();
        self.models
            .iter()
            .find(|m| m.name == lower || m.aliases.iter().any(|a| *a == lower))
    }

    /// Return all known CPU model names (canonical, not aliases).
    pub fn all_cpu_names(&self) -> Vec<&str> {
        self.models.iter().map(|m| m.name).collect()
    }

    /// Return all known CPU models.
    pub fn all_models(&self) -> &[X86CpuModel] {
        &self.models
    }

    /// Get the processor family for a CPU name.
    pub fn family_for_cpu(&self, name: &str) -> X86ProcFamily {
        self.lookup_cpu(name)
            .map(|m| m.family)
            .unwrap_or(X86ProcFamily::Core2)
    }

    /// Get the scheduling model info for a CPU name.
    pub fn sched_for_cpu(&self, name: &str) -> X86SchedModelInfo {
        self.lookup_cpu(name)
            .map(|m| m.sched_info())
            .unwrap_or_else(|| X86SchedModelInfo::for_family(X86ProcFamily::Core2))
    }

    /// Get the default features for a CPU name (as X86Feature set).
    pub fn features_for_cpu(&self, name: &str) -> HashSet<X86Feature> {
        let model = self.lookup_cpu(name);
        match model {
            Some(m) => {
                let mut set: HashSet<X86Feature> = m.features.iter().copied().collect();
                // Apply feature dependencies
                apply_feature_dependencies(&mut set);
                set
            }
            None => {
                // Generic fallback
                let mut set = HashSet::new();
                set.insert(X86Feature::Cmov);
                set.insert(X86Feature::Mmx);
                set.insert(X86Feature::Sse);
                set.insert(X86Feature::Sse2);
                set.insert(X86Feature::Fxr);
                set.insert(X86Feature::Nopl);
                set.insert(X86Feature::Xsave);
                set.insert(X86Feature::Xsaveopt);
                apply_feature_dependencies(&mut set);
                set
            }
        }
    }

    /// Get the default feature names for a CPU name (as string set).
    pub fn feature_names_for_cpu(&self, name: &str) -> HashSet<String> {
        self.features_for_cpu(name)
            .iter()
            .map(|f| f.name().to_string())
            .collect()
    }

    /// Get the tuning features for a CPU name.
    pub fn tuning_for_cpu(&self, name: &str) -> HashSet<X86Feature> {
        self.lookup_cpu(name)
            .map(|m| m.tuning.iter().copied().collect())
            .unwrap_or_default()
    }

    /// Get the preferred vector width for a CPU name.
    pub fn pref_vector_width(&self, name: &str) -> u32 {
        self.lookup_cpu(name)
            .map(|m| m.pref_vector_width)
            .unwrap_or(128)
    }

    /// Get the stack alignment for a CPU name.
    pub fn stack_alignment(&self, name: &str) -> u32 {
        self.lookup_cpu(name)
            .map(|m| m.stack_alignment)
            .unwrap_or(16)
    }

    /// Get the inline threshold for a CPU name.
    pub fn inline_threshold(&self, name: &str) -> u32 {
        self.lookup_cpu(name)
            .map(|m| m.inline_threshold)
            .unwrap_or(225)
    }

    /// Count of all known CPU models.
    pub fn cpu_count(&self) -> usize {
        self.models.len()
    }

    /// Count of all known feature flags.
    pub fn feature_count(&self) -> usize {
        X86Feature::all().len()
    }

    /// Return all feature flags with names and descriptions.
    pub fn all_features(&self) -> Vec<(X86Feature, &'static str, &'static str)> {
        X86Feature::all()
            .iter()
            .map(|&f| (f, f.name(), f.description()))
            .collect()
    }
}

// ============================================================================
// CPU model database — all 100+ processors
// ============================================================================

/// Return the complete list of all known CPU models.
pub fn all_cpu_models() -> Vec<X86CpuModel> {
    vec![
        // ═══════════════════════════════════════════════════════════════
        // Intel legacy: i386, i486, i586
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "i386",
            display_name: "Intel 80386",
            family: X86ProcFamily::I386,
            year: 1985,
            is_64bit: false,
            features: &[X86Feature::X87, X86Feature::Nopl],
            tuning: &[],
            aliases: &["386"],
            stack_alignment: 4,
            pref_vector_width: 0,
            inline_threshold: 75,
        },
        X86CpuModel {
            name: "i486",
            display_name: "Intel 80486",
            family: X86ProcFamily::I486,
            year: 1989,
            is_64bit: false,
            features: &[X86Feature::X87, X86Feature::Nopl],
            tuning: &[],
            aliases: &["486"],
            stack_alignment: 4,
            pref_vector_width: 0,
            inline_threshold: 100,
        },
        X86CpuModel {
            name: "i586",
            display_name: "Intel Pentium (P5)",
            family: X86ProcFamily::I586,
            year: 1993,
            is_64bit: false,
            features: &[X86Feature::X87, X86Feature::Nopl],
            tuning: &[X86Feature::SlowIncDec, X86Feature::SlowLea],
            aliases: &["pentium", "586"],
            stack_alignment: 4,
            pref_vector_width: 0,
            inline_threshold: 125,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel: Pentium MMX, Pentium Pro, Pentium II, Pentium III
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "pentium-mmx",
            display_name: "Intel Pentium MMX",
            family: X86ProcFamily::I586,
            year: 1996,
            is_64bit: false,
            features: &[X86Feature::X87, X86Feature::Mmx, X86Feature::Nopl],
            tuning: &[X86Feature::SlowIncDec, X86Feature::SlowLea],
            aliases: &["pentium_mmx"],
            stack_alignment: 4,
            pref_vector_width: 0,
            inline_threshold: 125,
        },
        X86CpuModel {
            name: "pentiumpro",
            display_name: "Intel Pentium Pro",
            family: X86ProcFamily::P6,
            year: 1995,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Nopl,
            ],
            tuning: &[],
            aliases: &["p6", "i686"],
            stack_alignment: 4,
            pref_vector_width: 0,
            inline_threshold: 175,
        },
        X86CpuModel {
            name: "pentium2",
            display_name: "Intel Pentium II",
            family: X86ProcFamily::P6,
            year: 1997,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Nopl,
            ],
            tuning: &[],
            aliases: &["pentiumii"],
            stack_alignment: 4,
            pref_vector_width: 0,
            inline_threshold: 175,
        },
        X86CpuModel {
            name: "pentium3",
            display_name: "Intel Pentium III",
            family: X86ProcFamily::P6,
            year: 1999,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Nopl,
            ],
            tuning: &[],
            aliases: &["pentiumiii"],
            stack_alignment: 4,
            pref_vector_width: 128,
            inline_threshold: 175,
        },
        X86CpuModel {
            name: "pentium3m",
            display_name: "Intel Pentium III-M (mobile)",
            family: X86ProcFamily::P6,
            year: 2000,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Nopl,
            ],
            tuning: &[X86Feature::OptForSize],
            aliases: &[],
            stack_alignment: 4,
            pref_vector_width: 128,
            inline_threshold: 150,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel: Pentium M, Pentium 4
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "pentium-m",
            display_name: "Intel Pentium M (Banias/Dothan)",
            family: X86ProcFamily::PentiumM,
            year: 2003,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Nopl,
            ],
            tuning: &[X86Feature::OptForSize, X86Feature::SlowUnalignedMem16],
            aliases: &["pentiumm", "banias", "dothan"],
            stack_alignment: 4,
            pref_vector_width: 128,
            inline_threshold: 150,
        },
        X86CpuModel {
            name: "pentium4",
            display_name: "Intel Pentium 4 (NetBurst)",
            family: X86ProcFamily::NetBurst,
            year: 2000,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Fxr,
                X86Feature::Nopl,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowUnalignedMem32,
                X86Feature::SlowShld,
                X86Feature::SlowIncDec,
                X86Feature::SlowLea,
                X86Feature::SlowPmulld,
                X86Feature::UseIncDec,
            ],
            aliases: &["pentiumiv", "netburst"],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 175,
        },
        X86CpuModel {
            name: "pentium4m",
            display_name: "Intel Pentium 4-M (mobile NetBurst)",
            family: X86ProcFamily::NetBurst,
            year: 2002,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Fxr,
                X86Feature::Nopl,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowShld,
                X86Feature::SlowIncDec,
                X86Feature::SlowLea,
                X86Feature::SlowPmulld,
                X86Feature::OptForSize,
            ],
            aliases: &[],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 150,
        },
        X86CpuModel {
            name: "prescott",
            display_name: "Intel Pentium 4 Prescott (90nm)",
            family: X86ProcFamily::NetBurst,
            year: 2004,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Fxr,
                X86Feature::Nopl,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowUnalignedMem32,
                X86Feature::SlowShld,
                X86Feature::SlowIncDec,
                X86Feature::SlowLea,
                X86Feature::UseIncDec,
            ],
            aliases: &[],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 175,
        },
        X86CpuModel {
            name: "nocona",
            display_name: "Intel Pentium 4 Nocona (64-bit NetBurst)",
            family: X86ProcFamily::NetBurst,
            year: 2004,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowShld,
                X86Feature::SlowIncDec,
                X86Feature::SlowLea,
                X86Feature::UseIncDec,
            ],
            aliases: &[],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 200,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel: Core 2, Penryn
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "core2",
            display_name: "Intel Core 2 (Merom/Conroe)",
            family: X86ProcFamily::Core2,
            year: 2006,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowShld,
                X86Feature::SlowLea,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
            ],
            aliases: &["merom", "conroe", "wolfdale"],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 200,
        },
        X86CpuModel {
            name: "penryn",
            display_name: "Intel Penryn (45nm Core 2 shrink)",
            family: X86ProcFamily::Core2,
            year: 2007,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowShld,
                X86Feature::SlowLea,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
            ],
            aliases: &[],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 200,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel: Nehalem, Westmere
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "nehalem",
            display_name: "Intel Nehalem (1st gen Core i)",
            family: X86ProcFamily::Nehalem,
            year: 2008,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
            ],
            aliases: &["corei7"],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 200,
        },
        X86CpuModel {
            name: "westmere",
            display_name: "Intel Westmere (Nehalem shrink + AES)",
            family: X86ProcFamily::Westmere,
            year: 2010,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Aes,
                X86Feature::Pclmul,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
            ],
            aliases: &[],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 200,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel: Sandy Bridge, Ivy Bridge
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "sandybridge",
            display_name: "Intel Sandy Bridge (2nd gen Core)",
            family: X86ProcFamily::SandyBridge,
            year: 2011,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::SlowUnalignedMem16,
            ],
            aliases: &["corei7-2", "snb"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 225,
        },
        X86CpuModel {
            name: "ivybridge",
            display_name: "Intel Ivy Bridge (3rd gen Core)",
            family: X86ProcFamily::IvyBridge,
            year: 2012,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::F16c,
                X86Feature::Rdrnd,
                X86Feature::Fsgsbase,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::SlowUnalignedMem16,
            ],
            aliases: &["corei7-3", "ivb"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 225,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel: Haswell, Broadwell
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "haswell",
            display_name: "Intel Haswell (4th gen Core)",
            family: X86ProcFamily::Haswell,
            year: 2013,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Fsgsbase,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
            ],
            aliases: &["corei7-4", "hsw"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 225,
        },
        X86CpuModel {
            name: "broadwell",
            display_name: "Intel Broadwell (5th gen Core)",
            family: X86ProcFamily::Broadwell,
            year: 2014,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Mpx,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
            ],
            aliases: &["corei7-5", "bdw"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 250,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel: Skylake, Skylake-AVX512, Cannon Lake
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "skylake",
            display_name: "Intel Skylake (6th gen Core, client)",
            family: X86ProcFamily::Skylake,
            year: 2015,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Sgx,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Mpx,
                X86Feature::Clflushopt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
            ],
            aliases: &["corei7-6", "skl"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 250,
        },
        X86CpuModel {
            name: "skylake-avx512",
            display_name: "Intel Skylake-SP (server, AVX-512)",
            family: X86ProcFamily::SkylakeServer,
            year: 2017,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512bw,
                X86Feature::Avx512dq,
                X86Feature::Avx512vl,
                X86Feature::Avx512cd,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Mpx,
                X86Feature::Clflushopt,
                X86Feature::Pku,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::Prefer512Bit,
                X86Feature::PreferMaskRegisters,
            ],
            aliases: &["skx"],
            stack_alignment: 16,
            pref_vector_width: 512,
            inline_threshold: 275,
        },
        X86CpuModel {
            name: "cannonlake",
            display_name: "Intel Cannon Lake (10nm, limited)",
            family: X86ProcFamily::CannonLake,
            year: 2018,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512bw,
                X86Feature::Avx512dq,
                X86Feature::Avx512vl,
                X86Feature::Avx512cd,
                X86Feature::Avx512vbmi,
                X86Feature::Avx512ifma,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::Sgx,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Mpx,
                X86Feature::Clflushopt,
                X86Feature::Pku,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::Prefer512Bit,
            ],
            aliases: &["cnl"],
            stack_alignment: 16,
            pref_vector_width: 512,
            inline_threshold: 275,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel: Cascade Lake, Cooper Lake
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "cascadelake",
            display_name: "Intel Cascade Lake (Skylake-SP refresh)",
            family: X86ProcFamily::CascadeLake,
            year: 2019,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512bw,
                X86Feature::Avx512dq,
                X86Feature::Avx512vl,
                X86Feature::Avx512cd,
                X86Feature::Avx512vnni,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Mpx,
                X86Feature::Clflushopt,
                X86Feature::Pku,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::Prefer512Bit,
            ],
            aliases: &["cascadelake-sp", "cfl"],
            stack_alignment: 16,
            pref_vector_width: 512,
            inline_threshold: 275,
        },
        X86CpuModel {
            name: "cooperlake",
            display_name: "Intel Cooper Lake (Cascade Lake + BF16)",
            family: X86ProcFamily::CooperLake,
            year: 2020,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512bw,
                X86Feature::Avx512dq,
                X86Feature::Avx512vl,
                X86Feature::Avx512cd,
                X86Feature::Avx512vnni,
                X86Feature::Avx512bf16,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Mpx,
                X86Feature::Clflushopt,
                X86Feature::Pku,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::Prefer512Bit,
            ],
            aliases: &["cpl"],
            stack_alignment: 16,
            pref_vector_width: 512,
            inline_threshold: 275,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel: Ice Lake Client + Server
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "icelake-client",
            display_name: "Intel Ice Lake (10th gen, Sunny Cove)",
            family: X86ProcFamily::IceLake,
            year: 2019,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512bw,
                X86Feature::Avx512dq,
                X86Feature::Avx512vl,
                X86Feature::Avx512cd,
                X86Feature::Avx512vbmi,
                X86Feature::Avx512vbmi2,
                X86Feature::Avx512vnni,
                X86Feature::Avx512bitalg,
                X86Feature::Avx512vpopcntdq,
                X86Feature::Avx512ifma,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::Sgx,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Mpx,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Pku,
                X86Feature::Invpcid,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
                X86Feature::Prefer512Bit,
                X86Feature::PreferMaskRegisters,
            ],
            aliases: &["icl"],
            stack_alignment: 16,
            pref_vector_width: 512,
            inline_threshold: 275,
        },
        X86CpuModel {
            name: "icelake-server",
            display_name: "Intel Ice Lake Server (3rd gen Xeon Scalable)",
            family: X86ProcFamily::IceLakeServer,
            year: 2021,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512bw,
                X86Feature::Avx512dq,
                X86Feature::Avx512vl,
                X86Feature::Avx512cd,
                X86Feature::Avx512vbmi,
                X86Feature::Avx512vbmi2,
                X86Feature::Avx512vnni,
                X86Feature::Avx512bitalg,
                X86Feature::Avx512vpopcntdq,
                X86Feature::Avx512ifma,
                X86Feature::Avx512fp16,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::Sgx,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Mpx,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Pku,
                X86Feature::Invpcid,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Enqcmd,
                X86Feature::Serialize,
                X86Feature::Tsxldtrk,
                X86Feature::Movdiri,
                X86Feature::Movdir64b,
                X86Feature::Cldemote,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
                X86Feature::Prefer512Bit,
                X86Feature::PreferMaskRegisters,
            ],
            aliases: &["icx"],
            stack_alignment: 16,
            pref_vector_width: 512,
            inline_threshold: 300,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel: Tiger Lake, Rocket Lake
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "tigerlake",
            display_name: "Intel Tiger Lake (11th gen, Willow Cove)",
            family: X86ProcFamily::TigerLake,
            year: 2020,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512bw,
                X86Feature::Avx512dq,
                X86Feature::Avx512vl,
                X86Feature::Avx512cd,
                X86Feature::Avx512vbmi,
                X86Feature::Avx512vbmi2,
                X86Feature::Avx512vnni,
                X86Feature::Avx512bitalg,
                X86Feature::Avx512vpopcntdq,
                X86Feature::Avx512ifma,
                X86Feature::Avx512vp2intersect,
                X86Feature::AvxVnni,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::Sgx,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Pku,
                X86Feature::CetSs,
                X86Feature::Invpcid,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Movdiri,
                X86Feature::Movdir64b,
                X86Feature::Cldemote,
                X86Feature::Kl,
                X86Feature::WideKl,
                X86Feature::Enqcmd,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
                X86Feature::Prefer512Bit,
            ],
            aliases: &["tgl"],
            stack_alignment: 16,
            pref_vector_width: 512,
            inline_threshold: 275,
        },
        X86CpuModel {
            name: "rocketlake",
            display_name: "Intel Rocket Lake (Cypress Cove, 14nm backport)",
            family: X86ProcFamily::RocketLake,
            year: 2021,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512bw,
                X86Feature::Avx512dq,
                X86Feature::Avx512vl,
                X86Feature::Avx512cd,
                X86Feature::Avx512vbmi,
                X86Feature::Avx512vbmi2,
                X86Feature::Avx512vnni,
                X86Feature::Avx512bitalg,
                X86Feature::Avx512vpopcntdq,
                X86Feature::Avx512ifma,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::Sgx,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Pku,
                X86Feature::Invpcid,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Movdiri,
                X86Feature::Movdir64b,
                X86Feature::Cldemote,
                X86Feature::Enqcmd,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
                X86Feature::Prefer512Bit,
            ],
            aliases: &["rkl"],
            stack_alignment: 16,
            pref_vector_width: 512,
            inline_threshold: 275,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel: Alder Lake, Raptor Lake
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "alderlake",
            display_name: "Intel Alder Lake (12th gen, Golden Cove + Gracemont)",
            family: X86ProcFamily::AlderLake,
            year: 2021,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::AvxVnni,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Pku,
                X86Feature::CetSs,
                X86Feature::Invpcid,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Movdiri,
                X86Feature::Movdir64b,
                X86Feature::Cldemote,
                X86Feature::Enqcmd,
                X86Feature::Kl,
                X86Feature::WideKl,
                X86Feature::Hreset,
                X86Feature::Uintr,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
                X86Feature::Prefer256Bit,
            ],
            aliases: &["adl", "alderlake-s", "alderlake-p"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 300,
        },
        X86CpuModel {
            name: "raptorlake",
            display_name: "Intel Raptor Lake (13th gen, Raptor Cove + Gracemont)",
            family: X86ProcFamily::RaptorLake,
            year: 2022,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::AvxVnni,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Pku,
                X86Feature::CetSs,
                X86Feature::Invpcid,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Movdiri,
                X86Feature::Movdir64b,
                X86Feature::Cldemote,
                X86Feature::Enqcmd,
                X86Feature::Kl,
                X86Feature::WideKl,
                X86Feature::Hreset,
                X86Feature::Uintr,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
                X86Feature::Prefer256Bit,
            ],
            aliases: &["rpl"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 300,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel: Meteor Lake, Arrow Lake, Lunar Lake
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "meteorlake",
            display_name: "Intel Meteor Lake (Redwood Cove + Crestmont)",
            family: X86ProcFamily::MeteorLake,
            year: 2023,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::AvxVnni,
                X86Feature::AvxIfma,
                X86Feature::AvxNeConvert,
                X86Feature::AvxVnniInt8,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Pku,
                X86Feature::CetSs,
                X86Feature::Invpcid,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Movdiri,
                X86Feature::Movdir64b,
                X86Feature::Cldemote,
                X86Feature::Enqcmd,
                X86Feature::Kl,
                X86Feature::WideKl,
                X86Feature::Hreset,
                X86Feature::Uintr,
                X86Feature::Cmpccxadd,
                X86Feature::Prefetchi,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
                X86Feature::Prefer256Bit,
            ],
            aliases: &["mtl"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 300,
        },
        X86CpuModel {
            name: "arrowlake",
            display_name: "Intel Arrow Lake (Lion Cove + Skymont)",
            family: X86ProcFamily::ArrowLake,
            year: 2024,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::AvxVnni,
                X86Feature::AvxIfma,
                X86Feature::AvxNeConvert,
                X86Feature::AvxVnniInt8,
                X86Feature::AvxVnniInt16,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Pku,
                X86Feature::CetSs,
                X86Feature::Invpcid,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Movdiri,
                X86Feature::Movdir64b,
                X86Feature::Cldemote,
                X86Feature::Enqcmd,
                X86Feature::Kl,
                X86Feature::WideKl,
                X86Feature::Hreset,
                X86Feature::Uintr,
                X86Feature::Cmpccxadd,
                X86Feature::Prefetchi,
                X86Feature::RaoInt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
                X86Feature::Prefer256Bit,
            ],
            aliases: &["arl"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 300,
        },
        X86CpuModel {
            name: "lunarlake",
            display_name: "Intel Lunar Lake (Lion Cove + Skymont ultra-mobile)",
            family: X86ProcFamily::LunarLake,
            year: 2024,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::AvxVnni,
                X86Feature::AvxIfma,
                X86Feature::AvxNeConvert,
                X86Feature::AvxVnniInt8,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Pku,
                X86Feature::CetSs,
                X86Feature::Invpcid,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Movdiri,
                X86Feature::Movdir64b,
                X86Feature::Cldemote,
                X86Feature::Enqcmd,
                X86Feature::Kl,
                X86Feature::WideKl,
                X86Feature::Hreset,
                X86Feature::Uintr,
                X86Feature::Cmpccxadd,
                X86Feature::Prefetchi,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
                X86Feature::Prefer256Bit,
            ],
            aliases: &["lnl"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 275,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel: Sapphire Rapids, Emerald Rapids, Granite Rapids
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "sapphirerapids",
            display_name: "Intel Sapphire Rapids (4th gen Xeon Scalable)",
            family: X86ProcFamily::SapphireRapids,
            year: 2023,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512bw,
                X86Feature::Avx512dq,
                X86Feature::Avx512vl,
                X86Feature::Avx512cd,
                X86Feature::Avx512vbmi,
                X86Feature::Avx512vbmi2,
                X86Feature::Avx512vnni,
                X86Feature::Avx512bitalg,
                X86Feature::Avx512vpopcntdq,
                X86Feature::Avx512ifma,
                X86Feature::Avx512fp16,
                X86Feature::Avx512bf16,
                X86Feature::AvxVnni,
                X86Feature::AvxIfma,
                X86Feature::AvxVnniInt8,
                X86Feature::AvxNeConvert,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::AmxTile,
                X86Feature::AmxBf16,
                X86Feature::AmxInt8,
                X86Feature::AmxFp16,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Pku,
                X86Feature::CetSs,
                X86Feature::Invpcid,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Tsxldtrk,
                X86Feature::Movdiri,
                X86Feature::Movdir64b,
                X86Feature::Cldemote,
                X86Feature::Enqcmd,
                X86Feature::Kl,
                X86Feature::WideKl,
                X86Feature::Hreset,
                X86Feature::Uintr,
                X86Feature::Prefetchi,
                X86Feature::Prefetchwt1,
                X86Feature::Cmpccxadd,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
                X86Feature::Prefer512Bit,
                X86Feature::PreferMaskRegisters,
            ],
            aliases: &["spr"],
            stack_alignment: 16,
            pref_vector_width: 512,
            inline_threshold: 300,
        },
        X86CpuModel {
            name: "emeraldrapids",
            display_name: "Intel Emerald Rapids (5th gen Xeon Scalable)",
            family: X86ProcFamily::EmeraldRapids,
            year: 2023,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512bw,
                X86Feature::Avx512dq,
                X86Feature::Avx512vl,
                X86Feature::Avx512cd,
                X86Feature::Avx512vbmi,
                X86Feature::Avx512vbmi2,
                X86Feature::Avx512vnni,
                X86Feature::Avx512bitalg,
                X86Feature::Avx512vpopcntdq,
                X86Feature::Avx512ifma,
                X86Feature::Avx512fp16,
                X86Feature::Avx512bf16,
                X86Feature::AvxVnni,
                X86Feature::AvxIfma,
                X86Feature::AvxVnniInt8,
                X86Feature::AvxNeConvert,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::AmxTile,
                X86Feature::AmxBf16,
                X86Feature::AmxInt8,
                X86Feature::AmxFp16,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Pku,
                X86Feature::CetSs,
                X86Feature::Invpcid,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Tsxldtrk,
                X86Feature::Movdiri,
                X86Feature::Movdir64b,
                X86Feature::Cldemote,
                X86Feature::Enqcmd,
                X86Feature::Kl,
                X86Feature::WideKl,
                X86Feature::Hreset,
                X86Feature::Uintr,
                X86Feature::Prefetchi,
                X86Feature::Prefetchwt1,
                X86Feature::Cmpccxadd,
                X86Feature::RaoInt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
                X86Feature::Prefer512Bit,
                X86Feature::PreferMaskRegisters,
            ],
            aliases: &["emr"],
            stack_alignment: 16,
            pref_vector_width: 512,
            inline_threshold: 300,
        },
        X86CpuModel {
            name: "graniterapids",
            display_name: "Intel Granite Rapids (6th gen Xeon Scalable)",
            family: X86ProcFamily::GraniteRapids,
            year: 2024,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512bw,
                X86Feature::Avx512dq,
                X86Feature::Avx512vl,
                X86Feature::Avx512cd,
                X86Feature::Avx512vbmi,
                X86Feature::Avx512vbmi2,
                X86Feature::Avx512vnni,
                X86Feature::Avx512bitalg,
                X86Feature::Avx512vpopcntdq,
                X86Feature::Avx512ifma,
                X86Feature::Avx512fp16,
                X86Feature::Avx512bf16,
                X86Feature::AvxVnni,
                X86Feature::AvxIfma,
                X86Feature::AvxVnniInt8,
                X86Feature::AvxVnniInt16,
                X86Feature::AvxNeConvert,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Sha,
                X86Feature::Sha512,
                X86Feature::Sm3,
                X86Feature::Sm4,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::AmxTile,
                X86Feature::AmxBf16,
                X86Feature::AmxInt8,
                X86Feature::AmxFp16,
                X86Feature::Avx10_2,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Pku,
                X86Feature::CetSs,
                X86Feature::Invpcid,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Tsxldtrk,
                X86Feature::Movdiri,
                X86Feature::Movdir64b,
                X86Feature::Cldemote,
                X86Feature::Enqcmd,
                X86Feature::Kl,
                X86Feature::WideKl,
                X86Feature::Hreset,
                X86Feature::Uintr,
                X86Feature::Prefetchi,
                X86Feature::Prefetchwt1,
                X86Feature::Cmpccxadd,
                X86Feature::RaoInt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
                X86Feature::Prefer512Bit,
                X86Feature::PreferMaskRegisters,
            ],
            aliases: &["gnr"],
            stack_alignment: 16,
            pref_vector_width: 512,
            inline_threshold: 325,
        },
        X86CpuModel {
            name: "sierraforest",
            display_name: "Intel Sierra Forest (Sierra Glen E-core Xeon)",
            family: X86ProcFamily::SierraForest,
            year: 2024,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::AvxVnni,
                X86Feature::AvxIfma,
                X86Feature::AvxNeConvert,
                X86Feature::AvxVnniInt8,
                X86Feature::AvxVnniInt16,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::AmxTile,
                X86Feature::AmxBf16,
                X86Feature::AmxInt8,
                X86Feature::Avx10_2,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Pku,
                X86Feature::CetSs,
                X86Feature::Invpcid,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Tsxldtrk,
                X86Feature::Movdiri,
                X86Feature::Movdir64b,
                X86Feature::Cldemote,
                X86Feature::Enqcmd,
                X86Feature::Kl,
                X86Feature::WideKl,
                X86Feature::Hreset,
                X86Feature::Uintr,
                X86Feature::Prefetchi,
                X86Feature::Cmpccxadd,
                X86Feature::RaoInt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::Prefer256Bit,
            ],
            aliases: &["srf"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 250,
        },
        X86CpuModel {
            name: "clearwaterforest",
            display_name: "Intel Clearwater Forest (Darkmont E-core Xeon)",
            family: X86ProcFamily::ClearwaterForest,
            year: 2025,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::AvxVnni,
                X86Feature::AvxIfma,
                X86Feature::AvxNeConvert,
                X86Feature::AvxVnniInt8,
                X86Feature::AvxVnniInt16,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Sha,
                X86Feature::Sha512,
                X86Feature::Sm3,
                X86Feature::Sm4,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::AmxTile,
                X86Feature::AmxBf16,
                X86Feature::AmxInt8,
                X86Feature::AmxFp16,
                X86Feature::Avx10_2,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Pku,
                X86Feature::CetSs,
                X86Feature::Invpcid,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Tsxldtrk,
                X86Feature::Movdiri,
                X86Feature::Movdir64b,
                X86Feature::Cldemote,
                X86Feature::Enqcmd,
                X86Feature::Kl,
                X86Feature::WideKl,
                X86Feature::Hreset,
                X86Feature::Uintr,
                X86Feature::Prefetchi,
                X86Feature::Cmpccxadd,
                X86Feature::RaoInt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Xsaves,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::Prefer256Bit,
            ],
            aliases: &["cwf"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 250,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel Atom family: Bonnell, Silvermont, Goldmont, Goldmont+, Tremont, Gracemont, Crestmont
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "bonnell",
            display_name: "Intel Atom (Bonnell, 45nm)",
            family: X86ProcFamily::Bonnell,
            year: 2008,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Movbe,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowUnalignedMem32,
                X86Feature::SlowShld,
                X86Feature::SlowIncDec,
                X86Feature::SlowLea,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::AvoidLeaScale,
                X86Feature::UseGlmul,
                X86Feature::OptForSize,
                X86Feature::PadShortFunctions,
            ],
            aliases: &["atom", "bonnell-atom"],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 100,
        },
        X86CpuModel {
            name: "silvermont",
            display_name: "Intel Silvermont (22nm Atom, Bay Trail)",
            family: X86ProcFamily::Silvermont,
            year: 2013,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Aes,
                X86Feature::Pclmul,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::AvoidLeaScale,
                X86Feature::UseSlmul,
                X86Feature::UseCmovBranch,
            ],
            aliases: &["slm", "silvermont-atom"],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 125,
        },
        X86CpuModel {
            name: "goldmont",
            display_name: "Intel Goldmont (14nm Atom, Apollo Lake)",
            family: X86ProcFamily::Goldmont,
            year: 2016,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Aes,
                X86Feature::Pclmul,
                X86Feature::Sha,
                X86Feature::Fsgsbase,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::AvoidLeaScale,
                X86Feature::UseSlmul,
                X86Feature::UseCmovBranch,
            ],
            aliases: &["glm", "goldmont-atom"],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 125,
        },
        X86CpuModel {
            name: "goldmont-plus",
            display_name: "Intel Goldmont Plus (Gemini Lake)",
            family: X86ProcFamily::GoldmontPlus,
            year: 2017,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Aes,
                X86Feature::Pclmul,
                X86Feature::Sha,
                X86Feature::Sgx,
                X86Feature::Fsgsbase,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::AvoidLeaScale,
                X86Feature::UseSlmul,
                X86Feature::UseCmovBranch,
            ],
            aliases: &["glp"],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 125,
        },
        X86CpuModel {
            name: "tremont",
            display_name: "Intel Tremont (10nm Atom, Jasper Lake)",
            family: X86ProcFamily::Tremont,
            year: 2020,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Aes,
                X86Feature::Pclmul,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Cldemote,
                X86Feature::CetSs,
                X86Feature::Kl,
                X86Feature::WideKl,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
            ],
            tuning: &[
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::UseCmovBranch,
            ],
            aliases: &["tnt", "tremont-atom"],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 150,
        },
        X86CpuModel {
            name: "gracemont",
            display_name: "Intel Gracemont (Intel 7 E-core)",
            family: X86ProcFamily::Gracemont,
            year: 2021,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::AvxVnni,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Cldemote,
                X86Feature::CetSs,
                X86Feature::Kl,
                X86Feature::WideKl,
                X86Feature::Hreset,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::UseCmovBranch,
                X86Feature::Prefer256Bit,
            ],
            aliases: &["gcm"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 200,
        },
        X86CpuModel {
            name: "crestmont",
            display_name: "Intel Crestmont (Intel 4 E-core)",
            family: X86ProcFamily::Crestmont,
            year: 2023,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Sha,
                X86Feature::Gfni,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::AvxVnni,
                X86Feature::AvxIfma,
                X86Feature::AvxNeConvert,
                X86Feature::AvxVnniInt8,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Clwb,
                X86Feature::Waitpkg,
                X86Feature::Rdpid,
                X86Feature::Ptwrite,
                X86Feature::Serialize,
                X86Feature::Cldemote,
                X86Feature::CetSs,
                X86Feature::Kl,
                X86Feature::WideKl,
                X86Feature::Hreset,
                X86Feature::Uintr,
                X86Feature::Cmpccxadd,
                X86Feature::Prefetchi,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::UseCmovBranch,
                X86Feature::Prefer256Bit,
            ],
            aliases: &["cst"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 200,
        },
        // ═══════════════════════════════════════════════════════════════
        // Intel Xeon Phi: Knights Landing, Knights Mill
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "knights-landing",
            display_name: "Intel Knights Landing (Xeon Phi 2nd gen)",
            family: X86ProcFamily::KnightsLanding,
            year: 2016,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512cd,
                X86Feature::Avx512er,
                X86Feature::Avx512pf,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Prefetchwt1,
                X86Feature::Fsgsbase,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
            ],
            tuning: &[
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::Prefer512Bit,
                X86Feature::PreferMaskRegisters,
                X86Feature::PreferNoGather,
                X86Feature::PreferNoScatter,
            ],
            aliases: &["knl", "knightslanding"],
            stack_alignment: 64,
            pref_vector_width: 512,
            inline_threshold: 200,
        },
        X86CpuModel {
            name: "knights-mill",
            display_name: "Intel Knights Mill (Xeon Phi 3rd gen)",
            family: X86ProcFamily::KnightsMill,
            year: 2017,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512cd,
                X86Feature::Avx512er,
                X86Feature::Avx512pf,
                X86Feature::Avx512vpopcntdq,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Rtm,
                X86Feature::Prefetchwt1,
                X86Feature::Fsgsbase,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
            ],
            tuning: &[
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::Prefer512Bit,
                X86Feature::PreferMaskRegisters,
                X86Feature::PreferNoGather,
                X86Feature::PreferNoScatter,
            ],
            aliases: &["knm", "knightsmill"],
            stack_alignment: 64,
            pref_vector_width: 512,
            inline_threshold: 200,
        },
        // ═══════════════════════════════════════════════════════════════
        // AMD: K6 family
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "k6",
            display_name: "AMD K6",
            family: X86ProcFamily::K6,
            year: 1997,
            is_64bit: false,
            features: &[X86Feature::X87, X86Feature::Mmx, X86Feature::Nopl],
            tuning: &[X86Feature::SlowIncDec, X86Feature::SlowLea],
            aliases: &[],
            stack_alignment: 4,
            pref_vector_width: 0,
            inline_threshold: 125,
        },
        X86CpuModel {
            name: "k6-2",
            display_name: "AMD K6-2 (3DNow!)",
            family: X86ProcFamily::K62,
            year: 1998,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Mmx,
                X86Feature::ThreeDNow,
                X86Feature::Nopl,
            ],
            tuning: &[X86Feature::SlowIncDec, X86Feature::SlowLea],
            aliases: &["k62"],
            stack_alignment: 4,
            pref_vector_width: 0,
            inline_threshold: 125,
        },
        X86CpuModel {
            name: "k6-3",
            display_name: "AMD K6-III",
            family: X86ProcFamily::K63,
            year: 1999,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Mmx,
                X86Feature::ThreeDNow,
                X86Feature::Nopl,
            ],
            tuning: &[X86Feature::SlowIncDec, X86Feature::SlowLea],
            aliases: &["k63"],
            stack_alignment: 4,
            pref_vector_width: 0,
            inline_threshold: 125,
        },
        // ═══════════════════════════════════════════════════════════════
        // AMD: K7 (Athlon) family
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "athlon",
            display_name: "AMD Athlon (K7)",
            family: X86ProcFamily::K7,
            year: 1999,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Mmx,
                X86Feature::ThreeDNow,
                X86Feature::Sse,
                X86Feature::Nopl,
            ],
            tuning: &[X86Feature::SlowIncDec],
            aliases: &[],
            stack_alignment: 4,
            pref_vector_width: 128,
            inline_threshold: 150,
        },
        X86CpuModel {
            name: "athlon-tbird",
            display_name: "AMD Athlon Thunderbird",
            family: X86ProcFamily::K7,
            year: 2000,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Mmx,
                X86Feature::ThreeDNow,
                X86Feature::Sse,
                X86Feature::Nopl,
            ],
            tuning: &[X86Feature::SlowIncDec],
            aliases: &["athlon_thunderbird"],
            stack_alignment: 4,
            pref_vector_width: 128,
            inline_threshold: 150,
        },
        X86CpuModel {
            name: "athlon-4",
            display_name: "AMD Athlon 4 (mobile K7)",
            family: X86ProcFamily::Athlon4,
            year: 2001,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Mmx,
                X86Feature::ThreeDNow,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Nopl,
            ],
            tuning: &[X86Feature::SlowIncDec, X86Feature::OptForSize],
            aliases: &["athlon4"],
            stack_alignment: 4,
            pref_vector_width: 128,
            inline_threshold: 150,
        },
        X86CpuModel {
            name: "athlon-xp",
            display_name: "AMD Athlon XP",
            family: X86ProcFamily::K7,
            year: 2001,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Mmx,
                X86Feature::ThreeDNow,
                X86Feature::Sse,
                X86Feature::Nopl,
            ],
            tuning: &[X86Feature::SlowIncDec],
            aliases: &["athlonxp"],
            stack_alignment: 4,
            pref_vector_width: 128,
            inline_threshold: 150,
        },
        X86CpuModel {
            name: "athlon-mp",
            display_name: "AMD Athlon MP",
            family: X86ProcFamily::K7,
            year: 2001,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Mmx,
                X86Feature::ThreeDNow,
                X86Feature::Sse,
                X86Feature::Nopl,
            ],
            tuning: &[X86Feature::SlowIncDec],
            aliases: &["athlonmp"],
            stack_alignment: 4,
            pref_vector_width: 128,
            inline_threshold: 150,
        },
        // ═══════════════════════════════════════════════════════════════
        // AMD: K8 family (Athlon 64, Opteron)
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "k8",
            display_name: "AMD K8 (Athlon 64 / Opteron, original)",
            family: X86ProcFamily::K8,
            year: 2003,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::ThreeDNow,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowShld,
                X86Feature::SlowLea,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
            ],
            aliases: &["athlon64", "opteron", "athlon-fx"],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 175,
        },
        X86CpuModel {
            name: "k8-sse3",
            display_name: "AMD K8 with SSE3 (later K8 stepping)",
            family: X86ProcFamily::K8Sse3,
            year: 2005,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::ThreeDNow,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowShld,
                X86Feature::SlowLea,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
            ],
            aliases: &["opteron-sse3"],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 175,
        },
        // ═══════════════════════════════════════════════════════════════
        // AMD: K10 family
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "barcelona",
            display_name: "AMD Barcelona (Family 10h, 1st gen)",
            family: X86ProcFamily::K10,
            year: 2007,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Popcnt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
            ],
            aliases: &["amdfam10", "k10"],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 200,
        },
        X86CpuModel {
            name: "istanbul",
            display_name: "AMD Istanbul (Family 10h, hexa-core)",
            family: X86ProcFamily::K10,
            year: 2009,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
            ],
            aliases: &[],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 200,
        },
        X86CpuModel {
            name: "shanghai",
            display_name: "AMD Shanghai (Family 10h, 45nm)",
            family: X86ProcFamily::K10,
            year: 2008,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
            ],
            aliases: &[],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 200,
        },
        // ═══════════════════════════════════════════════════════════════
        // AMD: Bobcat, Jaguar (small cores)
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "bobcat",
            display_name: "AMD Bobcat (Family 14h)",
            family: X86ProcFamily::Bobcat,
            year: 2011,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::F16c,
                X86Feature::Movbe,
                X86Feature::Lzcnt,
                X86Feature::Prfchw,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::OptForSize,
            ],
            aliases: &["btver1"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 125,
        },
        X86CpuModel {
            name: "jaguar",
            display_name: "AMD Jaguar (Family 16h)",
            family: X86ProcFamily::Jaguar,
            year: 2013,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Fma,
                X86Feature::Movbe,
                X86Feature::Lzcnt,
                X86Feature::Prfchw,
                X86Feature::Rdrnd,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
            ],
            aliases: &["btver2"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 150,
        },
        // ═══════════════════════════════════════════════════════════════
        // AMD: Bulldozer family (Bulldozer, Piledriver, Steamroller, Excavator)
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "bulldozer",
            display_name: "AMD Bulldozer (Family 15h, 1st gen)",
            family: X86ProcFamily::Bulldozer,
            year: 2011,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Lzcnt,
                X86Feature::Prfchw,
                X86Feature::Xop,
                X86Feature::Fma4,
                X86Feature::Lwp,
                X86Feature::Tbm,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::UseSqrtEstimate,
                X86Feature::UseRecipEstimate,
                X86Feature::AvoidLeaScale,
                X86Feature::SlowIncDec,
            ],
            aliases: &["bdver1"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 225,
        },
        X86CpuModel {
            name: "piledriver",
            display_name: "AMD Piledriver (Family 15h, 2nd gen)",
            family: X86ProcFamily::Piledriver,
            year: 2012,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Fma,
                X86Feature::Fma4,
                X86Feature::Xop,
                X86Feature::Lwp,
                X86Feature::Tbm,
                X86Feature::Lzcnt,
                X86Feature::Prfchw,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::UseSqrtEstimate,
                X86Feature::UseRecipEstimate,
                X86Feature::AvoidLeaScale,
                X86Feature::SlowIncDec,
            ],
            aliases: &["bdver2"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 225,
        },
        X86CpuModel {
            name: "steamroller",
            display_name: "AMD Steamroller (Family 15h, 3rd gen)",
            family: X86ProcFamily::Steamroller,
            year: 2014,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Fma,
                X86Feature::Fma4,
                X86Feature::Xop,
                X86Feature::Lwp,
                X86Feature::Tbm,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Prfchw,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::UseSqrtEstimate,
                X86Feature::UseRecipEstimate,
                X86Feature::AvoidLeaScale,
                X86Feature::SlowIncDec,
            ],
            aliases: &["bdver3"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 225,
        },
        X86CpuModel {
            name: "excavator",
            display_name: "AMD Excavator (Family 15h, 4th gen)",
            family: X86ProcFamily::Excavator,
            year: 2015,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Fma,
                X86Feature::Fma4,
                X86Feature::Xop,
                X86Feature::Lwp,
                X86Feature::Tbm,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Mwaitx,
                X86Feature::Rdrnd,
                X86Feature::Prfchw,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::SlowDivide32,
                X86Feature::SlowDivide64,
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::UseSqrtEstimate,
                X86Feature::UseRecipEstimate,
                X86Feature::AvoidLeaScale,
                X86Feature::SlowIncDec,
            ],
            aliases: &["bdver4", "bdver5"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 225,
        },
        // ═══════════════════════════════════════════════════════════════
        // AMD: Zen family
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "zen1",
            display_name: "AMD Zen 1 (Ryzen 1000, Naples/Summit Ridge)",
            family: X86ProcFamily::Zen1,
            year: 2017,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Clzero,
                X86Feature::Mwaitx,
                X86Feature::Sha,
                X86Feature::Aes,
                X86Feature::Pclmul,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::UseSqrtEstimate,
                X86Feature::UseRecipEstimate,
                X86Feature::AvoidLeaScale,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
            ],
            aliases: &["znver1"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 250,
        },
        X86CpuModel {
            name: "zen2",
            display_name: "AMD Zen 2 (Ryzen 3000, Rome/Matisse)",
            family: X86ProcFamily::Zen2,
            year: 2019,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Clzero,
                X86Feature::Mwaitx,
                X86Feature::Clwb,
                X86Feature::Wbnoinvd,
                X86Feature::Sha,
                X86Feature::Aes,
                X86Feature::Pclmul,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Rdpid,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::SlowUnalignedMem16,
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::UseSqrtEstimate,
                X86Feature::UseRecipEstimate,
                X86Feature::AvoidLeaScale,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
            ],
            aliases: &["znver2"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 275,
        },
        X86CpuModel {
            name: "zen3",
            display_name: "AMD Zen 3 (Ryzen 5000, Milan/Vermeer)",
            family: X86ProcFamily::Zen3,
            year: 2020,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Clzero,
                X86Feature::Mwaitx,
                X86Feature::Clwb,
                X86Feature::Wbnoinvd,
                X86Feature::Pku,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::Sha,
                X86Feature::Aes,
                X86Feature::Pclmul,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Rdpid,
                X86Feature::CetSs,
                X86Feature::Invpcid,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::UseSqrtEstimate,
                X86Feature::UseRecipEstimate,
                X86Feature::AvoidLeaScale,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
            ],
            aliases: &["znver3"],
            stack_alignment: 16,
            pref_vector_width: 256,
            inline_threshold: 275,
        },
        X86CpuModel {
            name: "zen4",
            display_name: "AMD Zen 4 (Ryzen 7000, Genoa/Raphael)",
            family: X86ProcFamily::Zen4,
            year: 2022,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512bw,
                X86Feature::Avx512dq,
                X86Feature::Avx512vl,
                X86Feature::Avx512cd,
                X86Feature::Avx512vbmi,
                X86Feature::Avx512vbmi2,
                X86Feature::Avx512vnni,
                X86Feature::Avx512bitalg,
                X86Feature::Avx512vpopcntdq,
                X86Feature::Avx512ifma,
                X86Feature::Avx512bf16,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Clzero,
                X86Feature::Mwaitx,
                X86Feature::Clwb,
                X86Feature::Wbnoinvd,
                X86Feature::Pku,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::Gfni,
                X86Feature::Sha,
                X86Feature::Aes,
                X86Feature::Pclmul,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Rdpid,
                X86Feature::CetSs,
                X86Feature::Invpcid,
                X86Feature::AvxVnni,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::UseSqrtEstimate,
                X86Feature::UseRecipEstimate,
                X86Feature::AvoidLeaScale,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
                X86Feature::Prefer512Bit,
                X86Feature::PreferMaskRegisters,
            ],
            aliases: &["znver4"],
            stack_alignment: 16,
            pref_vector_width: 512,
            inline_threshold: 300,
        },
        X86CpuModel {
            name: "zen5",
            display_name: "AMD Zen 5 (Ryzen 9000, Turin/Granite Ridge)",
            family: X86ProcFamily::Zen5,
            year: 2024,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Sse42,
                X86Feature::Popcnt,
                X86Feature::Avx,
                X86Feature::Avx2,
                X86Feature::Avx512f,
                X86Feature::Avx512bw,
                X86Feature::Avx512dq,
                X86Feature::Avx512vl,
                X86Feature::Avx512cd,
                X86Feature::Avx512vbmi,
                X86Feature::Avx512vbmi2,
                X86Feature::Avx512vnni,
                X86Feature::Avx512bitalg,
                X86Feature::Avx512vpopcntdq,
                X86Feature::Avx512ifma,
                X86Feature::Avx512bf16,
                X86Feature::Avx512fp16,
                X86Feature::Avx512vp2intersect,
                X86Feature::Fma,
                X86Feature::F16c,
                X86Feature::Bmi,
                X86Feature::Bmi2,
                X86Feature::Lzcnt,
                X86Feature::Movbe,
                X86Feature::Rdrnd,
                X86Feature::Rdseed,
                X86Feature::Adx,
                X86Feature::Clzero,
                X86Feature::Mwaitx,
                X86Feature::Clwb,
                X86Feature::Wbnoinvd,
                X86Feature::Pku,
                X86Feature::Vaes,
                X86Feature::Vpclmulqdq,
                X86Feature::Gfni,
                X86Feature::Sha,
                X86Feature::Aes,
                X86Feature::Pclmul,
                X86Feature::Fsgsbase,
                X86Feature::Smap,
                X86Feature::Smep,
                X86Feature::Clflushopt,
                X86Feature::Rdpid,
                X86Feature::CetSs,
                X86Feature::Invpcid,
                X86Feature::AvxVnni,
                X86Feature::AvxIfma,
                X86Feature::AvxNeConvert,
                X86Feature::AvxVnniInt8,
                X86Feature::AvxVnniInt16,
                X86Feature::Prefetchi,
                X86Feature::Cmpccxadd,
                X86Feature::RaoInt,
                X86Feature::Serialize,
                X86Feature::Movdiri,
                X86Feature::Movdir64b,
                X86Feature::Enqcmd,
                X86Feature::Xsave,
                X86Feature::Xsaveopt,
                X86Feature::Xsavec,
                X86Feature::Fxr,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::UseIncDec,
                X86Feature::LeaUsesAg,
                X86Feature::UseCmovBranch,
                X86Feature::UseSqrtEstimate,
                X86Feature::UseRecipEstimate,
                X86Feature::AvoidLeaScale,
                X86Feature::FastScalarShiftMasks,
                X86Feature::FastShiftRotate,
                X86Feature::FastBextr,
                X86Feature::FastVariablePerlaneShuffle,
                X86Feature::FastVariableCrosslaneShuffle,
                X86Feature::FastGather,
                X86Feature::Prefer512Bit,
                X86Feature::PreferMaskRegisters,
            ],
            aliases: &["znver5"],
            stack_alignment: 16,
            pref_vector_width: 512,
            inline_threshold: 325,
        },
        // ═══════════════════════════════════════════════════════════════
        // VIA / Zhaoxin / Other
        // ═══════════════════════════════════════════════════════════════
        X86CpuModel {
            name: "winchip-c6",
            display_name: "IDT WinChip C6",
            family: X86ProcFamily::WinchipC6,
            year: 1997,
            is_64bit: false,
            features: &[X86Feature::X87, X86Feature::Mmx, X86Feature::Nopl],
            tuning: &[X86Feature::SoftFloat, X86Feature::SlowLea],
            aliases: &["winchipc6"],
            stack_alignment: 4,
            pref_vector_width: 0,
            inline_threshold: 75,
        },
        X86CpuModel {
            name: "winchip2",
            display_name: "IDT WinChip 2",
            family: X86ProcFamily::Winchip2,
            year: 1998,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Mmx,
                X86Feature::ThreeDNow,
                X86Feature::Nopl,
            ],
            tuning: &[X86Feature::SoftFloat, X86Feature::SlowLea],
            aliases: &["winchip-2"],
            stack_alignment: 4,
            pref_vector_width: 0,
            inline_threshold: 75,
        },
        X86CpuModel {
            name: "c3",
            display_name: "VIA C3 (Nehemiah)",
            family: X86ProcFamily::C3,
            year: 2003,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Nopl,
            ],
            tuning: &[
                X86Feature::OptForSize,
                X86Feature::PadShortFunctions,
                X86Feature::SlowLea,
                X86Feature::SlowIncDec,
                X86Feature::SlowUnalignedMem16,
            ],
            aliases: &["nehemiah"],
            stack_alignment: 4,
            pref_vector_width: 128,
            inline_threshold: 75,
        },
        X86CpuModel {
            name: "c3-2",
            display_name: "VIA C3-2",
            family: X86ProcFamily::C32,
            year: 2005,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Nopl,
            ],
            tuning: &[
                X86Feature::OptForSize,
                X86Feature::PadShortFunctions,
                X86Feature::SlowLea,
                X86Feature::SlowIncDec,
                X86Feature::SlowUnalignedMem16,
            ],
            aliases: &[],
            stack_alignment: 4,
            pref_vector_width: 128,
            inline_threshold: 75,
        },
        X86CpuModel {
            name: "c7",
            display_name: "VIA C7 (Esther)",
            family: X86ProcFamily::C7,
            year: 2005,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Nopl,
            ],
            tuning: &[
                X86Feature::OptForSize,
                X86Feature::PadShortFunctions,
                X86Feature::SlowLea,
                X86Feature::SlowIncDec,
                X86Feature::SlowUnalignedMem16,
            ],
            aliases: &["esther", "c7-esther"],
            stack_alignment: 4,
            pref_vector_width: 128,
            inline_threshold: 75,
        },
        X86CpuModel {
            name: "nano",
            display_name: "VIA Nano (Isaiah)",
            family: X86ProcFamily::Nano,
            year: 2008,
            is_64bit: true,
            features: &[
                X86Feature::X87,
                X86Feature::Cmov,
                X86Feature::Mmx,
                X86Feature::Sse,
                X86Feature::Sse2,
                X86Feature::Sse3,
                X86Feature::Ssse3,
                X86Feature::Sse41,
                X86Feature::Nopl,
                X86Feature::LahfSahf,
            ],
            tuning: &[
                X86Feature::OptForSize,
                X86Feature::PadShortFunctions,
                X86Feature::SlowLea,
                X86Feature::SlowIncDec,
                X86Feature::SlowUnalignedMem16,
            ],
            aliases: &["isaiah", "nano-3000", "nano-x2"],
            stack_alignment: 16,
            pref_vector_width: 128,
            inline_threshold: 100,
        },
        X86CpuModel {
            name: "geode",
            display_name: "AMD Geode (embedded)",
            family: X86ProcFamily::Geode,
            year: 2003,
            is_64bit: false,
            features: &[
                X86Feature::X87,
                X86Feature::Mmx,
                X86Feature::ThreeDNow,
                X86Feature::ThreeDNowA,
                X86Feature::Nopl,
            ],
            tuning: &[
                X86Feature::SoftFloat,
                X86Feature::OptForSize,
                X86Feature::SlowLea,
            ],
            aliases: &["geode-lx", "geode-gx"],
            stack_alignment: 4,
            pref_vector_width: 0,
            inline_threshold: 50,
        },
    ]
}

// ============================================================================
// Feature dependency resolution
// ============================================================================

/// Apply transitive feature dependencies to a feature set.
///
/// If a feature is present, all features it depends on are added
/// (e.g., enabling `avx2` automatically enables `avx`, `sse4.2`, etc.).
pub fn apply_feature_dependencies(features: &mut HashSet<X86Feature>) {
    // SSE chain: SSE4.2 ← SSE4.1 ← SSSE3 ← SSE3 ← SSE2 ← SSE
    if features.contains(&X86Feature::Sse42) {
        features.insert(X86Feature::Sse41);
    }
    if features.contains(&X86Feature::Sse41) {
        features.insert(X86Feature::Ssse3);
    }
    if features.contains(&X86Feature::Ssse3) {
        features.insert(X86Feature::Sse3);
    }
    if features.contains(&X86Feature::Sse3) {
        features.insert(X86Feature::Sse2);
    }
    if features.contains(&X86Feature::Sse2) {
        features.insert(X86Feature::Sse);
    }

    // AVX chain: AVX2 ← AVX ← SSE4.2
    if features.contains(&X86Feature::Avx2) {
        features.insert(X86Feature::Avx);
    }
    if features.contains(&X86Feature::Avx) {
        features.insert(X86Feature::Sse42);
    }

    // AVX-512: all depend on AVX512F
    if features.contains(&X86Feature::Avx512cd)
        || features.contains(&X86Feature::Avx512er)
        || features.contains(&X86Feature::Avx512pf)
        || features.contains(&X86Feature::Avx512bw)
        || features.contains(&X86Feature::Avx512dq)
        || features.contains(&X86Feature::Avx512vl)
        || features.contains(&X86Feature::Avx512vbmi)
        || features.contains(&X86Feature::Avx512vbmi2)
        || features.contains(&X86Feature::Avx512vnni)
        || features.contains(&X86Feature::Avx512bitalg)
        || features.contains(&X86Feature::Avx512vpopcntdq)
        || features.contains(&X86Feature::Avx512fp16)
        || features.contains(&X86Feature::Avx512bf16)
        || features.contains(&X86Feature::Avx512ifma)
        || features.contains(&X86Feature::Avx512vp2intersect)
    {
        features.insert(X86Feature::Avx512f);
    }
    if features.contains(&X86Feature::Avx512f) {
        features.insert(X86Feature::Avx2);
    }

    // FMA / F16C require AVX
    if features.contains(&X86Feature::Fma) || features.contains(&X86Feature::F16c) {
        features.insert(X86Feature::Avx);
    }

    // XOP / FMA4 / LWP require AVX
    if features.contains(&X86Feature::Xop)
        || features.contains(&X86Feature::Fma4)
        || features.contains(&X86Feature::Lwp)
    {
        features.insert(X86Feature::Avx);
    }

    // AVX-VNNI requires AVX2 (and transitively AVX)
    if features.contains(&X86Feature::AvxVnni)
        || features.contains(&X86Feature::AvxVnniInt8)
        || features.contains(&X86Feature::AvxVnniInt16)
    {
        features.insert(X86Feature::Avx2);
    }

    // AVX-IFMA (256-bit) requires AVX2
    if features.contains(&X86Feature::AvxIfma) {
        features.insert(X86Feature::Avx2);
    }

    // AVX-NE-CONVERT requires AVX2
    if features.contains(&X86Feature::AvxNeConvert) {
        features.insert(X86Feature::Avx2);
    }

    // AVX10.1 and AVX10.2 depend on AVX512F
    if features.contains(&X86Feature::Avx10_1_256)
        || features.contains(&X86Feature::Avx10_1_512)
        || features.contains(&X86Feature::Avx10_2)
    {
        features.insert(X86Feature::Avx512f);
    }

    // XSAVE family
    if features.contains(&X86Feature::Xsaveopt)
        || features.contains(&X86Feature::Xsavec)
        || features.contains(&X86Feature::Xsaves)
    {
        features.insert(X86Feature::Xsave);
    }

    // AMX depends on AVX-512
    if features.contains(&X86Feature::AmxTile)
        || features.contains(&X86Feature::AmxBf16)
        || features.contains(&X86Feature::AmxInt8)
        || features.contains(&X86Feature::AmxFp16)
    {
        features.insert(X86Feature::Avx512f);
    }

    // SHA requires SSE2
    if features.contains(&X86Feature::Sha) || features.contains(&X86Feature::Sha512) {
        features.insert(X86Feature::Sse2);
    }

    // VAES / VPCLMULQDQ require AVX (at minimum)
    if features.contains(&X86Feature::Vaes) || features.contains(&X86Feature::Vpclmulqdq) {
        features.insert(X86Feature::Avx);
    }

    // GFNI requires SSE2 and either AVX or AVX-512
    if features.contains(&X86Feature::Gfni) {
        features.insert(X86Feature::Sse2);
    }

    // BMI2 depends on BMI
    if features.contains(&X86Feature::Bmi2) {
        features.insert(X86Feature::Bmi);
    }

    // CET requires SSE2
    if features.contains(&X86Feature::CetSs) {
        features.insert(X86Feature::Sse2);
    }

    // 3DNow!A requires 3DNow!
    if features.contains(&X86Feature::ThreeDNowA) {
        features.insert(X86Feature::ThreeDNow);
    }

    // SM3/SM4 typically require SSE2 and AVX
    if features.contains(&X86Feature::Sm3) || features.contains(&X86Feature::Sm4) {
        features.insert(X86Feature::Sse2);
        features.insert(X86Feature::Avx);
    }

    // SERIALIZE requires SSE2
    if features.contains(&X86Feature::Serialize) {
        features.insert(X86Feature::Sse2);
    }

    // KEYLOCKER (KL/WIDEKL) requires SSE2 and AES
    if features.contains(&X86Feature::Kl) || features.contains(&X86Feature::WideKl) {
        features.insert(X86Feature::Sse2);
        features.insert(X86Feature::Aes);
    }

    // LAHF_SAHF includes SAHF
    if features.contains(&X86Feature::LahfSahf) {
        features.insert(X86Feature::Sahf);
    }

    // Recursive pass: ensure all transitive dependencies are resolved.
    // We iterate until fixpoint since chains can be deep (e.g., AVX512BW → AVX512F → AVX2 → AVX → SSE4.2 → …).
    let mut changed = true;
    while changed {
        let before = features.len();
        // Re-apply key transitive rules that might have been missed in the first pass
        if features.contains(&X86Feature::Sse42) {
            features.insert(X86Feature::Sse41);
        }
        if features.contains(&X86Feature::Sse41) {
            features.insert(X86Feature::Ssse3);
        }
        if features.contains(&X86Feature::Ssse3) {
            features.insert(X86Feature::Sse3);
        }
        if features.contains(&X86Feature::Sse3) {
            features.insert(X86Feature::Sse2);
        }
        if features.contains(&X86Feature::Sse2) {
            features.insert(X86Feature::Sse);
        }
        if features.contains(&X86Feature::Avx2) {
            features.insert(X86Feature::Avx);
        }
        if features.contains(&X86Feature::Avx) {
            features.insert(X86Feature::Sse42);
        }
        if features.contains(&X86Feature::Avx512f) {
            features.insert(X86Feature::Avx2);
        }
        let after = features.len();
        changed = before != after;
    }
}

/// Return the dependency chains as a human-readable list.
pub fn feature_dependency_chains() -> Vec<(&'static str, &'static str)> {
    vec![
        ("sse4.2", "sse4.1"),
        ("sse4.1", "ssse3"),
        ("ssse3", "sse3"),
        ("sse3", "sse2"),
        ("sse2", "sse"),
        ("avx2", "avx"),
        ("avx", "sse4.2"),
        ("avx512vl", "avx512f"),
        ("avx512bw", "avx512f"),
        ("avx512dq", "avx512f"),
        ("avx512cd", "avx512f"),
        ("avx512er", "avx512f"),
        ("avx512pf", "avx512f"),
        ("avx512vbmi", "avx512f"),
        ("avx512vbmi2", "avx512f"),
        ("avx512vnni", "avx512f"),
        ("avx512bitalg", "avx512f"),
        ("avx512vpopcntdq", "avx512f"),
        ("avx512fp16", "avx512f"),
        ("avx512bf16", "avx512f"),
        ("avx512ifma", "avx512f"),
        ("avx512vp2intersect", "avx512f"),
        ("avx512f", "avx2"),
        ("fma", "avx"),
        ("f16c", "avx"),
        ("xop", "avx"),
        ("fma4", "avx"),
        ("lwp", "avx"),
        ("avx_vnni", "avx2"),
        ("avx_vnni_int8", "avx2"),
        ("avx_vnni_int16", "avx2"),
        ("avx_ifma", "avx2"),
        ("avx_ne_convert", "avx2"),
        ("avx10.1-256", "avx512f"),
        ("avx10.1-512", "avx512f"),
        ("avx10.2", "avx512f"),
        ("xsavec", "xsave"),
        ("xsaves", "xsave"),
        ("xsaveopt", "xsave"),
        ("amx_tile", "avx512f"),
        ("amx_bf16", "avx512f"),
        ("amx_int8", "avx512f"),
        ("amx_fp16", "avx512f"),
        ("sha", "sse2"),
        ("sha512", "sse2"),
        ("bmi2", "bmi"),
        ("cet_ss", "sse2"),
        ("vaes", "avx"),
        ("vpclmulqdq", "avx"),
        ("3dnowa", "3dnow"),
        ("lahf_sahf", "sahf"),
    ]
}

// ============================================================================
// Utility: normalise feature names
// ============================================================================

/// Normalise common alternate spellings / aliases for feature names.
fn normalise_feature_name_str(name: &str) -> String {
    match name {
        "sse4.1" | "sse4_1" | "sse41" => "sse4.1".to_string(),
        "sse4.2" | "sse4_2" | "sse42" => "sse4.2".to_string(),
        "avx512f" | "avx-512f" => "avx512f".to_string(),
        "avx512bw" | "avx-512bw" => "avx512bw".to_string(),
        "avx512dq" | "avx-512dq" => "avx512dq".to_string(),
        "avx512vl" | "avx-512vl" => "avx512vl".to_string(),
        "avx512cd" | "avx-512cd" => "avx512cd".to_string(),
        "avx512er" | "avx-512er" => "avx512er".to_string(),
        "avx512pf" | "avx-512pf" => "avx512pf".to_string(),
        "avx512vbmi" | "avx-512vbmi" => "avx512vbmi".to_string(),
        "avx512vbmi2" | "avx-512vbmi2" => "avx512vbmi2".to_string(),
        "avx512vnni" | "avx-512vnni" => "avx512vnni".to_string(),
        "avx512bitalg" | "avx-512bitalg" => "avx512bitalg".to_string(),
        "avx512vpopcntdq" => "avx512vpopcntdq".to_string(),
        "avx512fp16" | "avx-512fp16" => "avx512fp16".to_string(),
        "avx512bf16" | "avx-512bf16" => "avx512bf16".to_string(),
        "avx512ifma" | "avx-512ifma" => "avx512ifma".to_string(),
        "avx512vp2intersect" => "avx512vp2intersect".to_string(),
        "avx_vnni" | "avxvnni" => "avx_vnni".to_string(),
        "avx_vnni_int8" | "avxvnniint8" => "avx_vnni_int8".to_string(),
        "avx_vnni_int16" | "avxvnniint16" => "avx_vnni_int16".to_string(),
        "avx_ifma" | "avxifma" => "avx_ifma".to_string(),
        "avx_ne_convert" | "avxneconvert" => "avx_ne_convert".to_string(),
        "avx10.1-256" | "avx10_1_256" => "avx10.1-256".to_string(),
        "avx10.1-512" | "avx10_1_512" => "avx10.1-512".to_string(),
        "avx10.2" | "avx10_2" => "avx10.2".to_string(),
        "vpclmulqdq" | "vpclmul" => "vpclmulqdq".to_string(),
        "lahf_sahf" | "sahf_lahf" => "lahf_sahf".to_string(),
        "cet_ss" | "cet" => "cet_ss".to_string(),
        "3dnow" | "3d_now" => "3dnow".to_string(),
        "3dnowa" | "3dnow_a" | "3dnow_ext" => "3dnowa".to_string(),
        "amx_tile" | "amxtile" => "amx_tile".to_string(),
        "amx_bf16" | "amxbf16" => "amx_bf16".to_string(),
        "amx_int8" | "amxint8" => "amx_int8".to_string(),
        "amx_fp16" | "amxfp16" => "amx_fp16".to_string(),
        "prefer_128_bit" | "prefer128bit" => "prefer_128_bit".to_string(),
        "prefer_256_bit" | "prefer256bit" => "prefer_256_bit".to_string(),
        "prefer_512_bit" | "prefer512bit" => "prefer_512_bit".to_string(),
        other => other.to_string(),
    }
}

// ============================================================================
// CPU name normalisation (aliases)
// ============================================================================

/// Normalise a CPU name to its canonical form by resolving known aliases.
pub fn normalise_cpu_name(name: &str) -> String {
    let lower = name.to_lowercase();
    match lower.as_str() {
        "386" => "i386".to_string(),
        "486" => "i486".to_string(),
        "586" | "pentium" => "i586".to_string(),
        "686" => "pentiumpro".to_string(),
        "pentiumii" => "pentium2".to_string(),
        "pentiumiii" => "pentium3".to_string(),
        "pentiumiv" | "netburst" => "pentium4".to_string(),
        "pentiumm" | "banias" | "dothan" => "pentium-m".to_string(),
        "merom" | "conroe" | "wolfdale" => "core2".to_string(),
        "corei7" => "nehalem".to_string(),
        "corei7-2" | "snb" => "sandybridge".to_string(),
        "corei7-3" | "ivb" => "ivybridge".to_string(),
        "corei7-4" | "hsw" => "haswell".to_string(),
        "corei7-5" | "bdw" => "broadwell".to_string(),
        "corei7-6" | "skl" => "skylake".to_string(),
        "skx" => "skylake-avx512".to_string(),
        "cnl" => "cannonlake".to_string(),
        "cfl" => "cascadelake".to_string(),
        "cpl" => "cooperlake".to_string(),
        "icl" => "icelake-client".to_string(),
        "icx" => "icelake-server".to_string(),
        "tgl" => "tigerlake".to_string(),
        "rkl" => "rocketlake".to_string(),
        "adl" => "alderlake".to_string(),
        "rpl" => "raptorlake".to_string(),
        "mtl" => "meteorlake".to_string(),
        "arl" => "arrowlake".to_string(),
        "lnl" => "lunarlake".to_string(),
        "spr" => "sapphirerapids".to_string(),
        "emr" => "emeraldrapids".to_string(),
        "gnr" => "graniterapids".to_string(),
        "srf" => "sierraforest".to_string(),
        "cwf" => "clearwaterforest".to_string(),
        "atom" => "bonnell".to_string(),
        "slm" => "silvermont".to_string(),
        "glm" => "goldmont".to_string(),
        "glp" => "goldmont-plus".to_string(),
        "tnt" => "tremont".to_string(),
        "gcm" => "gracemont".to_string(),
        "cst" => "crestmont".to_string(),
        "knl" | "knightslanding" => "knights-landing".to_string(),
        "knm" | "knightsmill" => "knights-mill".to_string(),
        "k62" => "k6-2".to_string(),
        "k63" => "k6-3".to_string(),
        "athlonxp" => "athlon-xp".to_string(),
        "athlonmp" => "athlon-mp".to_string(),
        "athlon4" => "athlon-4".to_string(),
        "athlon64" | "opteron" | "athlon-fx" => "k8".to_string(),
        "opteron-sse3" | "athlon64-sse3" => "k8-sse3".to_string(),
        "amdfam10" | "k10" => "barcelona".to_string(),
        "btver1" => "bobcat".to_string(),
        "btver2" => "jaguar".to_string(),
        "bdver1" => "bulldozer".to_string(),
        "bdver2" => "piledriver".to_string(),
        "bdver3" => "steamroller".to_string(),
        "bdver4" | "bdver5" => "excavator".to_string(),
        "znver1" => "zen1".to_string(),
        "znver2" => "zen2".to_string(),
        "znver3" => "zen3".to_string(),
        "znver4" => "zen4".to_string(),
        "znver5" => "zen5".to_string(),
        "winchipc6" => "winchip-c6".to_string(),
        "winchip-2" => "winchip2".to_string(),
        "nehemiah" => "c3".to_string(),
        "esther" | "c7-esther" => "c7".to_string(),
        "isaiah" | "nano-3000" | "nano-x2" => "nano".to_string(),
        "geode-lx" | "geode-gx" => "geode".to_string(),
        _ => lower,
    }
}

// ============================================================================
// Tests
// ============================================================================

#[cfg(test)]
mod tests {
    use super::*;

    // ── Feature enum tests ─────────────────────────────────────────────

    #[test]
    fn test_feature_name_roundtrip() {
        for feature in X86Feature::all() {
            let name = feature.name();
            let parsed = X86Feature::from_name(name);
            assert_eq!(parsed, Some(*feature), "roundtrip failed for {:?}", feature);
        }
    }

    #[test]
    fn test_feature_from_name_unknown() {
        assert_eq!(X86Feature::from_name("nonexistent_feature"), None);
        assert_eq!(X86Feature::from_name(""), None);
    }

    #[test]
    fn test_feature_count() {
        // We expect at least 80 feature flags
        assert!(X86Feature::all().len() >= 80);
    }

    #[test]
    fn test_isa_extensions_count() {
        let isa = X86Feature::isa_extensions();
        assert!(isa.len() >= 60);
    }

    #[test]
    fn test_tuning_features_count() {
        let tuning = X86Feature::tuning_features();
        assert!(tuning.len() >= 30);
    }

    #[test]
    fn test_feature_descriptions_non_empty() {
        for feature in X86Feature::all() {
            let desc = feature.description();
            assert!(!desc.is_empty(), "missing description for {:?}", feature);
        }
    }

    // ── X86ProcFamily tests ────────────────────────────────────────────

    #[test]
    fn test_proc_family_names() {
        let families = [
            X86ProcFamily::I386,
            X86ProcFamily::P6,
            X86ProcFamily::NetBurst,
            X86ProcFamily::Core2,
            X86ProcFamily::Haswell,
            X86ProcFamily::Skylake,
            X86ProcFamily::AlderLake,
            X86ProcFamily::Zen1,
            X86ProcFamily::Zen5,
            X86ProcFamily::Bonnell,
            X86ProcFamily::C3,
            X86ProcFamily::K8,
        ];
        for family in &families {
            assert!(!family.name().is_empty());
        }
    }

    #[test]
    fn test_proc_family_vendor() {
        assert_eq!(X86ProcFamily::Haswell.vendor(), "Intel");
        assert_eq!(X86ProcFamily::Zen3.vendor(), "AMD");
        assert_eq!(X86ProcFamily::C7.vendor(), "VIA");
        assert_eq!(X86ProcFamily::WinchipC6.vendor(), "IDT");
        assert_eq!(X86ProcFamily::I386.vendor(), "Intel");
    }

    #[test]
    fn test_proc_family_is_hybrid() {
        assert!(X86ProcFamily::AlderLake.is_hybrid());
        assert!(X86ProcFamily::RaptorLake.is_hybrid());
        assert!(X86ProcFamily::MeteorLake.is_hybrid());
        assert!(X86ProcFamily::ArrowLake.is_hybrid());
        assert!(X86ProcFamily::LunarLake.is_hybrid());
        assert!(X86ProcFamily::GraniteRapids.is_hybrid());
        // Not hybrid
        assert!(!X86ProcFamily::Haswell.is_hybrid());
        assert!(!X86ProcFamily::Zen4.is_hybrid());
        assert!(!X86ProcFamily::I386.is_hybrid());
    }

    #[test]
    fn test_proc_family_is_ecore_only() {
        assert!(X86ProcFamily::SierraForest.is_ecore_only());
        assert!(X86ProcFamily::ClearwaterForest.is_ecore_only());
        assert!(!X86ProcFamily::AlderLake.is_ecore_only());
        assert!(!X86ProcFamily::Haswell.is_ecore_only());
    }

    #[test]
    fn test_proc_family_is_big_core() {
        assert!(X86ProcFamily::Haswell.is_big_core());
        assert!(X86ProcFamily::Skylake.is_big_core());
        assert!(X86ProcFamily::Zen3.is_big_core());
        assert!(X86ProcFamily::SapphireRapids.is_big_core());
        assert!(!X86ProcFamily::Bonnell.is_big_core());
        assert!(!X86ProcFamily::I386.is_big_core());
        assert!(!X86ProcFamily::Bobcat.is_big_core());
    }

    #[test]
    fn test_proc_family_is_small_core() {
        assert!(X86ProcFamily::Bonnell.is_small_core());
        assert!(X86ProcFamily::Silvermont.is_small_core());
        assert!(X86ProcFamily::Tremont.is_small_core());
        assert!(X86ProcFamily::Bobcat.is_small_core());
        assert!(X86ProcFamily::Jaguar.is_small_core());
        assert!(!X86ProcFamily::Haswell.is_small_core());
        assert!(!X86ProcFamily::Zen4.is_small_core());
    }

    // ── X86SchedModelInfo tests ────────────────────────────────────────

    #[test]
    fn test_sched_model_info_haswell() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Haswell);
        assert_eq!(info.dispatch_width, 4);
        assert_eq!(info.issue_width, 8);
        assert_eq!(info.rob_size, 192);
        assert!(info.out_of_order);
        assert_eq!(info.l1i_cache_kb, 32);
        assert_eq!(info.l1d_cache_kb, 32);
        assert_eq!(info.l2_cache_kb, 256);
    }

    #[test]
    fn test_sched_model_info_skylake() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Skylake);
        assert_eq!(info.dispatch_width, 4);
        assert_eq!(info.rob_size, 224);
        assert_eq!(info.retire_width, 4);
    }

    #[test]
    fn test_sched_model_info_icelake() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::IceLake);
        assert_eq!(info.dispatch_width, 5);
        assert_eq!(info.rob_size, 352);
    }

    #[test]
    fn test_sched_model_info_alderlake() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::AlderLake);
        assert_eq!(info.dispatch_width, 6);
        assert_eq!(info.issue_width, 12);
        assert_eq!(info.rob_size, 512);
    }

    #[test]
    fn test_sched_model_info_zen4() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Zen4);
        assert_eq!(info.dispatch_width, 6);
        assert_eq!(info.rob_size, 320);
        assert_eq!(info.l2_cache_kb, 1024);
    }

    #[test]
    fn test_sched_model_info_zen5() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Zen5);
        assert_eq!(info.dispatch_width, 8);
        assert_eq!(info.rob_size, 448);
        assert!(info.out_of_order);
    }

    #[test]
    fn test_sched_model_info_bonnell_inorder() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Bonnell);
        assert!(!info.out_of_order);
        assert_eq!(info.dispatch_width, 2);
        assert_eq!(info.rob_size, 0);
    }

    #[test]
    fn test_sched_model_info_i386_inorder() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::I386);
        assert!(!info.out_of_order);
        assert_eq!(info.dispatch_width, 1);
    }

    // ── X86SubtargetFeatures database tests ────────────────────────────

    #[test]
    fn test_database_cpu_count() {
        let db = X86SubtargetFeatures::new();
        assert!(
            db.cpu_count() >= 100,
            "expected >= 100 CPU models, got {}",
            db.cpu_count()
        );
    }

    #[test]
    fn test_database_feature_count() {
        let db = X86SubtargetFeatures::new();
        assert!(
            db.feature_count() >= 80,
            "expected >= 80 features, got {}",
            db.feature_count()
        );
    }

    #[test]
    fn test_lookup_cpu_by_canonical() {
        let db = X86SubtargetFeatures::new();
        let model = db.lookup_cpu("haswell").expect("haswell not found");
        assert_eq!(model.name, "haswell");
        assert_eq!(model.family, X86ProcFamily::Haswell);
    }

    #[test]
    fn test_lookup_cpu_by_alias() {
        let db = X86SubtargetFeatures::new();
        let model = db.lookup_cpu("hsw").expect("hsw alias not found");
        assert_eq!(model.name, "haswell");
        let model2 = db.lookup_cpu("SNB").expect("SNB alias not found");
        assert_eq!(model2.name, "sandybridge");
    }

    #[test]
    fn test_lookup_cpu_case_insensitive() {
        let db = X86SubtargetFeatures::new();
        assert!(db.lookup_cpu("HASWELL").is_some());
        assert!(db.lookup_cpu("ZeN3").is_some());
        assert!(db.lookup_cpu("sKyLaKe").is_some());
    }

    #[test]
    fn test_lookup_unknown_cpu_returns_none() {
        let db = X86SubtargetFeatures::new();
        assert!(db.lookup_cpu("nonexistent").is_none());
        assert!(db.lookup_cpu("").is_none());
    }

    #[test]
    fn test_features_for_cpu_defaults() {
        let db = X86SubtargetFeatures::new();
        // Nonexistent CPU should get generic features
        let features = db.features_for_cpu("nonexistent");
        assert!(features.contains(&X86Feature::Sse2));
        assert!(features.contains(&X86Feature::Cmov));
    }

    #[test]
    fn test_haswell_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("haswell");
        assert!(features.contains(&X86Feature::Avx));
        assert!(features.contains(&X86Feature::Avx2));
        assert!(features.contains(&X86Feature::Fma));
        assert!(features.contains(&X86Feature::Bmi));
        assert!(features.contains(&X86Feature::Bmi2));
        assert!(features.contains(&X86Feature::F16c));
        assert!(features.contains(&X86Feature::Lzcnt));
        assert!(features.contains(&X86Feature::Popcnt));
        assert!(features.contains(&X86Feature::Movbe));
        // Haswell does not have AVX-512
        assert!(!features.contains(&X86Feature::Avx512f));
    }

    #[test]
    fn test_skylake_avx512_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("skylake-avx512");
        assert!(features.contains(&X86Feature::Avx512f));
        assert!(features.contains(&X86Feature::Avx512bw));
        assert!(features.contains(&X86Feature::Avx512dq));
        assert!(features.contains(&X86Feature::Avx512vl));
    }

    #[test]
    fn test_znver3_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("znver3");
        assert!(features.contains(&X86Feature::Avx2));
        assert!(features.contains(&X86Feature::Fma));
        assert!(features.contains(&X86Feature::Clzero));
        assert!(features.contains(&X86Feature::Mwaitx));
        assert!(features.contains(&X86Feature::Vaes));
        assert!(features.contains(&X86Feature::Pku));
        // Zen 3 does not have AVX-512
        assert!(!features.contains(&X86Feature::Avx512f));
    }

    #[test]
    fn test_znver4_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("znver4");
        assert!(features.contains(&X86Feature::Avx512f));
        assert!(features.contains(&X86Feature::Avx512bw));
        assert!(features.contains(&X86Feature::Avx512dq));
        assert!(features.contains(&X86Feature::Avx512vl));
        assert!(features.contains(&X86Feature::Gfni));
    }

    #[test]
    fn test_znver5_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("znver5");
        assert!(features.contains(&X86Feature::Avx512f));
        assert!(features.contains(&X86Feature::Avx512fp16));
        assert!(features.contains(&X86Feature::AvxVnni));
        assert!(features.contains(&X86Feature::AvxIfma));
        assert!(features.contains(&X86Feature::AvxNeConvert));
        assert!(features.contains(&X86Feature::AvxVnniInt8));
        assert!(features.contains(&X86Feature::AvxVnniInt16));
    }

    #[test]
    fn test_sapphirerapids_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("sapphirerapids");
        assert!(features.contains(&X86Feature::AmxTile));
        assert!(features.contains(&X86Feature::AmxBf16));
        assert!(features.contains(&X86Feature::AmxInt8));
        assert!(features.contains(&X86Feature::AmxFp16));
        assert!(features.contains(&X86Feature::Avx512fp16));
        assert!(features.contains(&X86Feature::Tsxldtrk));
        assert!(features.contains(&X86Feature::Serialize));
    }

    #[test]
    fn test_emeraldrapids_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("emeraldrapids");
        assert!(features.contains(&X86Feature::Cmpccxadd));
        assert!(features.contains(&X86Feature::Prefetchi));
        assert!(features.contains(&X86Feature::RaoInt));
    }

    #[test]
    fn test_graniterapids_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("graniterapids");
        assert!(features.contains(&X86Feature::Sha512));
        assert!(features.contains(&X86Feature::Sm3));
        assert!(features.contains(&X86Feature::Sm4));
        assert!(features.contains(&X86Feature::Avx10_2));
        assert!(features.contains(&X86Feature::AvxVnniInt16));
    }

    #[test]
    fn test_i386_baseline() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("i386");
        assert!(features.contains(&X86Feature::X87));
        assert!(!features.contains(&X86Feature::Cmov));
        assert!(!features.contains(&X86Feature::Mmx));
        assert!(!features.contains(&X86Feature::Sse));
    }

    #[test]
    fn test_i686_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("pentiumpro");
        assert!(features.contains(&X86Feature::Cmov));
        assert!(features.contains(&X86Feature::Mmx));
        assert!(!features.contains(&X86Feature::Sse));
    }

    #[test]
    fn test_pentium4_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("pentium4");
        assert!(features.contains(&X86Feature::Sse2));
        assert!(!features.contains(&X86Feature::Sse3));
    }

    #[test]
    fn test_core2_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("core2");
        assert!(features.contains(&X86Feature::Ssse3));
        assert!(!features.contains(&X86Feature::Sse41));
    }

    #[test]
    fn test_bonnell_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("bonnell");
        assert!(features.contains(&X86Feature::Ssse3));
        assert!(features.contains(&X86Feature::Movbe));
        assert!(!features.contains(&X86Feature::Sse41));
        assert!(!features.contains(&X86Feature::Avx));
    }

    #[test]
    fn test_silvermont_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("silvermont");
        assert!(features.contains(&X86Feature::Sse42));
        assert!(features.contains(&X86Feature::Popcnt));
        assert!(!features.contains(&X86Feature::Avx));
    }

    #[test]
    fn test_tremont_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("tremont");
        assert!(features.contains(&X86Feature::Gfni));
        assert!(features.contains(&X86Feature::Clwb));
        assert!(features.contains(&X86Feature::Waitpkg));
    }

    #[test]
    fn test_gracemont_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("gracemont");
        assert!(features.contains(&X86Feature::Avx));
        assert!(features.contains(&X86Feature::Avx2));
        assert!(features.contains(&X86Feature::AvxVnni));
        assert!(!features.contains(&X86Feature::Avx512f));
    }

    #[test]
    fn test_crestmont_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("crestmont");
        assert!(features.contains(&X86Feature::Avx2));
        assert!(features.contains(&X86Feature::AvxIfma));
        assert!(features.contains(&X86Feature::Cmpccxadd));
        assert!(!features.contains(&X86Feature::Avx512f));
    }

    #[test]
    fn test_knl_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("knights-landing");
        assert!(features.contains(&X86Feature::Avx512f));
        assert!(features.contains(&X86Feature::Avx512cd));
        assert!(features.contains(&X86Feature::Avx512er));
        assert!(features.contains(&X86Feature::Avx512pf));
        assert!(!features.contains(&X86Feature::Avx512bw));
        assert!(!features.contains(&X86Feature::Avx512dq));
        assert!(!features.contains(&X86Feature::Avx512vl));
    }

    #[test]
    fn test_knm_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("knights-mill");
        assert!(features.contains(&X86Feature::Avx512vpopcntdq));
    }

    #[test]
    fn test_k6_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("k6");
        assert!(features.contains(&X86Feature::Mmx));
        assert!(!features.contains(&X86Feature::Sse));
    }

    #[test]
    fn test_k62_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("k6-2");
        assert!(features.contains(&X86Feature::ThreeDNow));
    }

    #[test]
    fn test_athlon_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("athlon");
        assert!(features.contains(&X86Feature::Sse));
        assert!(features.contains(&X86Feature::ThreeDNow));
        assert!(!features.contains(&X86Feature::Sse2));
    }

    #[test]
    fn test_k8_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("k8");
        assert!(features.contains(&X86Feature::Sse2));
        assert!(!features.contains(&X86Feature::Sse3));
    }

    #[test]
    fn test_barcelona_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("barcelona");
        assert!(features.contains(&X86Feature::Sse41));
        assert!(features.contains(&X86Feature::Popcnt));
    }

    #[test]
    fn test_bobcat_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("bobcat");
        assert!(features.contains(&X86Feature::Avx));
        assert!(features.contains(&X86Feature::Prfchw));
    }

    #[test]
    fn test_jaguar_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("jaguar");
        assert!(features.contains(&X86Feature::Fma));
        assert!(features.contains(&X86Feature::Bmi2));
    }

    #[test]
    fn test_bulldozer_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("bulldozer");
        assert!(features.contains(&X86Feature::Xop));
        assert!(features.contains(&X86Feature::Fma4));
        assert!(features.contains(&X86Feature::Lwp));
        assert!(features.contains(&X86Feature::Tbm));
    }

    #[test]
    fn test_excavator_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("excavator");
        assert!(features.contains(&X86Feature::Avx2));
        assert!(features.contains(&X86Feature::Mwaitx));
    }

    #[test]
    fn test_c3_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("c3");
        assert!(features.contains(&X86Feature::Sse));
        assert!(!features.contains(&X86Feature::Sse2));
    }

    #[test]
    fn test_c7_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("c7");
        assert!(features.contains(&X86Feature::Sse3));
    }

    #[test]
    fn test_nano_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("nano");
        assert!(features.contains(&X86Feature::Ssse3));
        assert!(features.contains(&X86Feature::Sse41));
    }

    #[test]
    fn test_geode_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("geode");
        assert!(features.contains(&X86Feature::ThreeDNow));
        assert!(features.contains(&X86Feature::ThreeDNowA));
        assert!(!features.contains(&X86Feature::Sse));
    }

    // ── Feature dependency tests ───────────────────────────────────────

    #[test]
    fn test_dep_avx2_implies_avx() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Avx2);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Avx));
        assert!(set.contains(&X86Feature::Sse));
        assert!(set.contains(&X86Feature::Sse2));
    }

    #[test]
    fn test_dep_avx512bw_implies_f() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Avx512bw);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Avx512f));
        assert!(set.contains(&X86Feature::Avx2));
        assert!(set.contains(&X86Feature::Avx));
    }

    #[test]
    fn test_dep_fma_implies_avx() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Fma);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Avx));
        assert!(set.contains(&X86Feature::Sse42));
    }

    #[test]
    fn test_dep_f16c_implies_avx() {
        let mut set = HashSet::new();
        set.insert(X86Feature::F16c);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Avx));
    }

    #[test]
    fn test_dep_xop_implies_avx() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Xop);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Avx));
    }

    #[test]
    fn test_dep_fma4_implies_avx() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Fma4);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Avx));
    }

    #[test]
    fn test_dep_bmi2_implies_bmi() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Bmi2);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Bmi));
    }

    #[test]
    fn test_dep_amx_tile_implies_avx512f() {
        let mut set = HashSet::new();
        set.insert(X86Feature::AmxTile);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Avx512f));
    }

    #[test]
    fn test_dep_sha_implies_sse2() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Sha);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Sse2));
    }

    #[test]
    fn test_dep_cet_implies_sse2() {
        let mut set = HashSet::new();
        set.insert(X86Feature::CetSs);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Sse2));
    }

    #[test]
    fn test_dep_avx10_implies_avx512f() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Avx10_1_256);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Avx512f));
    }

    #[test]
    fn test_dep_avx_vnni_implies_avx2() {
        let mut set = HashSet::new();
        set.insert(X86Feature::AvxVnni);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Avx2));
        assert!(set.contains(&X86Feature::Avx));
    }

    #[test]
    fn test_dep_chains_count() {
        let chains = feature_dependency_chains();
        assert!(
            chains.len() >= 40,
            "expected >= 40 dep chains, got {}",
            chains.len()
        );
    }

    // ── Tuning feature tests ───────────────────────────────────────────

    #[test]
    fn test_tuning_i386() {
        let db = X86SubtargetFeatures::new();
        let tuning = db.tuning_for_cpu("i386");
        assert!(tuning.is_empty());
    }

    #[test]
    fn test_tuning_bonnell() {
        let db = X86SubtargetFeatures::new();
        let tuning = db.tuning_for_cpu("bonnell");
        assert!(tuning.contains(&X86Feature::OptForSize));
        assert!(tuning.contains(&X86Feature::PadShortFunctions));
        assert!(tuning.contains(&X86Feature::AvoidLeaScale));
    }

    #[test]
    fn test_tuning_haswell() {
        let db = X86SubtargetFeatures::new();
        let tuning = db.tuning_for_cpu("haswell");
        assert!(tuning.contains(&X86Feature::FastScalarShiftMasks));
        assert!(tuning.contains(&X86Feature::FastBextr));
    }

    #[test]
    fn test_tuning_znver1() {
        let db = X86SubtargetFeatures::new();
        let tuning = db.tuning_for_cpu("zen1");
        assert!(tuning.contains(&X86Feature::UseSqrtEstimate));
        assert!(tuning.contains(&X86Feature::UseRecipEstimate));
        assert!(tuning.contains(&X86Feature::AvoidLeaScale));
    }

    #[test]
    fn test_tuning_znver5() {
        let db = X86SubtargetFeatures::new();
        let tuning = db.tuning_for_cpu("zen5");
        assert!(tuning.contains(&X86Feature::FastGather));
    }

    #[test]
    fn test_tuning_knl() {
        let db = X86SubtargetFeatures::new();
        let tuning = db.tuning_for_cpu("knights-landing");
        assert!(tuning.contains(&X86Feature::PreferNoGather));
        assert!(tuning.contains(&X86Feature::PreferNoScatter));
        assert!(tuning.contains(&X86Feature::Prefer512Bit));
    }

    // ── CPU name normalisation tests ───────────────────────────────────

    #[test]
    fn test_normalise_cpu_name_aliases() {
        assert_eq!(normalise_cpu_name("hsw"), "haswell");
        assert_eq!(normalise_cpu_name("skl"), "skylake");
        assert_eq!(normalise_cpu_name("skx"), "skylake-avx512");
        assert_eq!(normalise_cpu_name("icx"), "icelake-server");
        assert_eq!(normalise_cpu_name("znver1"), "zen1");
        assert_eq!(normalise_cpu_name("znver4"), "zen4");
        assert_eq!(normalise_cpu_name("bdver4"), "excavator");
        assert_eq!(normalise_cpu_name("btver2"), "jaguar");
        assert_eq!(normalise_cpu_name("knl"), "knights-landing");
        assert_eq!(normalise_cpu_name("knm"), "knights-mill");
    }

    #[test]
    fn test_normalise_cpu_name_unknown_passthrough() {
        assert_eq!(normalise_cpu_name("custom-cpu"), "custom-cpu");
        assert_eq!(normalise_cpu_name(""), "");
    }

    #[test]
    fn test_normalise_feature_name_aliases() {
        assert_eq!(normalise_feature_name_str("sse41"), "sse4.1");
        assert_eq!(normalise_feature_name_str("sse42"), "sse4.2");
        assert_eq!(normalise_feature_name_str("avx-512f"), "avx512f");
        assert_eq!(normalise_feature_name_str("vpclmul"), "vpclmulqdq");
        assert_eq!(normalise_feature_name_str("cet"), "cet_ss");
    }

    // ── Model metadata tests ───────────────────────────────────────────

    #[test]
    fn test_model_has_display_name() {
        let db = X86SubtargetFeatures::new();
        for model in db.all_models() {
            assert!(
                !model.display_name.is_empty(),
                "missing display_name for {}",
                model.name
            );
        }
    }

    #[test]
    fn test_model_has_year() {
        let db = X86SubtargetFeatures::new();
        for model in db.all_models() {
            assert!(model.year >= 1985, "year too early for {}", model.name);
            assert!(model.year <= 2026, "year too late for {}", model.name);
        }
    }

    #[test]
    fn test_64bit_models_have_lahf_sahf() {
        let db = X86SubtargetFeatures::new();
        for model in db.all_models() {
            if model.is_64bit {
                let features = db.features_for_cpu(model.name);
                assert!(
                    features.contains(&X86Feature::LahfSahf),
                    "64-bit model {} missing lahf_sahf",
                    model.name
                );
            }
        }
    }

    #[test]
    fn test_pref_vector_width_sane() {
        let db = X86SubtargetFeatures::new();
        for model in db.all_models() {
            assert!(
                model.pref_vector_width == 0
                    || model.pref_vector_width == 128
                    || model.pref_vector_width == 256
                    || model.pref_vector_width == 512,
                "invalid pref_vector_width {} for {}",
                model.pref_vector_width,
                model.name
            );
        }
    }

    #[test]
    fn test_inline_threshold_sane() {
        let db = X86SubtargetFeatures::new();
        for model in db.all_models() {
            assert!(
                model.inline_threshold >= 50 && model.inline_threshold <= 400,
                "invalid inline_threshold {} for {}",
                model.inline_threshold,
                model.name
            );
        }
    }

    // ── All CPU name roundtrip ─────────────────────────────────────────

    #[test]
    fn test_all_cpu_names_are_lowercase() {
        let db = X86SubtargetFeatures::new();
        for model in db.all_models() {
            assert_eq!(
                model.name,
                model.name.to_lowercase(),
                "CPU name {} is not lowercase",
                model.name
            );
        }
    }

    #[test]
    fn test_all_aliases_are_lowercase() {
        let db = X86SubtargetFeatures::new();
        for model in db.all_models() {
            for alias in model.aliases {
                assert_eq!(
                    alias.to_lowercase(),
                    *alias,
                    "alias {} for {} is not lowercase",
                    alias,
                    model.name
                );
            }
        }
    }

    // ── Hybrid scheduling tests ────────────────────────────────────────

    #[test]
    fn test_hybrid_models_exist() {
        let db = X86SubtargetFeatures::new();
        assert!(db.lookup_cpu("alderlake").is_some());
        assert!(db.lookup_cpu("raptorlake").is_some());
        assert!(db.lookup_cpu("meteorlake").is_some());
        assert!(db.lookup_cpu("arrowlake").is_some());
        assert!(db.lookup_cpu("lunarlake").is_some());
    }

    #[test]
    fn test_ecore_only_models_exist() {
        let db = X86SubtargetFeatures::new();
        assert!(db.lookup_cpu("sierraforest").is_some());
        assert!(db.lookup_cpu("clearwaterforest").is_some());
    }

    #[test]
    fn test_avx512_models_exist() {
        let db = X86SubtargetFeatures::new();
        let avx512_cpus = [
            "skylake-avx512",
            "cascadelake",
            "cooperlake",
            "cannonlake",
            "icelake-client",
            "icelake-server",
            "tigerlake",
            "rocketlake",
            "sapphirerapids",
            "emeraldrapids",
            "graniterapids",
            "knights-landing",
            "knights-mill",
            "zen4",
            "zen5",
        ];
        for cpu in &avx512_cpus {
            let features = db.features_for_cpu(cpu);
            assert!(
                features.contains(&X86Feature::Avx512f),
                "AVX-512 CPU {} missing avx512f",
                cpu
            );
        }
    }

    // ── Feature set coverage tests ─────────────────────────────────────

    #[test]
    fn test_all_features_used_by_some_cpu() {
        let db = X86SubtargetFeatures::new();
        let mut used = HashSet::new();
        for model in db.all_models() {
            for f in model.features {
                used.insert(*f);
            }
            for f in model.tuning {
                used.insert(*f);
            }
        }
        // At least 80 features should be used by some model
        assert!(
            used.len() >= 80,
            "only {} features used by any CPU model",
            used.len()
        );
    }

    #[test]
    fn test_key_isa_features_used() {
        let db = X86SubtargetFeatures::new();
        let mut all_used = HashSet::new();
        for model in db.all_models() {
            for f in model.features {
                all_used.insert(*f);
            }
        }
        let isa = X86Feature::isa_extensions();
        let mut unused_isa = Vec::new();
        for f in isa {
            if !all_used.contains(f) {
                unused_isa.push(f.name());
            }
        }
        // Some ISA features may not be assigned to any specific CPU model
        // (they are enable-only via -march flags), but most should be used.
        // We expect fewer than 15 unused ISA features.
        assert!(
            unused_isa.len() < 15,
            "{} ISA features unused by any CPU: {:?}",
            unused_isa.len(),
            unused_isa
        );
    }

    #[test]
    fn test_prefer_width_consistency() {
        let db = X86SubtargetFeatures::new();
        for model in db.all_models() {
            if model.pref_vector_width == 512 {
                let features = db.features_for_cpu(model.name);
                assert!(
                    features.contains(&X86Feature::Avx512f),
                    "{} prefers 512-bit but lacks avx512f",
                    model.name
                );
            }
            if model.pref_vector_width == 256 {
                let features = db.features_for_cpu(model.name);
                assert!(
                    features.contains(&X86Feature::Avx),
                    "{} prefers 256-bit but lacks avx",
                    model.name
                );
            }
        }
    }

    #[test]
    fn test_x86_64_v2_features() {
        let db = X86SubtargetFeatures::new();
        // x86-64-v2 equivalent: SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT
        let v2_cpus = ["nehalem", "barcelona"];
        for cpu in &v2_cpus {
            let features = db.features_for_cpu(cpu);
            assert!(features.contains(&X86Feature::Sse3));
            assert!(features.contains(&X86Feature::Ssse3));
            assert!(features.contains(&X86Feature::Sse41));
            assert!(features.contains(&X86Feature::Sse42));
            assert!(features.contains(&X86Feature::Popcnt));
        }
    }

    #[test]
    fn test_x86_64_v3_features() {
        let db = X86SubtargetFeatures::new();
        // x86-64-v3 equivalent: AVX, AVX2, BMI, BMI2, FMA, F16C, LZCNT, MOVBE
        let v3_cpus = ["haswell", "excavator"];
        for cpu in &v3_cpus {
            let features = db.features_for_cpu(cpu);
            assert!(features.contains(&X86Feature::Avx));
            assert!(features.contains(&X86Feature::Avx2));
            assert!(features.contains(&X86Feature::Bmi));
            assert!(features.contains(&X86Feature::Bmi2));
            assert!(features.contains(&X86Feature::Fma));
            assert!(features.contains(&X86Feature::F16c));
            assert!(features.contains(&X86Feature::Lzcnt));
        }
    }

    #[test]
    fn test_x86_64_v4_features() {
        let db = X86SubtargetFeatures::new();
        let v4_cpus = ["skylake-avx512", "zen4"];
        for cpu in &v4_cpus {
            let features = db.features_for_cpu(cpu);
            assert!(features.contains(&X86Feature::Avx512f));
            assert!(features.contains(&X86Feature::Avx512bw));
            assert!(features.contains(&X86Feature::Avx512dq));
            assert!(features.contains(&X86Feature::Avx512vl));
        }
    }

    // ── Stack alignment tests ──────────────────────────────────────────

    #[test]
    fn test_stack_alignment_64bit() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.stack_alignment("haswell"), 16);
        assert_eq!(db.stack_alignment("skylake"), 16);
    }

    #[test]
    fn test_stack_alignment_knl() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.stack_alignment("knights-landing"), 64);
    }

    #[test]
    fn test_stack_alignment_i386() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.stack_alignment("i386"), 4);
    }

    // ── Inline threshold tests ─────────────────────────────────────────

    #[test]
    fn test_inline_threshold_haswell() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.inline_threshold("haswell"), 225);
    }

    #[test]
    fn test_inline_threshold_bonnell() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.inline_threshold("bonnell"), 100);
    }

    #[test]
    fn test_inline_threshold_geode() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.inline_threshold("geode"), 50);
    }

    // ── Default impl test ──────────────────────────────────────────────

    #[test]
    fn test_default_database() {
        let db = X86SubtargetFeatures::default();
        assert!(db.cpu_count() >= 100);
    }

    #[test]
    fn test_all_models_iter_yields_all() {
        let db = X86SubtargetFeatures::new();
        let all = db.all_models();
        assert_eq!(all.len(), db.cpu_count());
    }

    #[test]
    fn test_all_cpu_names_iter() {
        let db = X86SubtargetFeatures::new();
        let names = db.all_cpu_names();
        assert!(names.contains(&"haswell"));
        assert!(names.contains(&"zen3"));
        assert!(names.contains(&"i386"));
        assert!(names.contains(&"graniterapids"));
    }

    // ───────────────────────────────────────────────────────────────────
    // Extended per-CPU feature verification tests
    // ───────────────────────────────────────────────────────────────────

    #[test]
    fn test_pentium_mmx_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("pentium-mmx");
        assert!(features.contains(&X86Feature::Mmx));
        assert!(!features.contains(&X86Feature::Sse));
    }

    #[test]
    fn test_pentium3_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("pentium3");
        assert!(features.contains(&X86Feature::Sse));
        assert!(!features.contains(&X86Feature::Sse2));
    }

    #[test]
    fn test_pentium_m_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("pentium-m");
        assert!(features.contains(&X86Feature::Sse2));
        assert!(!features.contains(&X86Feature::Sse3));
    }

    #[test]
    fn test_pentium4m_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("pentium4m");
        assert!(features.contains(&X86Feature::Sse2));
        let tuning = db.tuning_for_cpu("pentium4m");
        assert!(tuning.contains(&X86Feature::OptForSize));
    }

    #[test]
    fn test_prescott_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("prescott");
        assert!(features.contains(&X86Feature::Sse3));
        assert!(!features.contains(&X86Feature::Sse41));
    }

    #[test]
    fn test_nocona_64bit_features() {
        let db = X86SubtargetFeatures::new();
        let model = db.lookup_cpu("nocona").expect("nocona not found");
        assert!(model.is_64bit);
        let features = db.features_for_cpu("nocona");
        assert!(features.contains(&X86Feature::Sse3));
        assert!(features.contains(&X86Feature::LahfSahf));
    }

    #[test]
    fn test_penryn_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("penryn");
        assert!(features.contains(&X86Feature::Sse41));
        assert!(!features.contains(&X86Feature::Sse42));
    }

    #[test]
    fn test_nehalem_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("nehalem");
        assert!(features.contains(&X86Feature::Sse42));
        assert!(features.contains(&X86Feature::Popcnt));
        assert!(!features.contains(&X86Feature::Avx));
    }

    #[test]
    fn test_westmere_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("westmere");
        assert!(features.contains(&X86Feature::Aes));
        assert!(features.contains(&X86Feature::Pclmul));
        assert!(!features.contains(&X86Feature::Avx));
    }

    #[test]
    fn test_sandybridge_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("sandybridge");
        assert!(features.contains(&X86Feature::Avx));
        assert!(!features.contains(&X86Feature::Avx2));
        assert!(!features.contains(&X86Feature::Fma));
    }

    #[test]
    fn test_ivybridge_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("ivybridge");
        assert!(features.contains(&X86Feature::F16c));
        assert!(features.contains(&X86Feature::Rdrnd));
        assert!(features.contains(&X86Feature::Fsgsbase));
    }

    #[test]
    fn test_broadwell_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("broadwell");
        assert!(features.contains(&X86Feature::Rdseed));
        assert!(features.contains(&X86Feature::Adx));
        assert!(features.contains(&X86Feature::Rtm));
        assert!(features.contains(&X86Feature::Smap));
        assert!(features.contains(&X86Feature::Smep));
    }

    #[test]
    fn test_skylake_client_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("skylake");
        assert!(features.contains(&X86Feature::Sgx));
        assert!(features.contains(&X86Feature::Mpx));
        assert!(features.contains(&X86Feature::Xsaves));
        assert!(!features.contains(&X86Feature::Avx512f));
    }

    #[test]
    fn test_cannonlake_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("cannonlake");
        assert!(features.contains(&X86Feature::Avx512vbmi));
        assert!(features.contains(&X86Feature::Avx512ifma));
        assert!(features.contains(&X86Feature::Sha));
        assert!(features.contains(&X86Feature::Vaes));
    }

    #[test]
    fn test_cascadelake_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("cascadelake");
        assert!(features.contains(&X86Feature::Avx512vnni));
        assert!(!features.contains(&X86Feature::Avx512bf16));
    }

    #[test]
    fn test_cooperlake_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("cooperlake");
        assert!(features.contains(&X86Feature::Avx512bf16));
    }

    #[test]
    fn test_icelake_client_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("icelake-client");
        assert!(features.contains(&X86Feature::Avx512vbmi2));
        assert!(features.contains(&X86Feature::Avx512bitalg));
        assert!(features.contains(&X86Feature::Avx512vpopcntdq));
        assert!(features.contains(&X86Feature::Clwb));
        assert!(features.contains(&X86Feature::Invpcid));
        assert!(features.contains(&X86Feature::Waitpkg));
        assert!(features.contains(&X86Feature::Rdpid));
        assert!(features.contains(&X86Feature::Ptwrite));
    }

    #[test]
    fn test_icelake_server_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("icelake-server");
        assert!(features.contains(&X86Feature::Avx512fp16));
        assert!(features.contains(&X86Feature::Enqcmd));
        assert!(features.contains(&X86Feature::Serialize));
        assert!(features.contains(&X86Feature::Tsxldtrk));
        assert!(features.contains(&X86Feature::Cldemote));
        assert!(features.contains(&X86Feature::Movdiri));
        assert!(features.contains(&X86Feature::Movdir64b));
    }

    #[test]
    fn test_tigerlake_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("tigerlake");
        assert!(features.contains(&X86Feature::Avx512vp2intersect));
        assert!(features.contains(&X86Feature::AvxVnni));
        assert!(features.contains(&X86Feature::CetSs));
        assert!(features.contains(&X86Feature::Kl));
        assert!(features.contains(&X86Feature::WideKl));
    }

    #[test]
    fn test_alderlake_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("alderlake");
        assert!(!features.contains(&X86Feature::Avx512f));
        assert!(features.contains(&X86Feature::AvxVnni));
        assert!(features.contains(&X86Feature::CetSs));
        assert!(features.contains(&X86Feature::Hreset));
        assert!(features.contains(&X86Feature::Uintr));
    }

    #[test]
    fn test_raptorlake_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("raptorlake");
        assert!(!features.contains(&X86Feature::Avx512f));
        assert!(features.contains(&X86Feature::AvxVnni));
        assert!(features.contains(&X86Feature::Rtm));
    }

    #[test]
    fn test_meteorlake_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("meteorlake");
        assert!(!features.contains(&X86Feature::Avx512f));
        assert!(features.contains(&X86Feature::AvxIfma));
        assert!(features.contains(&X86Feature::AvxNeConvert));
        assert!(features.contains(&X86Feature::AvxVnniInt8));
        assert!(features.contains(&X86Feature::Cmpccxadd));
        assert!(features.contains(&X86Feature::Prefetchi));
    }

    #[test]
    fn test_arrowlake_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("arrowlake");
        assert!(features.contains(&X86Feature::AvxVnniInt16));
        assert!(features.contains(&X86Feature::RaoInt));
    }

    #[test]
    fn test_lunarlake_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("lunarlake");
        assert!(features.contains(&X86Feature::AvxVnni));
        assert!(features.contains(&X86Feature::AvxIfma));
        assert!(!features.contains(&X86Feature::AvxVnniInt16));
    }

    #[test]
    fn test_sierraforest_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("sierraforest");
        assert!(!features.contains(&X86Feature::Avx512f));
        assert!(features.contains(&X86Feature::Avx10_2));
        assert!(features.contains(&X86Feature::AvxVnniInt16));
        assert!(features.contains(&X86Feature::AmxTile));
    }

    #[test]
    fn test_clearwaterforest_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("clearwaterforest");
        assert!(features.contains(&X86Feature::Sha512));
        assert!(features.contains(&X86Feature::AmxFp16));
    }

    #[test]
    fn test_goldmont_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("goldmont");
        assert!(features.contains(&X86Feature::Rdseed));
        assert!(features.contains(&X86Feature::Sha));
        assert!(!features.contains(&X86Feature::Sgx));
    }

    #[test]
    fn test_goldmont_plus_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("goldmont-plus");
        assert!(features.contains(&X86Feature::Sgx));
        assert!(features.contains(&X86Feature::Rdpid));
        assert!(features.contains(&X86Feature::Ptwrite));
    }

    #[test]
    fn test_k8_sse3_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("k8-sse3");
        assert!(features.contains(&X86Feature::Sse3));
        assert!(!features.contains(&X86Feature::Ssse3));
    }

    #[test]
    fn test_istanbul_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("istanbul");
        assert!(features.contains(&X86Feature::Sse42));
    }

    #[test]
    fn test_shanghai_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("shanghai");
        assert!(features.contains(&X86Feature::Sse42));
        assert!(features.contains(&X86Feature::Popcnt));
    }

    #[test]
    fn test_piledriver_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("piledriver");
        assert!(features.contains(&X86Feature::Fma));
        assert!(features.contains(&X86Feature::Fma4));
        assert!(features.contains(&X86Feature::Bmi2));
    }

    #[test]
    fn test_steamroller_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("steamroller");
        assert!(features.contains(&X86Feature::Avx2));
        assert!(features.contains(&X86Feature::Movbe));
    }

    #[test]
    fn test_athlon_tbird_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("athlon-tbird");
        assert!(features.contains(&X86Feature::Sse));
        assert!(!features.contains(&X86Feature::Sse2));
    }

    #[test]
    fn test_athlon4_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("athlon-4");
        assert!(features.contains(&X86Feature::Sse2));
    }

    #[test]
    fn test_athlon_xp_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("athlon-xp");
        assert!(features.contains(&X86Feature::Sse));
        assert!(!features.contains(&X86Feature::Sse2));
    }

    #[test]
    fn test_athlon_mp_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("athlon-mp");
        assert!(features.contains(&X86Feature::Sse));
    }

    #[test]
    fn test_winchip_c6_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("winchip-c6");
        assert!(features.contains(&X86Feature::Mmx));
        assert!(!features.contains(&X86Feature::Cmov));
        let tuning = db.tuning_for_cpu("winchip-c6");
        assert!(tuning.contains(&X86Feature::SoftFloat));
    }

    #[test]
    fn test_winchip2_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("winchip2");
        assert!(features.contains(&X86Feature::ThreeDNow));
    }

    #[test]
    fn test_c3_2_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("c3-2");
        assert!(features.contains(&X86Feature::Sse2));
    }

    #[test]
    fn test_pentium3m_features() {
        let db = X86SubtargetFeatures::new();
        let features = db.features_for_cpu("pentium3m");
        assert!(features.contains(&X86Feature::Sse));
        let tuning = db.tuning_for_cpu("pentium3m");
        assert!(tuning.contains(&X86Feature::OptForSize));
    }

    // ───────────────────────────────────────────────────────────────────
    // Feature dependency transitive closure tests
    // ───────────────────────────────────────────────────────────────────

    #[test]
    fn test_transitive_sse42_to_sse() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Sse42);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Sse));
        assert!(set.contains(&X86Feature::Sse2));
        assert!(set.contains(&X86Feature::Sse3));
        assert!(set.contains(&X86Feature::Ssse3));
        assert!(set.contains(&X86Feature::Sse41));
        assert!(set.contains(&X86Feature::Sse42));
        // Should NOT add AVX
        assert!(!set.contains(&X86Feature::Avx));
    }

    #[test]
    fn test_transitive_avx2_to_sse() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Avx2);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Avx));
        assert!(set.contains(&X86Feature::Sse42));
        assert!(set.contains(&X86Feature::Sse));
    }

    #[test]
    fn test_transitive_avx512vl_to_sse() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Avx512vl);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Avx512f));
        assert!(set.contains(&X86Feature::Avx2));
        assert!(set.contains(&X86Feature::Avx));
        assert!(set.contains(&X86Feature::Sse));
    }

    #[test]
    fn test_transitive_vaes_to_sse() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Vaes);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Avx));
        assert!(set.contains(&X86Feature::Sse42));
        assert!(set.contains(&X86Feature::Sse));
    }

    #[test]
    fn test_idempotent_apply() {
        let mut set1 = HashSet::new();
        set1.insert(X86Feature::Avx512vbmi);
        apply_feature_dependencies(&mut set1);
        let count1 = set1.len();
        // Second application should not change anything
        apply_feature_dependencies(&mut set1);
        assert_eq!(set1.len(), count1);
    }

    #[test]
    fn test_dep_3dnowa_implies_3dnow() {
        let mut set = HashSet::new();
        set.insert(X86Feature::ThreeDNowA);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::ThreeDNow));
    }

    #[test]
    fn test_dep_sm3_implies_avx() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Sm3);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Avx));
        assert!(set.contains(&X86Feature::Sse2));
    }

    #[test]
    fn test_dep_serialize_implies_sse2() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Serialize);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Sse2));
    }

    #[test]
    fn test_dep_kl_implies_aes() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Kl);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Aes));
        assert!(set.contains(&X86Feature::Sse2));
    }

    #[test]
    fn test_dep_widekl_implies_aes() {
        let mut set = HashSet::new();
        set.insert(X86Feature::WideKl);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Aes));
    }

    #[test]
    fn test_dep_lahf_sahf_implies_sahf() {
        let mut set = HashSet::new();
        set.insert(X86Feature::LahfSahf);
        apply_feature_dependencies(&mut set);
        assert!(set.contains(&X86Feature::Sahf));
    }

    // ───────────────────────────────────────────────────────────────────
    // Scheduling model info — extended tests
    // ───────────────────────────────────────────────────────────────────

    #[test]
    fn test_sched_tremont() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Tremont);
        assert_eq!(info.dispatch_width, 4);
        assert!(info.out_of_order);
        assert!(info.rob_size > 0);
    }

    #[test]
    fn test_sched_gracemont() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Gracemont);
        assert_eq!(info.dispatch_width, 5);
        assert!(info.rob_size >= 200);
    }

    #[test]
    fn test_sched_crestmont() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Crestmont);
        assert_eq!(info.dispatch_width, 6);
        assert!(info.out_of_order);
    }

    #[test]
    fn test_sched_silvermont() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Silvermont);
        assert_eq!(info.dispatch_width, 2);
        assert!(info.out_of_order);
        assert!(info.rob_size > 0);
    }

    #[test]
    fn test_sched_goldmont() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Goldmont);
        assert_eq!(info.dispatch_width, 3);
        assert!(info.rob_size >= 70);
    }

    #[test]
    fn test_sched_knights_landing() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::KnightsLanding);
        assert_eq!(info.dispatch_width, 2);
        assert!(info.out_of_order);
    }

    #[test]
    fn test_sched_k10() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::K10);
        assert_eq!(info.dispatch_width, 3);
        assert!(info.l3_cache_kb > 0);
    }

    #[test]
    fn test_sched_bobcat() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Bobcat);
        assert_eq!(info.dispatch_width, 2);
        assert!(info.out_of_order);
    }

    #[test]
    fn test_sched_jaguar() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Jaguar);
        assert!(info.rob_size >= 60);
        assert!(info.l2_cache_kb >= 2000);
    }

    #[test]
    fn test_sched_bulldozer() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Bulldozer);
        assert_eq!(info.dispatch_width, 4);
    }

    #[test]
    fn test_sched_steamroller() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Steamroller);
        assert_eq!(info.dispatch_width, 4);
        assert!(info.l1i_cache_kb > 32);
    }

    #[test]
    fn test_sched_zen1() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Zen1);
        assert_eq!(info.dispatch_width, 6);
        assert_eq!(info.rob_size, 192);
        assert_eq!(info.l1d_cache_kb, 32);
    }

    #[test]
    fn test_sched_zen2() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Zen2);
        assert!(info.rob_size >= 220);
        assert!(info.l3_cache_kb >= 32000);
    }

    #[test]
    fn test_sched_zen3() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Zen3);
        assert_eq!(info.rob_size, 256);
        assert_eq!(info.load_buffer_size, 96);
    }

    #[test]
    fn test_sched_netburst() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::NetBurst);
        assert_eq!(info.rob_size, 126);
        assert!(info.out_of_order);
    }

    #[test]
    fn test_sched_core2() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Core2);
        assert_eq!(info.dispatch_width, 4);
        assert_eq!(info.rob_size, 96);
        assert!(info.l2_cache_kb >= 6000);
    }

    #[test]
    fn test_sched_p6() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::P6);
        assert_eq!(info.dispatch_width, 3);
        assert_eq!(info.rob_size, 40);
    }

    #[test]
    fn test_sched_pentium_m() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::PentiumM);
        assert_eq!(info.l2_cache_kb, 2048);
    }

    #[test]
    fn test_sched_nehalem() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Nehalem);
        assert_eq!(info.rob_size, 128);
        assert!(info.l3_cache_kb >= 8000);
    }

    #[test]
    fn test_sched_sandybridge() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::SandyBridge);
        assert_eq!(info.rob_size, 168);
    }

    #[test]
    fn test_sched_broadwell() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Broadwell);
        assert_eq!(info.rob_size, 192);
    }

    #[test]
    fn test_sched_skylake_server() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::SkylakeServer);
        assert!(info.l2_cache_kb >= 1000);
        assert!(info.l3_cache_kb >= 16000);
    }

    #[test]
    fn test_sched_cannonlake() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::CannonLake);
        assert_eq!(info.issue_width, 10);
    }

    #[test]
    fn test_sched_tigerlake() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::TigerLake);
        assert!(info.l2_cache_kb >= 1200);
    }

    #[test]
    fn test_sched_rocketlake() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::RocketLake);
        assert_eq!(info.dispatch_width, 5);
    }

    #[test]
    fn test_sched_meteorlake() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::MeteorLake);
        assert!(info.l1i_cache_kb >= 60);
        assert!(info.l2_cache_kb >= 2000);
    }

    #[test]
    fn test_sched_arrowlake() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::ArrowLake);
        assert_eq!(info.dispatch_width, 8);
        assert!(info.rob_size >= 500);
    }

    #[test]
    fn test_sched_lunarlake() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::LunarLake);
        assert_eq!(info.dispatch_width, 8);
        assert!(info.l2_cache_kb >= 2500);
    }

    #[test]
    fn test_sched_sapphirerapids() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::SapphireRapids);
        assert!(info.l3_cache_kb >= 60000);
        assert_eq!(info.load_buffer_size, 192);
    }

    #[test]
    fn test_sched_graniterapids() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::GraniteRapids);
        assert!(info.l1i_cache_kb >= 60);
    }

    #[test]
    fn test_sched_sierraforest() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::SierraForest);
        assert_eq!(info.dispatch_width, 4);
        assert_eq!(info.l3_cache_kb, 0);
    }

    #[test]
    fn test_sched_clearwaterforest() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::ClearwaterForest);
        assert_eq!(info.dispatch_width, 4);
    }

    #[test]
    fn test_sched_k6() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::K6);
        assert!(info.out_of_order);
        assert_eq!(info.dispatch_width, 2);
    }

    #[test]
    fn test_sched_k7() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::K7);
        assert_eq!(info.dispatch_width, 3);
        assert!(info.l1i_cache_kb >= 60);
    }

    #[test]
    fn test_sched_k8() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::K8);
        assert_eq!(info.rob_size, 72);
    }

    #[test]
    fn test_sched_nano() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Nano);
        assert_eq!(info.dispatch_width, 3);
        assert!(info.rob_size > 0);
    }

    #[test]
    fn test_sched_c3() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::C3);
        assert!(!info.out_of_order);
        assert_eq!(info.dispatch_width, 1);
    }

    #[test]
    fn test_sched_c7() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::C7);
        assert!(info.out_of_order);
        assert!(info.rob_size > 0);
    }

    #[test]
    fn test_sched_geode() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::Geode);
        assert!(!info.out_of_order);
        assert_eq!(info.rob_size, 0);
    }

    #[test]
    fn test_sched_winchip() {
        let info = X86SchedModelInfo::for_family(X86ProcFamily::WinchipC6);
        assert!(!info.out_of_order);
        assert_eq!(info.dispatch_width, 1);
    }

    // ───────────────────────────────────────────────────────────────────
    // Extended alias lookup tests
    // ───────────────────────────────────────────────────────────────────

    #[test]
    fn test_alias_corei7() {
        let db = X86SubtargetFeatures::new();
        assert!(db.lookup_cpu("corei7").is_some());
        assert_eq!(db.lookup_cpu("corei7").unwrap().name, "nehalem");
    }

    #[test]
    fn test_alias_corei7_2() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("corei7-2").unwrap().name, "sandybridge");
    }

    #[test]
    fn test_alias_corei7_3() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("corei7-3").unwrap().name, "ivybridge");
    }

    #[test]
    fn test_alias_corei7_4() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("corei7-4").unwrap().name, "haswell");
    }

    #[test]
    fn test_alias_corei7_5() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("corei7-5").unwrap().name, "broadwell");
    }

    #[test]
    fn test_alias_corei7_6() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("corei7-6").unwrap().name, "skylake");
    }

    #[test]
    fn test_alias_merom() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("merom").unwrap().name, "core2");
    }

    #[test]
    fn test_alias_atom() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("atom").unwrap().name, "bonnell");
    }

    #[test]
    fn test_alias_btver1() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("btver1").unwrap().name, "bobcat");
    }

    #[test]
    fn test_alias_btver2() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("btver2").unwrap().name, "jaguar");
    }

    #[test]
    fn test_alias_bdver1() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("bdver1").unwrap().name, "bulldozer");
    }

    #[test]
    fn test_alias_bdver2() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("bdver2").unwrap().name, "piledriver");
    }

    #[test]
    fn test_alias_bdver3() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("bdver3").unwrap().name, "steamroller");
    }

    #[test]
    fn test_alias_bdver4() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("bdver4").unwrap().name, "excavator");
    }

    #[test]
    fn test_alias_bdver5() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("bdver5").unwrap().name, "excavator");
    }

    #[test]
    fn test_alias_znver1() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("znver1").unwrap().name, "zen1");
    }

    #[test]
    fn test_alias_znver2() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("znver2").unwrap().name, "zen2");
    }

    #[test]
    fn test_alias_znver3() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("znver3").unwrap().name, "zen3");
    }

    #[test]
    fn test_alias_znver4() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("znver4").unwrap().name, "zen4");
    }

    #[test]
    fn test_alias_znver5() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("znver5").unwrap().name, "zen5");
    }

    #[test]
    fn test_alias_athlon64() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("athlon64").unwrap().name, "k8");
    }

    #[test]
    fn test_alias_opteron() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("opteron").unwrap().name, "k8");
    }

    #[test]
    fn test_alias_amdfam10() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("amdfam10").unwrap().name, "barcelona");
    }

    #[test]
    fn test_alias_knightslanding() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(
            db.lookup_cpu("knightslanding").unwrap().name,
            "knights-landing"
        );
    }

    #[test]
    fn test_alias_knightsmill() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("knightsmill").unwrap().name, "knights-mill");
    }

    #[test]
    fn test_alias_686() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.lookup_cpu("686").unwrap().name, "pentiumpro");
    }

    // ───────────────────────────────────────────────────────────────────
    // X86Feature::from_name alias tests
    // ───────────────────────────────────────────────────────────────────

    #[test]
    fn test_feature_alias_sse41_underscore() {
        assert_eq!(X86Feature::from_name("sse4_1"), Some(X86Feature::Sse41));
    }

    #[test]
    fn test_feature_alias_sse41() {
        assert_eq!(X86Feature::from_name("sse41"), Some(X86Feature::Sse41));
    }

    #[test]
    fn test_feature_alias_sse4_2() {
        assert_eq!(X86Feature::from_name("sse4_2"), Some(X86Feature::Sse42));
    }

    #[test]
    fn test_feature_alias_avx_512f() {
        assert_eq!(X86Feature::from_name("avx-512f"), Some(X86Feature::Avx512f));
    }

    #[test]
    fn test_feature_alias_avx_512bw() {
        assert_eq!(
            X86Feature::from_name("avx-512bw"),
            Some(X86Feature::Avx512bw)
        );
    }

    #[test]
    fn test_feature_alias_avx_512dq() {
        assert_eq!(
            X86Feature::from_name("avx-512dq"),
            Some(X86Feature::Avx512dq)
        );
    }

    #[test]
    fn test_feature_alias_vpclmul() {
        assert_eq!(
            X86Feature::from_name("vpclmul"),
            Some(X86Feature::Vpclmulqdq)
        );
    }

    #[test]
    fn test_feature_alias_cet() {
        assert_eq!(X86Feature::from_name("cet"), Some(X86Feature::CetSs));
    }

    #[test]
    fn test_feature_alias_lahf_sahf_swap() {
        assert_eq!(
            X86Feature::from_name("sahf_lahf"),
            Some(X86Feature::LahfSahf)
        );
    }

    #[test]
    fn test_feature_alias_avx10_1_256_underscore() {
        assert_eq!(
            X86Feature::from_name("avx10_1_256"),
            Some(X86Feature::Avx10_1_256)
        );
    }

    #[test]
    fn test_feature_alias_avx10_2_underscore() {
        assert_eq!(X86Feature::from_name("avx10_2"), Some(X86Feature::Avx10_2));
    }

    #[test]
    fn test_feature_alias_3d_now() {
        assert_eq!(X86Feature::from_name("3d_now"), Some(X86Feature::ThreeDNow));
    }

    #[test]
    fn test_feature_alias_3dnow_ext() {
        assert_eq!(
            X86Feature::from_name("3dnow_ext"),
            Some(X86Feature::ThreeDNowA)
        );
    }

    #[test]
    fn test_feature_alias_amxtile() {
        assert_eq!(X86Feature::from_name("amxtile"), Some(X86Feature::AmxTile));
    }

    #[test]
    fn test_feature_alias_avxvnni() {
        assert_eq!(X86Feature::from_name("avxvnni"), Some(X86Feature::AvxVnni));
    }

    #[test]
    fn test_feature_alias_avxifma() {
        assert_eq!(X86Feature::from_name("avxifma"), Some(X86Feature::AvxIfma));
    }

    // ───────────────────────────────────────────────────────────────────
    // X86CpuModel methods tests
    // ───────────────────────────────────────────────────────────────────

    #[test]
    fn test_model_sched_info() {
        let db = X86SubtargetFeatures::new();
        let model = db.lookup_cpu("haswell").unwrap();
        let info = model.sched_info();
        assert_eq!(info.dispatch_width, 4);
    }

    #[test]
    fn test_model_all_feature_names() {
        let db = X86SubtargetFeatures::new();
        let model = db.lookup_cpu("skylake").unwrap();
        let names = model.all_feature_names();
        assert!(names.contains(&"avx".to_string()));
        assert!(names.contains(&"sse".to_string()));
        // Should have no duplicates
        let mut deduped = names.clone();
        deduped.dedup();
        assert_eq!(names.len(), deduped.len());
    }

    #[test]
    fn test_model_has_feature_named() {
        let db = X86SubtargetFeatures::new();
        let model = db.lookup_cpu("znver4").unwrap();
        assert!(model.has_feature_named("avx512f"));
        assert!(model.has_feature_named("avx"));
        assert!(!model.has_feature_named("amx_tile"));
    }

    #[test]
    fn test_model_has_feature_named_unknown() {
        let db = X86SubtargetFeatures::new();
        let model = db.lookup_cpu("haswell").unwrap();
        assert!(!model.has_feature_named("nonexistent"));
    }

    // ───────────────────────────────────────────────────────────────────
    // Sched_model_for_cpu wrapper test
    // ───────────────────────────────────────────────────────────────────

    #[test]
    fn test_sched_for_cpu_variants() {
        let db = X86SubtargetFeatures::new();
        let haswell_sched = db.sched_for_cpu("haswell");
        assert_eq!(haswell_sched.dispatch_width, 4);
        let i386_sched = db.sched_for_cpu("i386");
        assert_eq!(i386_sched.dispatch_width, 1);
        // Unknown falls back to Core2
        let unknown_sched = db.sched_for_cpu("nonexistent");
        assert_eq!(unknown_sched.dispatch_width, 4);
        assert_eq!(unknown_sched.rob_size, 96);
    }

    // ───────────────────────────────────────────────────────────────────
    // family_for_cpu test
    // ───────────────────────────────────────────────────────────────────

    #[test]
    fn test_family_for_cpu() {
        let db = X86SubtargetFeatures::new();
        assert_eq!(db.family_for_cpu("haswell"), X86ProcFamily::Haswell);
        assert_eq!(db.family_for_cpu("zen3"), X86ProcFamily::Zen3);
        assert_eq!(db.family_for_cpu("bonnell"), X86ProcFamily::Bonnell);
        assert_eq!(db.family_for_cpu("i386"), X86ProcFamily::I386);
        // Unknown
        assert_eq!(db.family_for_cpu("unknown"), X86ProcFamily::Core2);
    }

    #[test]
    fn test_all_features_method() {
        let db = X86SubtargetFeatures::new();
        let all = db.all_features();
        assert!(all.len() >= 80);
        // Check each entry has proper fields
        for (feature, name, desc) in &all {
            assert!(!name.is_empty());
            assert!(!desc.is_empty());
            assert_eq!(*name, feature.name());
        }
    }

    // ───────────────────────────────────────────────────────────────────
    // End-to-end feature string resolution
    // ───────────────────────────────────────────────────────────────────

    #[test]
    fn test_feature_names_for_cpu_returns_sorted() {
        let db = X86SubtargetFeatures::new();
        let names = db.feature_names_for_cpu("haswell");
        // Should contain canonical names
        assert!(names.contains("avx"));
        assert!(names.contains("avx2"));
        assert!(names.contains("fma"));
    }

    #[test]
    fn test_no_duplicate_features_in_models() {
        let db = X86SubtargetFeatures::new();
        for model in db.all_models() {
            let mut seen = HashSet::new();
            for f in model.features.iter().chain(model.tuning.iter()) {
                if !seen.insert(f) {
                    panic!("duplicate feature {:?} in model {}", f, model.name);
                }
            }
        }
    }

    // ───────────────────────────────────────────────────────────────────
    // Order of CPU models (chronological sanity)
    // ───────────────────────────────────────────────────────────────────

    #[test]
    fn test_zen_years_monotonic() {
        let db = X86SubtargetFeatures::new();
        let z1 = db.lookup_cpu("zen1").unwrap().year;
        let z2 = db.lookup_cpu("zen2").unwrap().year;
        let z3 = db.lookup_cpu("zen3").unwrap().year;
        let z4 = db.lookup_cpu("zen4").unwrap().year;
        let z5 = db.lookup_cpu("zen5").unwrap().year;
        assert!(z1 < z2);
        assert!(z2 < z3);
        assert!(z3 < z4);
        assert!(z4 < z5);
    }

    #[test]
    fn test_intel_core_years_monotonic() {
        let db = X86SubtargetFeatures::new();
        let core2_y = db.lookup_cpu("core2").unwrap().year;
        let nehalem_y = db.lookup_cpu("nehalem").unwrap().year;
        let sandy_y = db.lookup_cpu("sandybridge").unwrap().year;
        let haswell_y = db.lookup_cpu("haswell").unwrap().year;
        let skylake_y = db.lookup_cpu("skylake").unwrap().year;
        assert!(core2_y < nehalem_y);
        assert!(nehalem_y < sandy_y);
        assert!(sandy_y < haswell_y);
        assert!(haswell_y < skylake_y);
    }

    #[test]
    fn test_atom_years_monotonic() {
        let db = X86SubtargetFeatures::new();
        let bonnell_y = db.lookup_cpu("bonnell").unwrap().year;
        let silvermont_y = db.lookup_cpu("silvermont").unwrap().year;
        let goldmont_y = db.lookup_cpu("goldmont").unwrap().year;
        let tremont_y = db.lookup_cpu("tremont").unwrap().year;
        let gracemont_y = db.lookup_cpu("gracemont").unwrap().year;
        assert!(bonnell_y < silvermont_y);
        assert!(silvermont_y < goldmont_y);
        assert!(goldmont_y < tremont_y);
        assert!(tremont_y < gracemont_y);
    }

    #[test]
    fn test_all_cpu_years_valid() {
        let db = X86SubtargetFeatures::new();
        for model in db.all_models() {
            assert!(
                model.year >= 1985,
                "CPU {} year {} too early",
                model.name,
                model.year
            );
            assert!(
                model.year <= 2026,
                "CPU {} year {} too far in future",
                model.name,
                model.year
            );
        }
    }

    // ───────────────────────────────────────────────────────────────────
    // Feature string resolution (cross-check with normalise)
    // ───────────────────────────────────────────────────────────────────

    #[test]
    fn test_normalise_feature_name_unknown_passthrough() {
        assert_eq!(normalise_feature_name_str("custom"), "custom");
        assert_eq!(normalise_feature_name_str(""), "");
    }

    #[test]
    fn test_normalise_cpu_name_with_case() {
        // normalise_cpu_name lowercases input
        assert_eq!(normalise_cpu_name("HASWELL"), "haswell");
        assert_eq!(normalise_cpu_name("ZNVER4"), "znver4");
    }

    // ───────────────────────────────────────────────────────────────────
    // Multiple feature enable (cumulative dependencies)
    // ───────────────────────────────────────────────────────────────────

    #[test]
    fn test_multiple_features_cumulative() {
        let mut set = HashSet::new();
        set.insert(X86Feature::Avx512f);
        set.insert(X86Feature::Vaes);
        set.insert(X86Feature::Sha);
        apply_feature_dependencies(&mut set);
        // AVX512F → AVX2 → AVX → SSE4.2 → … → SSE
        assert!(set.contains(&X86Feature::Avx2));
        assert!(set.contains(&X86Feature::Avx));
        assert!(set.contains(&X86Feature::Sse));
        // VAES → AVX
        assert!(set.contains(&X86Feature::Avx));
        // SHA → SSE2
        assert!(set.contains(&X86Feature::Sse2));
    }

    #[test]
    fn test_empty_set_no_change() {
        let mut set: HashSet<X86Feature> = HashSet::new();
        apply_feature_dependencies(&mut set);
        assert!(set.is_empty());
    }

    #[test]
    fn test_single_feature_x87() {
        let mut set = HashSet::new();
        set.insert(X86Feature::X87);
        apply_feature_dependencies(&mut set);
        assert_eq!(set.len(), 1);
        assert!(set.contains(&X86Feature::X87));
    }

    // ───────────────────────────────────────────────────────────────────
    // Feature count consistency
    // ───────────────────────────────────────────────────────────────────

    #[test]
    fn test_every_model_has_at_least_one_feature() {
        let db = X86SubtargetFeatures::new();
        for model in db.all_models() {
            assert!(!model.features.is_empty(), "{} has no features", model.name);
        }
    }

    #[test]
    fn test_64bit_implies_sse2_in_modern_cpus() {
        let db = X86SubtargetFeatures::new();
        for model in db.all_models() {
            if model.is_64bit && model.year >= 2006 {
                let features = db.features_for_cpu(model.name);
                assert!(
                    features.contains(&X86Feature::Sse2),
                    "64-bit CPU {} (year {}) missing SSE2",
                    model.name,
                    model.year
                );
            }
        }
    }
}

/// Alias for X86Feature — used as X86IsaFeature in some consumers.
pub type X86IsaFeature = X86Feature;