limine_protocol/structures/
smpinfo.rs

1use core::sync::atomic::{AtomicU64, Ordering};
2
3#[repr(C)]
4#[derive(Debug)]
5/// CPU info structure
6pub struct SMPInfo {
7    /// The ID of the processor
8    pub processor_id: u32,
9    /// The local APIC ID of the processor
10    pub lapic_id: u32,
11    /// This is reserved
12    reserved: u64,
13    /// The address to jump to
14    pub goto_address: AtomicU64,
15    /// An extra argument, free for use
16    pub extra_argument: u64,
17}
18
19#[cfg(test)]
20impl SMPInfo {
21    pub fn new_empty() -> Self {
22        Self {
23            processor_id: 0,
24            lapic_id: 0,
25            reserved: 0,
26            goto_address: AtomicU64::new(0),
27            extra_argument: 0,
28        }
29    }
30}
31
32impl PartialEq for SMPInfo {
33    fn eq(&self, other: &Self) -> bool {
34        self.processor_id == other.processor_id
35            && self.lapic_id == other.lapic_id
36            && self.reserved == other.reserved
37            && self.goto_address.load(Ordering::Relaxed)
38                == other.goto_address.load(Ordering::Relaxed)
39            && self.extra_argument == other.extra_argument
40    }
41}
42
43impl Eq for SMPInfo {}
limine_protocol/structures/smpinfo.rs

limine_protocol/structures/
smpinfo.rs
