libxen 0.5.0

Safe bindings for Xen libraries
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207

use xen_sys::vm_event_regs_x86;

use super::super::super::{VmEventRegs, VmEventSelectorReg};

#[derive(Debug)]
pub struct VmEventRegsX86 {
    pub rax: u64,
    pub rcx: u64,
    pub rdx: u64,
    pub rbx: u64,
    pub rsp: u64,
    pub rbp: u64,
    pub rsi: u64,
    pub rdi: u64,
    pub r8: u64,
    pub r9: u64,
    pub r10: u64,
    pub r11: u64,
    pub r12: u64,
    pub r13: u64,
    pub r14: u64,
    pub r15: u64,
    pub rflags: u64,
    pub dr6: u64,
    pub dr7: u64,
    pub rip: u64,
    pub cr0: u64,
    pub cr2: u64,
    pub cr3: u64,
    pub cr4: u64,
    pub sysenter_cs: u64,
    pub sysenter_esp: u64,
    pub sysenter_eip: u64,
    pub msr_efer: u64,
    pub msr_star: u64,
    pub msr_lstar: u64,
    pub gdtr_base: u64,

    // When VM_EVENT_FLAG_NESTED_P2M is set, this event comes from a nested
    // VM.  npt_base is the guest physical address of the L1 hypervisors
    // EPT/NPT tables for the nested guest.
    //
    // All bits outside of architectural address ranges are reserved for
    // future metadata.
    pub npt_base: u64,

    // Current position in the vmtrace buffer, or ~0 if vmtrace is not active.
    //
    // For Intel Processor Trace, it is the upper half of MSR_RTIT_OUTPUT_MASK.
    pub vmtrace_pos: u64,

    pub cs_base: u32,
    pub ss_base: u32,
    pub ds_base: u32,
    pub es_base: u32,
    pub fs_base: u64,
    pub gs_base: u64,
    pub cs: VmEventSelectorReg,
    pub ss: VmEventSelectorReg,
    pub ds: VmEventSelectorReg,
    pub es: VmEventSelectorReg,
    pub fs: VmEventSelectorReg,
    pub gs: VmEventSelectorReg,
    pub shadow_gs: u64,
    pub gdtr_limit: u16,
    pub cs_sel: u16,
    pub ss_sel: u16,
    pub ds_sel: u16,
    pub es_sel: u16,
    pub fs_sel: u16,
    pub gs_sel: u16,
}

impl From<vm_event_regs_x86> for VmEventRegsX86 {
    fn from(value: vm_event_regs_x86) -> Self {
        Self {
            rax: value.rax,
            rcx: value.rcx,
            rdx: value.rdx,
            rbx: value.rbx,
            rsp: value.rsp,
            rbp: value.rbp,
            rsi: value.rsi,
            rdi: value.rdi,
            r8: value.r8,
            r9: value.r9,
            r10: value.r10,
            r11: value.r11,
            r12: value.r12,
            r13: value.r13,
            r14: value.r14,
            r15: value.r15,
            rflags: value.rflags,
            dr6: value.dr6,
            dr7: value.dr7,
            rip: value.rip,
            cr0: value.cr0,
            cr2: value.cr2,
            cr3: value.cr3,
            cr4: value.cr4,
            sysenter_cs: value.sysenter_cs,
            sysenter_esp: value.sysenter_esp,
            sysenter_eip: value.sysenter_eip,
            msr_efer: value.msr_efer,
            msr_star: value.msr_star,
            msr_lstar: value.msr_lstar,
            gdtr_base: value.gdtr_base,
            npt_base: value.npt_base,
            vmtrace_pos: value.vmtrace_pos,
            cs_base: value.cs_base,
            ss_base: value.ss_base,
            ds_base: value.ds_base,
            es_base: value.es_base,
            fs_base: value.fs_base,
            gs_base: value.gs_base,
            cs: value.cs.into(),
            ss: value.ss.into(),
            ds: value.ds.into(),
            es: value.es.into(),
            fs: value.fs.into(),
            gs: value.gs.into(),
            shadow_gs: value.shadow_gs,
            gdtr_limit: value.gdtr_limit,
            cs_sel: value.cs_sel,
            ss_sel: value.ss_sel,
            ds_sel: value.ds_sel,
            es_sel: value.es_sel,
            fs_sel: value.fs_sel,
            gs_sel: value.gs_sel,
        }
    }
}

impl From<VmEventRegsX86> for vm_event_regs_x86 {
    fn from(value: VmEventRegsX86) -> Self {
        Self {
            rax: value.rax,
            rcx: value.rcx,
            rdx: value.rdx,
            rbx: value.rbx,
            rsp: value.rsp,
            rbp: value.rbp,
            rsi: value.rsi,
            rdi: value.rdi,
            r8: value.r8,
            r9: value.r9,
            r10: value.r10,
            r11: value.r11,
            r12: value.r12,
            r13: value.r13,
            r14: value.r14,
            r15: value.r15,
            rflags: value.rflags,
            dr6: value.dr6,
            dr7: value.dr7,
            rip: value.rip,
            cr0: value.cr0,
            cr2: value.cr2,
            cr3: value.cr3,
            cr4: value.cr4,
            sysenter_cs: value.sysenter_cs,
            sysenter_esp: value.sysenter_esp,
            sysenter_eip: value.sysenter_eip,
            msr_efer: value.msr_efer,
            msr_star: value.msr_star,
            msr_lstar: value.msr_lstar,
            gdtr_base: value.gdtr_base,
            npt_base: value.npt_base,
            vmtrace_pos: value.vmtrace_pos,
            cs_base: value.cs_base,
            ss_base: value.ss_base,
            ds_base: value.ds_base,
            es_base: value.es_base,
            fs_base: value.fs_base,
            gs_base: value.gs_base,
            cs: value.cs.into(),
            ss: value.ss.into(),
            ds: value.ds.into(),
            es: value.es.into(),
            fs: value.fs.into(),
            gs: value.gs.into(),
            shadow_gs: value.shadow_gs,
            gdtr_limit: value.gdtr_limit,
            cs_sel: value.cs_sel,
            ss_sel: value.ss_sel,
            ds_sel: value.ds_sel,
            es_sel: value.es_sel,
            fs_sel: value.fs_sel,
            gs_sel: value.gs_sel,
            _pad: Default::default(),
        }
    }
}

impl From<vm_event_regs_x86> for VmEventRegs {
    fn from(value: vm_event_regs_x86) -> Self {
        Self::X86(value.into())
    }
}

impl From<VmEventRegs> for vm_event_regs_x86 {
    fn from(value: VmEventRegs) -> Self {
        match value {
            VmEventRegs::X86(regs) => regs.into(),
        }
    }
}