libmwemu 0.24.4

x86 32/64bits and system internals emulator, for securely emulating malware and other stuff.
Documentation
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
use crate::*;

// VDPPS - Dot Product of Packed Single-Precision Floating-Point Values
//
// VDPPS computes the dot product of packed single-precision floating-point values
// from the source operands and stores the result in the destination operand.
//
// An 8-bit immediate operand controls which elements participate in the dot product
// calculation and which elements of the result are written:
//
// - Bits 7:4 control which source elements are multiplied and summed
//   - Bit 7: multiply src1[3] * src2[3]
//   - Bit 6: multiply src1[2] * src2[2]
//   - Bit 5: multiply src1[1] * src2[1]
//   - Bit 4: multiply src1[0] * src2[0]
//
// - Bits 3:0 control which destination elements receive the result
//   - Bit 3: write result to dst[3]
//   - Bit 2: write result to dst[2]
//   - Bit 1: write result to dst[1]
//   - Bit 0: write result to dst[0]
//
// Example: imm8 = 0xFF means all 4 elements participate, result goes to all 4 elements
//          imm8 = 0xF1 means all 4 elements participate, result goes to dst[0] only
//          imm8 = 0x71 means elements 0,1,2 participate, result goes to dst[0] only
//
// For 256-bit (YMM), the operation is performed independently on the lower and upper 128-bit lanes.
//
// Opcodes:
// VEX.128.66.0F3A.WIG 40 /r ib    VDPPS xmm1, xmm2, xmm3/m128, imm8
// VEX.256.66.0F3A.WIG 40 /r ib    VDPPS ymm1, ymm2, ymm3/m256, imm8

const ALIGNED_ADDR: u64 = 0x3000; // 32-byte aligned address for testing

// ============================================================================
// VDPPS Tests - 128-bit XMM registers, full dot product (imm8 = 0xFF)
// ============================================================================

#[test]
fn test_vdpps_xmm0_xmm1_xmm2_ff() {
    let mut emu = emu64();
    // VDPPS XMM0, XMM1, XMM2, 0xFF (all elements participate, all receive result)
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0xff, // VDPPS XMM0, XMM1, XMM2, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm1_xmm2_xmm3_ff() {
    let mut emu = emu64();
    // VDPPS XMM1, XMM2, XMM3, 0xFF
    let code = [
        0xc4, 0xe3, 0x69, 0x40, 0xcb, 0xff, // VDPPS XMM1, XMM2, XMM3, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm2_xmm3_xmm4_ff() {
    let mut emu = emu64();
    // VDPPS XMM2, XMM3, XMM4, 0xFF
    let code = [
        0xc4, 0xe3, 0x61, 0x40, 0xd4, 0xff, // VDPPS XMM2, XMM3, XMM4, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm3_xmm4_xmm5_ff() {
    let mut emu = emu64();
    // VDPPS XMM3, XMM4, XMM5, 0xFF
    let code = [
        0xc4, 0xe3, 0x59, 0x40, 0xdd, 0xff, // VDPPS XMM3, XMM4, XMM5, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm4_xmm5_xmm6_ff() {
    let mut emu = emu64();
    // VDPPS XMM4, XMM5, XMM6, 0xFF
    let code = [
        0xc4, 0xe3, 0x51, 0x40, 0xe6, 0xff, // VDPPS XMM4, XMM5, XMM6, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm5_xmm6_xmm7_ff() {
    let mut emu = emu64();
    // VDPPS XMM5, XMM6, XMM7, 0xFF
    let code = [
        0xc4, 0xe3, 0x49, 0x40, 0xef, 0xff, // VDPPS XMM5, XMM6, XMM7, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm6_xmm7_xmm0_ff() {
    let mut emu = emu64();
    // VDPPS XMM6, XMM7, XMM0, 0xFF
    let code = [
        0xc4, 0xe3, 0x41, 0x40, 0xf0, 0xff, // VDPPS XMM6, XMM7, XMM0, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm7_xmm0_xmm1_ff() {
    let mut emu = emu64();
    // VDPPS XMM7, XMM0, XMM1, 0xFF
    let code = [
        0xc4, 0xe3, 0x79, 0x40, 0xf9, 0xff, // VDPPS XMM7, XMM0, XMM1, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

// ============================================================================
// VDPPS Tests - Extended XMM registers
// ============================================================================

#[test]
fn test_vdpps_xmm8_xmm9_xmm10_ff() {
    let mut emu = emu64();
    // VDPPS XMM8, XMM9, XMM10, 0xFF
    let code = [
        0xc4, 0x43, 0x31, 0x40, 0xc2, 0xff, // VDPPS XMM8, XMM9, XMM10, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm9_xmm10_xmm11_ff() {
    let mut emu = emu64();
    // VDPPS XMM9, XMM10, XMM11, 0xFF
    let code = [
        0xc4, 0x43, 0x29, 0x40, 0xcb, 0xff, // VDPPS XMM9, XMM10, XMM11, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm10_xmm11_xmm12_ff() {
    let mut emu = emu64();
    // VDPPS XMM10, XMM11, XMM12, 0xFF
    let code = [
        0xc4, 0x43, 0x21, 0x40, 0xd4, 0xff, // VDPPS XMM10, XMM11, XMM12, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm15_xmm14_xmm13_ff() {
    let mut emu = emu64();
    // VDPPS XMM15, XMM14, XMM13, 0xFF
    let code = [
        0xc4, 0x43, 0x09, 0x40, 0xfd, 0xff, // VDPPS XMM15, XMM14, XMM13, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

// ============================================================================
// VDPPS Tests - Different immediate masks
// ============================================================================

#[test]
fn test_vdpps_xmm0_xmm1_xmm2_f1() {
    let mut emu = emu64();
    // VDPPS XMM0, XMM1, XMM2, 0xF1 (all multiply, result to element 0 only)
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0xf1, // VDPPS XMM0, XMM1, XMM2, 0xF1
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm0_xmm1_xmm2_7f() {
    let mut emu = emu64();
    // VDPPS XMM0, XMM1, XMM2, 0x7F (elements 0-2 multiply, result to all)
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0x7f, // VDPPS XMM0, XMM1, XMM2, 0x7F
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm0_xmm1_xmm2_71() {
    let mut emu = emu64();
    // VDPPS XMM0, XMM1, XMM2, 0x71 (elements 0-2 multiply, result to element 0)
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0x71, // VDPPS XMM0, XMM1, XMM2, 0x71
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm0_xmm1_xmm2_3f() {
    let mut emu = emu64();
    // VDPPS XMM0, XMM1, XMM2, 0x3F (elements 0-1 multiply, result to all)
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0x3f, // VDPPS XMM0, XMM1, XMM2, 0x3F
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm0_xmm1_xmm2_31() {
    let mut emu = emu64();
    // VDPPS XMM0, XMM1, XMM2, 0x31 (elements 0-1 multiply, result to element 0)
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0x31, // VDPPS XMM0, XMM1, XMM2, 0x31
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm0_xmm1_xmm2_11() {
    let mut emu = emu64();
    // VDPPS XMM0, XMM1, XMM2, 0x11 (element 0 only, result to element 0)
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0x11, // VDPPS XMM0, XMM1, XMM2, 0x11
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm0_xmm1_xmm2_f0() {
    let mut emu = emu64();
    // VDPPS XMM0, XMM1, XMM2, 0xF0 (all multiply, zero all result elements)
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0xf0, // VDPPS XMM0, XMM1, XMM2, 0xF0
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm0_xmm1_xmm2_0f() {
    let mut emu = emu64();
    // VDPPS XMM0, XMM1, XMM2, 0x0F (no multiply, result to all - should be 0)
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0x0f, // VDPPS XMM0, XMM1, XMM2, 0x0F
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm0_xmm1_xmm2_88() {
    let mut emu = emu64();
    // VDPPS XMM0, XMM1, XMM2, 0x88 (element 3 only, result to element 3)
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0x88, // VDPPS XMM0, XMM1, XMM2, 0x88
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm0_xmm1_xmm2_cc() {
    let mut emu = emu64();
    // VDPPS XMM0, XMM1, XMM2, 0xCC (elements 2-3 multiply, result to elements 2-3)
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0xcc, // VDPPS XMM0, XMM1, XMM2, 0xCC
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm0_xmm1_xmm2_aa() {
    let mut emu = emu64();
    // VDPPS XMM0, XMM1, XMM2, 0xAA (elements 1,3 multiply, result to elements 1,3)
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0xaa, // VDPPS XMM0, XMM1, XMM2, 0xAA
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

// ============================================================================
// VDPPS Tests - Memory operands (128-bit)
// ============================================================================

#[test]
fn test_vdpps_xmm0_xmm1_mem_ff() {
    let mut emu = emu64();
    // VDPPS XMM0, XMM1, [mem], 0xFF
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0x05, 0x00, 0x40, 0x00, 0x00, 0xff, // VDPPS XMM0, XMM1, [rip+0x4000], 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);

    let test_data: [u8; 16] = [
        0x00, 0x00, 0x80, 0x3f, // 1.0
        0x00, 0x00, 0x00, 0x40, // 2.0
        0x00, 0x00, 0x40, 0x40, // 3.0
        0x00, 0x00, 0x80, 0x40, // 4.0
    ];
    emu.maps.write_bytes_slice(ALIGNED_ADDR, &test_data);

    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm1_xmm2_mem_f1() {
    let mut emu = emu64();
    // VDPPS XMM1, XMM2, [mem], 0xF1
    let code = [
        0xc4, 0xe3, 0x69, 0x40, 0x0d, 0x00, 0x40, 0x00, 0x00, 0xf1, // VDPPS XMM1, XMM2, [rip+0x4000], 0xF1
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);

    let test_data: [u8; 16] = [
        0x00, 0x00, 0x00, 0x3f, // 0.5
        0x00, 0x00, 0x00, 0x40, // 2.0
        0x00, 0x00, 0x40, 0x40, // 3.0
        0x00, 0x00, 0x80, 0x40, // 4.0
    ];
    emu.maps.write_bytes_slice(ALIGNED_ADDR, &test_data);

    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_xmm8_xmm9_mem_ff() {
    let mut emu = emu64();
    // VDPPS XMM8, XMM9, [mem], 0xFF
    let code = [
        0xc4, 0x63, 0x31, 0x40, 0x05, 0x00, 0x40, 0x00, 0x00, 0xff, // VDPPS XMM8, XMM9, [rip+0x4000], 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);

    let test_data: [u8; 16] = [
        0x00, 0x00, 0x80, 0x3f,
        0x00, 0x00, 0x80, 0x3f,
        0x00, 0x00, 0x80, 0x3f,
        0x00, 0x00, 0x80, 0x3f,
    ];
    emu.maps.write_bytes_slice(ALIGNED_ADDR, &test_data);

    emu.run(None).unwrap();
}

// ============================================================================
// VDPPS Tests - 256-bit YMM registers
// ============================================================================

#[test]
fn test_vdpps_ymm0_ymm1_ymm2_ff() {
    let mut emu = emu64();
    // VDPPS YMM0, YMM1, YMM2, 0xFF (operates on both 128-bit lanes independently)
    let code = [
        0xc4, 0xe3, 0x75, 0x40, 0xc2, 0xff, // VDPPS YMM0, YMM1, YMM2, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_ymm1_ymm2_ymm3_ff() {
    let mut emu = emu64();
    // VDPPS YMM1, YMM2, YMM3, 0xFF
    let code = [
        0xc4, 0xe3, 0x6d, 0x40, 0xcb, 0xff, // VDPPS YMM1, YMM2, YMM3, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_ymm2_ymm3_ymm4_ff() {
    let mut emu = emu64();
    // VDPPS YMM2, YMM3, YMM4, 0xFF
    let code = [
        0xc4, 0xe3, 0x65, 0x40, 0xd4, 0xff, // VDPPS YMM2, YMM3, YMM4, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_ymm3_ymm4_ymm5_ff() {
    let mut emu = emu64();
    // VDPPS YMM3, YMM4, YMM5, 0xFF
    let code = [
        0xc4, 0xe3, 0x5d, 0x40, 0xdd, 0xff, // VDPPS YMM3, YMM4, YMM5, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_ymm4_ymm5_ymm6_ff() {
    let mut emu = emu64();
    // VDPPS YMM4, YMM5, YMM6, 0xFF
    let code = [
        0xc4, 0xe3, 0x55, 0x40, 0xe6, 0xff, // VDPPS YMM4, YMM5, YMM6, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_ymm8_ymm9_ymm10_ff() {
    let mut emu = emu64();
    // VDPPS YMM8, YMM9, YMM10, 0xFF
    let code = [
        0xc4, 0x43, 0x35, 0x40, 0xc2, 0xff, // VDPPS YMM8, YMM9, YMM10, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_ymm15_ymm14_ymm13_ff() {
    let mut emu = emu64();
    // VDPPS YMM15, YMM14, YMM13, 0xFF
    let code = [
        0xc4, 0x43, 0x0d, 0x40, 0xfd, 0xff, // VDPPS YMM15, YMM14, YMM13, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

// ============================================================================
// VDPPS Tests - YMM with different masks
// ============================================================================

#[test]
fn test_vdpps_ymm0_ymm1_ymm2_f1() {
    let mut emu = emu64();
    // VDPPS YMM0, YMM1, YMM2, 0xF1
    let code = [
        0xc4, 0xe3, 0x75, 0x40, 0xc2, 0xf1, // VDPPS YMM0, YMM1, YMM2, 0xF1
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_ymm0_ymm1_ymm2_7f() {
    let mut emu = emu64();
    // VDPPS YMM0, YMM1, YMM2, 0x7F
    let code = [
        0xc4, 0xe3, 0x75, 0x40, 0xc2, 0x7f, // VDPPS YMM0, YMM1, YMM2, 0x7F
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_ymm0_ymm1_ymm2_31() {
    let mut emu = emu64();
    // VDPPS YMM0, YMM1, YMM2, 0x31
    let code = [
        0xc4, 0xe3, 0x75, 0x40, 0xc2, 0x31, // VDPPS YMM0, YMM1, YMM2, 0x31
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

// ============================================================================
// VDPPS Tests - Memory operands (256-bit)
// ============================================================================

#[test]
fn test_vdpps_ymm0_ymm1_mem_ff() {
    let mut emu = emu64();
    // VDPPS YMM0, YMM1, [mem], 0xFF
    let code = [
        0xc4, 0xe3, 0x75, 0x40, 0x05, 0x00, 0x40, 0x00, 0x00, 0xff, // VDPPS YMM0, YMM1, [rip+0x4000], 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);

    let test_data: [u8; 32] = [
        0x00, 0x00, 0x80, 0x3f, // 1.0
        0x00, 0x00, 0x00, 0x40, // 2.0
        0x00, 0x00, 0x40, 0x40, // 3.0
        0x00, 0x00, 0x80, 0x40, // 4.0
        0x00, 0x00, 0x80, 0x3f, // 1.0
        0x00, 0x00, 0x00, 0x40, // 2.0
        0x00, 0x00, 0x40, 0x40, // 3.0
        0x00, 0x00, 0x80, 0x40, // 4.0
    ];
    emu.maps.write_bytes_slice(ALIGNED_ADDR, &test_data);

    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_ymm8_ymm9_mem_f1() {
    let mut emu = emu64();
    // VDPPS YMM8, YMM9, [mem], 0xF1
    let code = [
        0xc4, 0x63, 0x35, 0x40, 0x05, 0x00, 0x40, 0x00, 0x00, 0xf1, // VDPPS YMM8, YMM9, [rip+0x4000], 0xF1
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);

    let test_data: [u8; 32] = [
        0x00, 0x00, 0x80, 0x3f, 0x00, 0x00, 0x80, 0x3f,
        0x00, 0x00, 0x80, 0x3f, 0x00, 0x00, 0x80, 0x3f,
        0x00, 0x00, 0x80, 0x3f, 0x00, 0x00, 0x80, 0x3f,
        0x00, 0x00, 0x80, 0x3f, 0x00, 0x00, 0x80, 0x3f,
    ];
    emu.maps.write_bytes_slice(ALIGNED_ADDR, &test_data);

    emu.run(None).unwrap();
}

// ============================================================================
// VDPPS Tests - Special patterns and use cases
// ============================================================================

#[test]
fn test_vdpps_3d_dot_product() {
    let mut emu = emu64();
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0x71, // VDPPS XMM0, XMM1, XMM2, 0x71
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_2d_dot_product() {
    let mut emu = emu64();
    // 2D dot product pattern (0x31)
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0x31, // VDPPS XMM0, XMM1, XMM2, 0x31
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_broadcast_result() {
    let mut emu = emu64();
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0xff, // VDPPS XMM0, XMM1, XMM2, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_multiple_sequential() {
    let mut emu = emu64();
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0xff, // VDPPS XMM0, XMM1, XMM2, 0xFF
        0xc4, 0xe3, 0x69, 0x40, 0xcc, 0xff, // VDPPS XMM1, XMM2, XMM4, 0xFF
        0xc4, 0xe3, 0x61, 0x40, 0xd5, 0xff, // VDPPS XMM2, XMM3, XMM5, 0xFF
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_partial_elements() {
    let mut emu = emu64();
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0x11, // VDPPS XMM0, XMM1, XMM2, 0x11 (elem 0 only)
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0x22, // VDPPS XMM0, XMM1, XMM2, 0x22 (elem 1 only)
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0x44, // VDPPS XMM0, XMM1, XMM2, 0x44 (elem 2 only)
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0x88, // VDPPS XMM0, XMM1, XMM2, 0x88 (elem 3 only)
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}

#[test]
fn test_vdpps_alternating_elements() {
    let mut emu = emu64();
    let code = [
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0x55, // VDPPS XMM0, XMM1, XMM2, 0x55 (0 and 2)
        0xc4, 0xe3, 0x71, 0x40, 0xc2, 0xaa, // VDPPS XMM0, XMM1, XMM2, 0xAA (1 and 3)
        0xf4, // HLT
    ];
    emu.load_code_bytes(&code);
    emu.run(None).unwrap();
}