; Copyright (c) 2017-2019, Intel Corporation
;
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; modification, are permitted provided that the following conditions are met:
;
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; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
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; may be used to endorse or promote products derived from this software
; without specific prior written permission.
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; APL11: Intel(R) PT OVF Pakcet May Be Followed by TIP.PGD Packet
;
; If Intel PT (Processor Trace) encounters an internal buffer overflow
; and generates an OVF (Overflow) packet just as IA32_RTIT_CTL (MSR
; 570H) bit 0 (TraceEn) is cleared, or during a far transfer that
; causes IA32_RTIT_STATUS.ContextEn[1] (MSR 571H) to be cleared, the
; OVF may be followed by a TIP.PGD (Target Instruction Pointer - Packet
; Generation Disable) packet.
;
; cpu 6/92
; cpu 6/95
; cpu 6/122
; cpu 6/134
;
org 0x1000
bits 64
; @pt p0: psb()
; @pt p1: mode.exec(64bit)
; @pt p2: fup(3: %l0)
; @pt p3: psbend()
l0: hlt
; @pt p4: ovf()
; @pt p5: tip.pgd(3: %l1)
l1: hlt
; @pt p6: mode.exec(64bit)
; @pt p7: tip.pge(3: %l2)
l2: nop
; @pt p8: fup(1: %l3)
; @pt p9: tip.pgd(0: %l3)
l3: hlt
; @pt .exp(ptdump)
;%0p0 psb
;%0p1 mode.exec cs.l
;%0p2 fup 3: %?l0
;%0p3 psbend
;%0p4 ovf
;%0p5 tip.pgd 3: %?l1
;%0p6 mode.exec cs.l
;%0p7 tip.pge 3: %?l2
;%0p8 fup 1: %?l3.2
;%0p9 tip.pgd 0: %?l3.0
; @pt .exp(ptxed)
;[overflow]
;[enabled]
;[exec mode: 64-bit]
;%0l2
;[disabled]