lib_rv32_isa/
traits.rs

1use crate::RiscvError;
2
3/// Trait to be implemented by a RISC-V register file. Should support
4/// reads to registers 0-31 and writes to registers 1-31.
5pub trait RegisterFile {
6    /// Read a value from the register numbered `num`. Returns a `Result` containing
7    /// an error, or the `u32` data contained.
8    fn read(&self, num: u8) -> Result<u32, RiscvError>;
9
10    /// Write a value `data` to the register numbered `num`. Returns a `Result` containing
11    /// an error if one occured, otherwise returns an empty `Result`.
12    fn write(&mut self, num: u8, data: u32) -> Result<(), RiscvError>;
13}
14
15pub trait Memory {
16    /// This should have the same behavior as `read_word`, with the distinction that
17    /// it does not generate logs or count as an access for the purpose of performance
18    /// counters.
19    fn fetch(&self, pc: u32) -> Result<u32, RiscvError>;
20
21    /// Read a 32-bit word from the address `addr`. Returns a `Result` containing
22    /// an error, or the `u32` data contained.
23    fn read_word(&self, addr: u32) -> Result<u32, RiscvError>;
24
25    /// Read a 16-bit half-word from the address `addr`. Returns a `Result` containing
26    /// an error, or the `u32` data contained.
27    fn read_half_word(&self, addr: u32) -> Result<u32, RiscvError>;
28
29    /// Read a byte from the address `addr`. Returns a `Result` containing
30    /// an error, or the `u32` data contained.
31    fn read_byte(&self, addr: u32) -> Result<u32, RiscvError>;
32
33    /// Write a 32-bit word `data` to the address `addr`. Returns a `Result` containing
34    /// an error, otherwise returns an empty `Result`.
35    ///
36    /// This makes no guarantees about endianness, only that `read_word` returns the same
37    /// data after a `write_word`.
38    fn write_word(&mut self, addr: u32, data: u32) -> Result<(), RiscvError>;
39
40    /// Write 16-bit half-word `data` to the address `addr`. Returns a `Result` containing
41    /// an error, otherwise returns an empty `Result`.
42    ///
43    /// This makes no guarantees about endianness, only that `read_half_word` returns the same
44    /// data after a `write_half_word`.
45    fn write_half_word(&mut self, addr: u32, data: u32) -> Result<(), RiscvError>;
46
47    /// Write byte `data` to the address `addr`. Returns a `Result` containing
48    /// an error, otherwise returns an empty `Result`.
49    ///
50    /// This makes no guarantees about endianness, only that `read_byte` returns the same
51    /// data after a `write_byte`.
52    fn write_byte(&mut self, addr: u32, data: u32) -> Result<(), RiscvError>;
53}
lib_rv32_isa/traits.rs

lib_rv32_isa/
traits.rs
