lamina-platform 0.2.0

//! The architecture table: every property of every architecture, stated once.
//!
//! One block per architecture, generated by [`arch_table!`] into the
//! [`TargetArchitecture`] enum, [`TargetArchitecture::spec`], [`TargetArchitecture::all`],
//! the `Display` spelling and the `FromStr` spellings. Nothing about an architecture is
//! stated anywhere else, so adding one is one block and adding a property is one field.
//!
//! The compiler enforces both halves of that. A block missing a field does not match the
//! macro's entry rule, so an architecture cannot exist without every property; the
//! generated `spec` match has no wildcard arm; and `all` and the target list are derived
//! from the same table, so they cannot fall behind it.

use crate::arch_variant::{
    Aarch64Level, ArchVariant, Armv7Variant, PowerLevel, RiscvIsa, VariantAxis,
};
use crate::cpu_level::X86CpuLevel;
use crate::environment::TargetEnvironment;

/// Width of a data pointer. Pointer size and alignment derive from it.
#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub enum PointerWidth {
    Bits32,
    Bits64,
    Bits128,
}

impl PointerWidth {
    pub const fn bytes(self) -> usize {
        match self {
            Self::Bits32 => 4,
            Self::Bits64 => 8,
            Self::Bits128 => 16,
        }
    }
}

/// Byte order of multi-byte values in memory.
#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub enum Endianness {
    Little,
    Big,
}

/// What a finished compilation of this target is.
#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub enum OutputArtifact {
    /// Object files that a linker turns into an executable.
    Executable,
    /// A self-contained module, assembled but never linked.
    Module,
    /// Assembly text handed on as-is.
    Text,
}

/// Size and alignment, in bytes, of the `va_list` an architecture's C ABI defines.
///
/// A `va_list` is a struct the ABI names field by field, so its size is a property of
/// the architecture and not of the pointer width. The shapes stated in the table are:
///
/// - x86_64: System V AMD64 ABI §3.5.7, `struct { unsigned int gp_offset, fp_offset;
///   void *overflow_arg_area, *reg_save_area; }` — 24 bytes.
/// - aarch64: AAPCS64 (IHI 0055) appendix "Variable Argument Lists", `struct { void
///   *__stack, *__gr_top, *__vr_top; int __gr_offs, __vr_offs; }` — 32 bytes.
/// - s390x: zSeries ELF ABI supplement, `struct { long __gpr, __fpr; void
///   *__overflow_arg_area, *__reg_save_area; }` — 32 bytes.
/// - riscv, powerpc64 ELFv2, loongarch, mips n64, wasm: a plain `void *`, one pointer.
/// - i686: Intel386 psABI §3.17, `char *` — 4 bytes.
/// - 32-bit ARM: AAPCS (IHI 0042) §7.1, `struct __va_list { void *__ap; }` — 4 bytes.
///
/// [`VaListAbi::Undefined`] is a statement that no ABI defines one, not an omission.
#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub enum VaListAbi {
    Defined { size: u64, alignment: u64 },
    Undefined,
}

impl VaListAbi {
    pub const fn of(size: u64, alignment: u64) -> Self {
        Self::Defined { size, alignment }
    }
}

/// The facts a target-independent lowering needs to turn IR into MIR.
#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub struct TargetDataLayout {
    pub pointer_width: PointerWidth,
    pub int_register_bits: u32,
    pub endianness: Endianness,
    pub va_list: VaListAbi,
}

impl TargetDataLayout {
    pub const fn has_64bit_int_registers(self) -> bool {
        self.int_register_bits >= 64
    }
}

/// The ELF interpreter an architecture takes, one path per environment it supports.
///
/// `None` is a statement that the combination has no interpreter, not an omission.
#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub struct LinuxInterpreters {
    /// glibc, with the architecture's own floating-point ABI.
    pub gnu: Option<&'static str>,
    /// glibc, with the soft-float ABI. Reached by `eabi` and by a RISC-V ISA without `d`.
    pub gnu_soft_float: Option<&'static str>,
    /// musl libc.
    pub musl: Option<&'static str>,
    /// Lamina's own C library. `None` on every architecture today: no Lamina libc has
    /// been written, so there is no loader to name. A port fills this in here.
    pub lamina: Option<&'static str>,
}

/// Cross-toolchain triples, by C library.
#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
pub struct ToolchainTriples {
    pub gnu: Option<&'static str>,
    pub musl: Option<&'static str>,
    /// Lamina's own toolchain. `None` on every architecture today: nothing outside this
    /// repository supplies a Lamina-libc cross compiler, and nothing should be guessed.
    pub lamina: Option<&'static str>,
}

/// Everything an architecture states about itself.
///
/// Read it through [`crate::Target::spec`], which applies the variant's refinements;
/// [`TargetArchitecture::spec`] is the unrefined form the table states.
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub struct ArchSpec {
    /// Canonical spelling, the one `Display` writes.
    pub token: &'static str,
    /// Further spellings `FromStr` accepts for this architecture.
    pub spellings: &'static [&'static str],
    /// Target strings this architecture contributes to the supported-target list.
    pub targets: &'static [&'static str],
    pub pointer_width: PointerWidth,
    /// Widest integer one register holds. Not the pointer width: wasm32 has 32-bit
    /// pointers and 64-bit integer registers.
    pub max_int_register_bits: u32,
    pub endianness: Endianness,
    /// Size and alignment of this architecture's C `va_list`.
    pub va_list: VaListAbi,
    /// Alignment the stack pointer holds at a call. `1` means there is no machine stack.
    pub stack_alignment_at_call: usize,
    /// Whether an argument with 16-byte alignment starts at its own alignment rather than
    /// at the next word. AAPCS64 rounds the integer register counter up to even before
    /// such an argument; the riscv psABI makes that rule variadic-only and ppc64 does not
    /// round for named arguments either.
    pub honors_argument_alignment: bool,
    pub output_artifact: OutputArtifact,
    /// Environment a hosted target of this architecture means when the target string
    /// names none.
    pub hosted_environment: TargetEnvironment,
    /// Environments a target string may name for this architecture, beside
    /// [`TargetEnvironment::Freestanding`], which every architecture accepts.
    pub environments: &'static [TargetEnvironment],
    pub interpreters: LinuxInterpreters,
    pub toolchain: ToolchainTriples,
    /// Directory name under the Windows SDK `Lib` tree. `None` means Windows has no
    /// library layout for this architecture, and asking for one is an error rather than
    /// a search of the x86_64 directories.
    pub msvc_library_arch: Option<&'static str>,
    /// The sub-architecture axis this architecture has, and its default.
    pub variants: VariantAxis,
}

impl ArchSpec {
    pub const fn data_layout(&self) -> TargetDataLayout {
        TargetDataLayout {
            pointer_width: self.pointer_width,
            int_register_bits: self.max_int_register_bits,
            endianness: self.endianness,
            va_list: self.va_list,
        }
    }

    pub const fn has_64bit_int_registers(&self) -> bool {
        self.max_int_register_bits >= 64
    }

    /// The ELF interpreter for an environment, or `None` when there is none.
    pub const fn interpreter(&self, environment: TargetEnvironment) -> Option<&'static str> {
        match environment {
            TargetEnvironment::Gnu | TargetEnvironment::Eabihf => self.interpreters.gnu,
            TargetEnvironment::Eabi => self.interpreters.gnu_soft_float,
            TargetEnvironment::Musl => self.interpreters.musl,
            TargetEnvironment::Lamina => self.interpreters.lamina,
            TargetEnvironment::Freestanding => None,
        }
    }

    /// The cross-toolchain triple for an environment.
    pub const fn toolchain_triple(&self, environment: TargetEnvironment) -> Option<&'static str> {
        match environment {
            TargetEnvironment::Gnu | TargetEnvironment::Eabi | TargetEnvironment::Eabihf => {
                self.toolchain.gnu
            }
            TargetEnvironment::Musl => self.toolchain.musl,
            TargetEnvironment::Lamina => self.toolchain.lamina,
            TargetEnvironment::Freestanding => self.toolchain.gnu,
        }
    }

    /// Whether a target string may name this environment for this architecture.
    pub fn accepts_environment(&self, environment: TargetEnvironment) -> bool {
        environment == TargetEnvironment::Freestanding || self.environments.contains(&environment)
    }
}

macro_rules! arch_table {
    ($(
        $(#[doc = $doc:literal])*
        $(#[cfg($cfg:meta)])?
        $variant:ident {
            token: $token:literal,
            spellings: [$($spelling:literal),* $(,)?],
            targets: [$($target:literal),* $(,)?],
            pointer_width: $pointer_width:ident,
            max_int_register_bits: $int_bits:literal,
            endianness: $endianness:ident,
            va_list: $va_list:expr,
            stack_alignment_at_call: $stack_align:literal,
            honors_argument_alignment: $honors:literal,
            output_artifact: $artifact:ident,
            hosted_environment: $hosted:ident,
            environments: [$($environment:ident),* $(,)?],
            interpreters: {
                gnu: $i_gnu:expr,
                gnu_soft_float: $i_soft:expr,
                musl: $i_musl:expr,
                lamina: $i_lamina:expr
            },
            toolchain: { gnu: $t_gnu:expr, musl: $t_musl:expr, lamina: $t_lamina:expr },
            msvc_library_arch: $msvc:expr,
            variants: $axis:expr,
        }
    )*) => {
        /// An architecture lamina has a backend for, or has reserved a name for.
        ///
        /// Every property is stated in the table in [`crate::arch_table`]; there are no
        /// per-property matches anywhere else.
        #[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
        pub enum TargetArchitecture {
            $(
                $(#[doc = $doc])*
                $(#[cfg($cfg)])?
                $variant,
            )*
        }

        impl TargetArchitecture {
            /// Everything this architecture states about itself.
            pub const fn spec(self) -> ArchSpec {
                match self {
                    $(
                        $(#[cfg($cfg)])?
                        Self::$variant => ArchSpec {
                            token: $token,
                            spellings: &[$($spelling),*],
                            targets: &[$($target),*],
                            pointer_width: PointerWidth::$pointer_width,
                            max_int_register_bits: $int_bits,
                            endianness: Endianness::$endianness,
                            va_list: $va_list,
                            stack_alignment_at_call: $stack_align,
                            honors_argument_alignment: $honors,
                            output_artifact: OutputArtifact::$artifact,
                            hosted_environment: TargetEnvironment::$hosted,
                            environments: &[$(TargetEnvironment::$environment),*],
                            interpreters: LinuxInterpreters {
                                gnu: $i_gnu,
                                gnu_soft_float: $i_soft,
                                musl: $i_musl,
                                lamina: $i_lamina,
                            },
                            toolchain: ToolchainTriples {
                                gnu: $t_gnu,
                                musl: $t_musl,
                                lamina: $t_lamina,
                            },
                            msvc_library_arch: $msvc,
                            variants: $axis,
                        },
                    )*
                }
            }

            /// Every architecture in the table, in declaration order.
            pub fn all() -> Vec<Self> {
                let mut architectures = Vec::new();
                $(
                    $(#[cfg($cfg)])?
                    architectures.push(Self::$variant);
                )*
                architectures
            }

            /// The architecture a bare spelling names, without consulting the refusals.
            pub(crate) fn from_spelling(spelling: &str) -> Option<Self> {
                $(
                    $(#[cfg($cfg)])?
                    if spelling == $token $(|| spelling == $spelling)* {
                        return Some(Self::$variant);
                    }
                )*
                None
            }
        }
    };
}

arch_table! {
    X86_64 {
        token: "x86_64",
        spellings: [],
        targets: [
            "x86_64_unknown", "x86_64_linux", "x86_64_windows", "x86_64_macos",
            "x86_64_android", "x86_64_ios", "x86_64_tvos", "x86_64_watchos",
            "x86_64_freebsd", "x86_64_orbis", "x86_64_prospero",
        ],
        pointer_width: Bits64,
        max_int_register_bits: 64,
        endianness: Little,
        va_list: VaListAbi::of(24, 8),
        stack_alignment_at_call: 16,
        honors_argument_alignment: true,
        output_artifact: Executable,
        hosted_environment: Gnu,
        environments: [Gnu, Musl, Lamina],
        interpreters: {
            gnu: Some("/lib64/ld-linux-x86-64.so.2"),
            gnu_soft_float: None,
            musl: Some("/lib/ld-musl-x86_64.so.1"),
            lamina: None
        },
        toolchain: { gnu: Some("x86_64-linux-gnu"), musl: Some("x86_64-linux-musl"), lamina: None },
        msvc_library_arch: Some("x64"),
        variants: VariantAxis::X86(X86CpuLevel::V2),
    }

    Aarch64 {
        token: "aarch64",
        spellings: [],
        targets: [
            "aarch64_unknown", "aarch64_macos", "aarch64_linux", "aarch64_windows",
            "aarch64_android", "aarch64_ios", "aarch64_tvos", "aarch64_watchos",
            "aarch64_visionos", "aarch64_horizon",
        ],
        pointer_width: Bits64,
        max_int_register_bits: 64,
        endianness: Little,
        va_list: VaListAbi::of(32, 8),
        stack_alignment_at_call: 16,
        honors_argument_alignment: true,
        output_artifact: Executable,
        hosted_environment: Gnu,
        environments: [Gnu, Musl, Lamina],
        interpreters: {
            gnu: Some("/lib/ld-linux-aarch64.so.1"),
            gnu_soft_float: None,
            musl: Some("/lib/ld-musl-aarch64.so.1"),
            lamina: None
        },
        toolchain: { gnu: Some("aarch64-linux-gnu"), musl: Some("aarch64-linux-musl"), lamina: None },
        msvc_library_arch: Some("arm64"),
        variants: VariantAxis::Aarch64(Aarch64Level::V8_0),
    }

    #[doc = "ARX64, an experimental architecture with no silicon."]
    #[cfg(feature = "nightly")]
    Arx64 {
        token: "arx64",
        spellings: [],
        targets: ["arx64_unknown"],
        pointer_width: Bits64,
        max_int_register_bits: 64,
        endianness: Little,
        va_list: VaListAbi::Undefined,
        stack_alignment_at_call: 16,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Freestanding,
        environments: [],
        interpreters: { gnu: None, gnu_soft_float: None, musl: None, lamina: None },
        toolchain: { gnu: None, musl: None, lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::None,
    }

    #[doc = "32-bit ARM with no revision, float ABI or profile named. Reserved, and"]
    #[doc = "refused by `FromStr` in favour of `armv7`, `thumbv6m` and `thumbv7m`."]
    Arm32 {
        token: "arm32",
        spellings: [],
        targets: [],
        pointer_width: Bits32,
        max_int_register_bits: 32,
        endianness: Little,
        va_list: VaListAbi::of(4, 4),
        stack_alignment_at_call: 8,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Eabi,
        environments: [Eabi, Eabihf],
        interpreters: { gnu: None, gnu_soft_float: None, musl: None, lamina: None },
        toolchain: { gnu: None, musl: None, lamina: None },
        msvc_library_arch: Some("arm"),
        variants: VariantAxis::None,
    }

    Armv7 {
        token: "armv7",
        spellings: ["armv7a", "armv7hf"],
        targets: ["armv7_linux"],
        pointer_width: Bits32,
        max_int_register_bits: 32,
        endianness: Little,
        va_list: VaListAbi::of(4, 4),
        stack_alignment_at_call: 16,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Eabihf,
        environments: [Eabi, Eabihf],
        interpreters: {
            gnu: Some("/lib/ld-linux-armhf.so.3"),
            gnu_soft_float: Some("/lib/ld-linux.so.3"),
            musl: None,
            lamina: None
        },
        toolchain: { gnu: Some("arm-linux-gnueabihf"), musl: None, lamina: None },
        msvc_library_arch: Some("arm"),
        variants: VariantAxis::Armv7(Armv7Variant::cortex_a7()),
    }

    #[doc = "ARMv6-M, Thumb-1 only: Cortex-M0 and M0+."]
    Thumbv6m {
        token: "thumbv6m",
        spellings: ["armv6m", "cortex-m0"],
        targets: ["thumbv6m_unknown", "thumbv6m_linux"],
        pointer_width: Bits32,
        max_int_register_bits: 32,
        endianness: Little,
        va_list: VaListAbi::of(4, 4),
        stack_alignment_at_call: 8,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Eabi,
        environments: [Eabi],
        interpreters: { gnu: None, gnu_soft_float: None, musl: None, lamina: None },
        toolchain: { gnu: None, musl: None, lamina: None },
        msvc_library_arch: Some("arm"),
        variants: VariantAxis::None,
    }

    #[doc = "ARMv7-M, Thumb-2: Cortex-M3, M4 and M7."]
    Thumbv7m {
        token: "thumbv7m",
        spellings: ["armv7m", "cortex-m3"],
        targets: ["thumbv7m_unknown", "thumbv7m_linux"],
        pointer_width: Bits32,
        max_int_register_bits: 32,
        endianness: Little,
        va_list: VaListAbi::of(4, 4),
        stack_alignment_at_call: 8,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Eabi,
        environments: [Eabi],
        interpreters: { gnu: None, gnu_soft_float: None, musl: None, lamina: None },
        toolchain: { gnu: None, musl: None, lamina: None },
        msvc_library_arch: Some("arm"),
        variants: VariantAxis::Armv7(Armv7Variant::cortex_m3()),
    }

    I686 {
        token: "i686",
        spellings: ["i386", "x86"],
        targets: ["i686_linux"],
        pointer_width: Bits32,
        max_int_register_bits: 32,
        endianness: Little,
        va_list: VaListAbi::of(4, 4),
        stack_alignment_at_call: 16,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Gnu,
        environments: [Gnu, Musl],
        interpreters: {
            gnu: Some("/lib/ld-linux.so.2"),
            gnu_soft_float: None,
            musl: Some("/lib/ld-musl-i386.so.1"),
            lamina: None
        },
        toolchain: { gnu: Some("i686-linux-gnu"), musl: Some("i686-linux-musl"), lamina: None },
        msvc_library_arch: Some("x86"),
        variants: VariantAxis::None,
    }

    Riscv32 {
        token: "riscv32",
        spellings: [],
        targets: ["riscv32_unknown", "riscv32_linux"],
        pointer_width: Bits32,
        max_int_register_bits: 32,
        endianness: Little,
        va_list: VaListAbi::of(4, 4),
        stack_alignment_at_call: 16,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Gnu,
        environments: [Gnu, Musl],
        interpreters: {
            gnu: Some("/lib/ld-linux-riscv32-ilp32d.so.1"),
            gnu_soft_float: Some("/lib/ld-linux-riscv32-ilp32.so.1"),
            musl: Some("/lib/ld-musl-riscv32.so.1"),
            lamina: None
        },
        toolchain: { gnu: Some("riscv32-linux-gnu"), musl: Some("riscv32-linux-musl"), lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::Riscv(RiscvIsa::general(32)),
    }

    Riscv64 {
        token: "riscv64",
        spellings: ["riscv64gc"],
        targets: ["riscv64_linux", "riscv64_unknown", "riscv64gc_linux"],
        pointer_width: Bits64,
        max_int_register_bits: 64,
        endianness: Little,
        va_list: VaListAbi::of(8, 8),
        stack_alignment_at_call: 16,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Gnu,
        environments: [Gnu, Musl],
        interpreters: {
            gnu: Some("/lib/ld-linux-riscv64-lp64d.so.1"),
            gnu_soft_float: Some("/lib/ld-linux-riscv64-lp64.so.1"),
            musl: Some("/lib/ld-musl-riscv64.so.1"),
            lamina: None
        },
        toolchain: { gnu: Some("riscv64-linux-gnu"), musl: Some("riscv64-linux-musl"), lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::Riscv(RiscvIsa::general(64)),
    }

    #[cfg(feature = "nightly")]
    Riscv128 {
        token: "riscv128",
        spellings: [],
        targets: ["riscv128_unknown"],
        pointer_width: Bits128,
        max_int_register_bits: 128,
        endianness: Little,
        va_list: VaListAbi::Undefined,
        stack_alignment_at_call: 16,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Gnu,
        environments: [Gnu],
        interpreters: { gnu: None, gnu_soft_float: None, musl: None, lamina: None },
        toolchain: { gnu: None, musl: None, lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::Riscv(RiscvIsa::general(128)),
    }

    Wasm32 {
        token: "wasm32",
        spellings: ["wasm"],
        targets: ["wasm32_unknown", "wasm32_wasi"],
        pointer_width: Bits32,
        max_int_register_bits: 64,
        endianness: Little,
        va_list: VaListAbi::of(4, 4),
        stack_alignment_at_call: 1,
        honors_argument_alignment: false,
        output_artifact: Module,
        hosted_environment: Freestanding,
        environments: [],
        interpreters: { gnu: None, gnu_soft_float: None, musl: None, lamina: None },
        toolchain: { gnu: None, musl: None, lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::None,
    }

    Wasm64 {
        token: "wasm64",
        spellings: [],
        targets: ["wasm64_unknown"],
        pointer_width: Bits64,
        max_int_register_bits: 64,
        endianness: Little,
        va_list: VaListAbi::of(8, 8),
        stack_alignment_at_call: 1,
        honors_argument_alignment: false,
        output_artifact: Module,
        hosted_environment: Freestanding,
        environments: [],
        interpreters: { gnu: None, gnu_soft_float: None, musl: None, lamina: None },
        toolchain: { gnu: None, musl: None, lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::None,
    }

    #[doc = "Little-endian 64-bit POWER, ELFv2."]
    PowerPC64 {
        token: "ppc64le",
        spellings: [],
        targets: ["ppc64le_linux", "ppc64le_unknown"],
        pointer_width: Bits64,
        max_int_register_bits: 64,
        endianness: Little,
        va_list: VaListAbi::of(8, 8),
        stack_alignment_at_call: 16,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Gnu,
        environments: [Gnu, Musl],
        interpreters: {
            gnu: Some("/lib64/ld64.so.2"),
            gnu_soft_float: None,
            musl: Some("/lib/ld-musl-powerpc64le.so.1"),
            lamina: None
        },
        toolchain: { gnu: Some("powerpc64le-linux-gnu"), musl: Some("powerpc64le-linux-musl"), lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::Power(PowerLevel::Power8),
    }

    #[doc = "Big-endian 64-bit POWER, ELFv2."]
    PowerPC64Be {
        token: "ppc64",
        spellings: ["powerpc64"],
        targets: ["ppc64_linux"],
        pointer_width: Bits64,
        max_int_register_bits: 64,
        endianness: Big,
        va_list: VaListAbi::of(8, 8),
        stack_alignment_at_call: 16,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Gnu,
        environments: [Gnu, Musl],
        interpreters: {
            gnu: Some("/lib64/ld64.so.2"),
            gnu_soft_float: None,
            musl: Some("/lib/ld-musl-powerpc64.so.1"),
            lamina: None
        },
        toolchain: { gnu: Some("powerpc64-linux-gnu"), musl: Some("powerpc64-linux-musl"), lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::Power(PowerLevel::Power8),
    }

    Mips64 {
        token: "mips64",
        spellings: [],
        targets: ["mips64_linux"],
        pointer_width: Bits64,
        max_int_register_bits: 64,
        endianness: Big,
        va_list: VaListAbi::of(8, 8),
        stack_alignment_at_call: 16,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Gnu,
        environments: [Gnu, Musl],
        interpreters: {
            gnu: Some("/lib64/ld.so.1"),
            gnu_soft_float: None,
            musl: Some("/lib/ld-musl-mips64.so.1"),
            lamina: None
        },
        toolchain: { gnu: Some("mips64-linux-gnuabi64"), musl: Some("mips64-linux-musl"), lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::None,
    }

    Mips64El {
        token: "mips64el",
        spellings: ["mips64le"],
        targets: ["mips64el_linux"],
        pointer_width: Bits64,
        max_int_register_bits: 64,
        endianness: Little,
        va_list: VaListAbi::of(8, 8),
        stack_alignment_at_call: 16,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Gnu,
        environments: [Gnu, Musl],
        interpreters: {
            gnu: Some("/lib64/ld.so.1"),
            gnu_soft_float: None,
            musl: Some("/lib/ld-musl-mips64el.so.1"),
            lamina: None
        },
        toolchain: { gnu: Some("mips64el-linux-gnuabi64"), musl: Some("mips64el-linux-musl"), lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::None,
    }

    LoongArch64 {
        token: "loongarch64",
        spellings: ["loong64"],
        targets: ["loongarch64_linux"],
        pointer_width: Bits64,
        max_int_register_bits: 64,
        endianness: Little,
        va_list: VaListAbi::of(8, 8),
        stack_alignment_at_call: 16,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Gnu,
        environments: [Gnu, Musl],
        interpreters: {
            gnu: Some("/lib64/ld-linux-loongarch-lp64d.so.1"),
            gnu_soft_float: None,
            musl: Some("/lib/ld-musl-loongarch64.so.1"),
            lamina: None
        },
        toolchain: { gnu: Some("loongarch64-linux-gnu"), musl: Some("loongarch64-linux-musl"), lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::None,
    }

    S390x {
        token: "s390x",
        spellings: ["systemz"],
        targets: ["s390x_linux"],
        pointer_width: Bits64,
        max_int_register_bits: 64,
        endianness: Big,
        va_list: VaListAbi::of(32, 8),
        stack_alignment_at_call: 8,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Gnu,
        environments: [Gnu, Musl],
        interpreters: {
            gnu: Some("/lib/ld64.so.1"),
            gnu_soft_float: None,
            musl: Some("/lib/ld-musl-s390x.so.1"),
            lamina: None
        },
        toolchain: { gnu: Some("s390x-linux-gnu"), musl: Some("s390x-linux-musl"), lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::None,
    }

    Nvptx64 {
        token: "nvptx64",
        spellings: [],
        targets: ["nvptx64_cuda"],
        pointer_width: Bits64,
        max_int_register_bits: 64,
        endianness: Little,
        va_list: VaListAbi::Undefined,
        stack_alignment_at_call: 1,
        honors_argument_alignment: false,
        output_artifact: Text,
        hosted_environment: Freestanding,
        environments: [],
        interpreters: { gnu: None, gnu_soft_float: None, musl: None, lamina: None },
        toolchain: { gnu: None, musl: None, lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::None,
    }

    Amdgcn {
        token: "amdgcn",
        spellings: [],
        targets: ["amdgcn_amdhsa"],
        pointer_width: Bits64,
        max_int_register_bits: 64,
        endianness: Little,
        va_list: VaListAbi::Undefined,
        stack_alignment_at_call: 1,
        honors_argument_alignment: false,
        output_artifact: Text,
        hosted_environment: Freestanding,
        environments: [],
        interpreters: { gnu: None, gnu_soft_float: None, musl: None, lamina: None },
        toolchain: { gnu: None, musl: None, lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::None,
    }

    #[cfg(feature = "nightly")]
    Lisa {
        token: "lisa",
        spellings: [],
        targets: [],
        pointer_width: Bits64,
        max_int_register_bits: 64,
        endianness: Little,
        va_list: VaListAbi::Undefined,
        stack_alignment_at_call: 16,
        honors_argument_alignment: false,
        output_artifact: Executable,
        hosted_environment: Freestanding,
        environments: [],
        interpreters: { gnu: None, gnu_soft_float: None, musl: None, lamina: None },
        toolchain: { gnu: None, musl: None, lamina: None },
        msvc_library_arch: None,
        variants: VariantAxis::None,
    }
}

/// Spellings that name a real machine lamina has decided not to implement, each with the
/// reason and the spelling to use instead. Consulted before the architecture spellings,
/// so a refused name never resolves to an architecture.
pub(crate) const REFUSED_SPELLINGS: &[(&str, &str)] = &[
    (
        "arm32",
        "Architecture 'arm32' is not implemented\n  Hint: 'arm32' names no ARM revision, floating-point ABI or profile, so there is no machine to generate code for. The implemented 32-bit ARM target is armv7, AAPCS with VFP hard float: write 'armv7' (e.g. armv7_linux), or 'thumbv6m'/'thumbv7m' for Cortex-M",
    ),
    (
        "ppc64-elfv1",
        "Architecture 'ppc64-elfv1' is not supported\n  Hint: big-endian POWER here is ELFv2. ELFv1 calls through .opd function descriptors and is a different ABI. Write 'ppc64' (e.g. ppc64_linux)",
    ),
    (
        "powerpc64-elfv1",
        "Architecture 'ppc64-elfv1' is not supported\n  Hint: big-endian POWER here is ELFv2. ELFv1 calls through .opd function descriptors and is a different ABI. Write 'ppc64' (e.g. ppc64_linux)",
    ),
    (
        "mips",
        "Architecture 'mips' is not supported\n  Hint: lamina implements the N64 ABI on 64-bit MIPS only, not O32. Write 'mips64' or 'mips64el' (e.g. mips64_linux)",
    ),
    (
        "mipsel",
        "Architecture 'mips' is not supported\n  Hint: lamina implements the N64 ABI on 64-bit MIPS only, not O32. Write 'mips64' or 'mips64el' (e.g. mips64_linux)",
    ),
    (
        "mips32",
        "Architecture 'mips' is not supported\n  Hint: lamina implements the N64 ABI on 64-bit MIPS only, not O32. Write 'mips64' or 'mips64el' (e.g. mips64_linux)",
    ),
    (
        "mips32el",
        "Architecture 'mips' is not supported\n  Hint: lamina implements the N64 ABI on 64-bit MIPS only, not O32. Write 'mips64' or 'mips64el' (e.g. mips64_linux)",
    ),
    (
        "s390",
        "Architecture 's390' was not added\n  Hint: lamina supports 64-bit z/Architecture only. Write 's390x' (e.g. s390x_linux)",
    ),
];

/// Shorthands for the fields of [`TargetArchitecture::spec`].
///
/// Each one reads the table; none of them is a second place a property is decided. A
/// target that carries a variant should read [`crate::Target::spec`] instead, which
/// applies the variant's refinements.
impl TargetArchitecture {
    pub const fn pointer_width(self) -> PointerWidth {
        self.spec().pointer_width
    }

    pub const fn max_int_register_bits(self) -> u32 {
        self.spec().max_int_register_bits
    }

    pub const fn has_64bit_int_registers(self) -> bool {
        self.spec().has_64bit_int_registers()
    }

    pub const fn endianness(self) -> Endianness {
        self.spec().endianness
    }

    pub const fn va_list(self) -> VaListAbi {
        self.spec().va_list
    }

    pub const fn stack_alignment_at_call(self) -> usize {
        self.spec().stack_alignment_at_call
    }

    pub const fn honors_argument_alignment(self) -> bool {
        self.spec().honors_argument_alignment
    }

    pub const fn output_artifact(self) -> OutputArtifact {
        self.spec().output_artifact
    }

    pub const fn data_layout(self) -> TargetDataLayout {
        self.spec().data_layout()
    }

    pub const fn default_variant(self) -> ArchVariant {
        self.spec().variants.default_variant()
    }
}