xencall/
sys.rs

1/// Handwritten hypercall bindings.
2use nix::ioctl_readwrite_bad;
3use std::ffi::{c_char, c_int, c_uint, c_ulong};
4
5#[repr(C)]
6#[derive(Copy, Clone, Debug)]
7pub struct Hypercall {
8    pub op: c_ulong,
9    pub arg: [c_ulong; 5],
10}
11
12#[repr(C)]
13#[derive(Copy, Clone, Debug, Default)]
14pub struct MmapEntry {
15    pub va: u64,
16    pub mfn: u64,
17    pub npages: u64,
18}
19
20#[repr(C)]
21#[derive(Copy, Clone, Debug, Default)]
22pub struct MmapResource {
23    pub dom: u16,
24    pub typ: u32,
25    pub id: u32,
26    pub idx: u32,
27    pub num: u64,
28    pub addr: u64,
29}
30
31#[repr(C)]
32#[derive(Copy, Clone, Debug)]
33pub struct MmapBatch {
34    pub num: u32,
35    pub domid: u16,
36    pub addr: u64,
37    pub mfns: u64,
38    pub errors: u64,
39}
40
41#[repr(C)]
42#[derive(Clone, Debug)]
43pub struct Mmap {
44    pub num: c_int,
45    pub dom: u16,
46    pub entry: *mut MmapEntry,
47}
48
49const IOCTL_PRIVCMD_HYPERCALL: u64 = 0x305000;
50const IOCTL_PRIVCMD_MMAP: u64 = 0x105002;
51const IOCTL_PRIVCMD_MMAPBATCH_V2: u64 = 0x205004;
52const IOCTL_PRIVCMD_MMAP_RESOURCE: u64 = 0x205007;
53
54ioctl_readwrite_bad!(hypercall, IOCTL_PRIVCMD_HYPERCALL, Hypercall);
55ioctl_readwrite_bad!(mmap, IOCTL_PRIVCMD_MMAP, Mmap);
56ioctl_readwrite_bad!(mmapbatch, IOCTL_PRIVCMD_MMAPBATCH_V2, MmapBatch);
57ioctl_readwrite_bad!(mmap_resource, IOCTL_PRIVCMD_MMAP_RESOURCE, MmapResource);
58
59pub const HYPERVISOR_SET_TRAP_TABLE: c_ulong = 0;
60pub const HYPERVISOR_MMU_UPDATE: c_ulong = 1;
61pub const HYPERVISOR_SET_GDT: c_ulong = 2;
62pub const HYPERVISOR_STACK_SWITCH: c_ulong = 3;
63pub const HYPERVISOR_SET_CALLBACKS: c_ulong = 4;
64pub const HYPERVISOR_FPU_TASKSWITCH: c_ulong = 5;
65pub const HYPERVISOR_SCHED_OP_COMPAT: c_ulong = 6;
66pub const HYPERVISOR_PLATFORM_OP: c_ulong = 7;
67pub const HYPERVISOR_SET_DEBUGREG: c_ulong = 8;
68pub const HYPERVISOR_GET_DEBUGREG: c_ulong = 9;
69pub const HYPERVISOR_UPDATE_DESCRIPTOR: c_ulong = 10;
70pub const HYPERVISOR_MEMORY_OP: c_ulong = 12;
71pub const HYPERVISOR_MULTICALL: c_ulong = 13;
72pub const HYPERVISOR_UPDATE_VA_MAPPING: c_ulong = 14;
73pub const HYPERVISOR_SET_TIMER_OP: c_ulong = 15;
74pub const HYPERVISOR_EVENT_CHANNEL_OP_COMPAT: c_ulong = 16;
75pub const HYPERVISOR_XEN_VERSION: c_ulong = 17;
76pub const HYPERVISOR_CONSOLE_IO: c_ulong = 18;
77pub const HYPERVISOR_PHYSDEV_OP_COMPAT: c_ulong = 19;
78pub const HYPERVISOR_GRANT_TABLE_OP: c_ulong = 20;
79pub const HYPERVISOR_VM_ASSIST: c_ulong = 21;
80pub const HYPERVISOR_UPDATE_VA_MAPPING_OTHERDOMAIN: c_ulong = 22;
81pub const HYPERVISOR_IRET: c_ulong = 23;
82pub const HYPERVISOR_VCPU_OP: c_ulong = 24;
83pub const HYPERVISOR_SET_SEGMENT_BASE: c_ulong = 25;
84pub const HYPERVISOR_MMUEXT_OP: c_ulong = 26;
85pub const HYPERVISOR_XSM_OP: c_ulong = 27;
86pub const HYPERVISOR_NMI_OP: c_ulong = 28;
87pub const HYPERVISOR_SCHED_OP: c_ulong = 29;
88pub const HYPERVISOR_CALLBACK_OP: c_ulong = 30;
89pub const HYPERVISOR_XENOPROF_OP: c_ulong = 31;
90pub const HYPERVISOR_EVENT_CHANNEL_OP: c_ulong = 32;
91pub const HYPERVISOR_PHYSDEV_OP: c_ulong = 33;
92pub const HYPERVISOR_HVM_OP: c_ulong = 34;
93pub const HYPERVISOR_SYSCTL: c_ulong = 35;
94pub const HYPERVISOR_DOMCTL: c_ulong = 36;
95pub const HYPERVISOR_KEXEC_OP: c_ulong = 37;
96pub const HYPERVISOR_TMEM_OP: c_ulong = 38;
97pub const HYPERVISOR_XC_RESERVED_OP: c_ulong = 39;
98pub const HYPERVISOR_XENPMU_OP: c_ulong = 40;
99pub const HYPERVISOR_DM_OP: c_ulong = 41;
100
101pub const XEN_DOMCTL_CDF_HVM_GUEST: u32 = 1u32 << 0;
102pub const XEN_DOMCTL_CDF_HAP: u32 = 1u32 << 1;
103pub const XEN_DOMCTL_CDF_S3_INTEGRITY: u32 = 1u32 << 2;
104pub const XEN_DOMCTL_CDF_OOS_OFF: u32 = 1u32 << 3;
105pub const XEN_DOMCTL_CDF_XS_DOMAIN: u32 = 1u32 << 4;
106pub const XEN_DOMCTL_CDF_IOMMU: u32 = 1u32 << 5;
107
108pub const XEN_X86_EMU_LAPIC: u32 = 1 << 0;
109pub const XEN_X86_EMU_HPET: u32 = 1 << 1;
110pub const XEN_X86_EMU_PM: u32 = 1 << 2;
111pub const XEN_X86_EMU_RTC: u32 = 1 << 3;
112pub const XEN_X86_EMU_IOAPIC: u32 = 1 << 4;
113pub const XEN_X86_EMU_PIC: u32 = 1 << 5;
114pub const XEN_X86_EMU_VGA: u32 = 1 << 6;
115pub const XEN_X86_EMU_IOMMU: u32 = 1 << 7;
116pub const XEN_X86_EMU_PIT: u32 = 1 << 8;
117pub const XEN_X86_EMU_USE_PIRQ: u32 = 1 << 9;
118
119pub const XEN_X86_EMU_ALL: u32 = XEN_X86_EMU_LAPIC
120    | XEN_X86_EMU_HPET
121    | XEN_X86_EMU_PM
122    | XEN_X86_EMU_RTC
123    | XEN_X86_EMU_IOAPIC
124    | XEN_X86_EMU_PIC
125    | XEN_X86_EMU_VGA
126    | XEN_X86_EMU_IOMMU
127    | XEN_X86_EMU_PIT
128    | XEN_X86_EMU_USE_PIRQ;
129
130pub const XEN_DOMCTL_CREATEDOMAIN: u32 = 1;
131pub const XEN_DOMCTL_DESTROYDOMAIN: u32 = 2;
132pub const XEN_DOMCTL_PAUSEDOMAIN: u32 = 3;
133pub const XEN_DOMCTL_UNPAUSEDOMAIN: u32 = 4;
134pub const XEN_DOMCTL_GETDOMAININFO: u32 = 5;
135pub const XEN_DOMCTL_GETMEMLIST: u32 = 6;
136pub const XEN_DOMCTL_SETVCPUAFFINITY: u32 = 9;
137pub const XEN_DOMCTL_SHADOW_OP: u32 = 10;
138pub const XEN_DOMCTL_MAX_MEM: u32 = 11;
139pub const XEN_DOMCTL_SETVCPUCONTEXT: u32 = 12;
140pub const XEN_DOMCTL_GETVCPUCONTEXT: u32 = 13;
141pub const XEN_DOMCTL_GETVCPUINFO: u32 = 14;
142pub const XEN_DOMCTL_MAX_VCPUS: u32 = 15;
143pub const XEN_DOMCTL_SCHEDULER_OP: u32 = 16;
144pub const XEN_DOMCTL_SETDOMAINHANDLE: u32 = 17;
145pub const XEN_DOMCTL_SETDEBUGGING: u32 = 18;
146pub const XEN_DOMCTL_IRQ_PERMISSION: u32 = 19;
147pub const XEN_DOMCTL_IOMEM_PERMISSION: u32 = 20;
148pub const XEN_DOMCTL_IOPORT_PERMISSION: u32 = 21;
149pub const XEN_DOMCTL_HYPERCALL_INIT: u32 = 22;
150pub const XEN_DOMCTL_SETTIMEOFFSET: u32 = 24;
151pub const XEN_DOMCTL_GETVCPUAFFINITY: u32 = 25;
152pub const XEN_DOMCTL_RESUMEDOMAIN: u32 = 27;
153pub const XEN_DOMCTL_SENDTRIGGER: u32 = 28;
154pub const XEN_DOMCTL_SUBSCRIBE: u32 = 29;
155pub const XEN_DOMCTL_GETHVMCONTEXT: u32 = 33;
156pub const XEN_DOMCTL_SETHVMCONTEXT: u32 = 34;
157pub const XEN_DOMCTL_SET_ADDRESS_SIZE: u32 = 35;
158pub const XEN_DOMCTL_GET_ADDRESS_SIZE: u32 = 36;
159pub const XEN_DOMCTL_ASSIGN_DEVICE: u32 = 37;
160pub const XEN_DOMCTL_BIND_PT_IRQ: u32 = 38;
161pub const XEN_DOMCTL_MEMORY_MAPPING: u32 = 39;
162pub const XEN_DOMCTL_IOPORT_MAPPING: u32 = 40;
163pub const XEN_DOMCTL_PIN_MEM_CACHEATTR: u32 = 41;
164pub const XEN_DOMCTL_SET_EXT_VCPUCONTEXT: u32 = 42;
165pub const XEN_DOMCTL_GET_EXT_VCPUCONTEXT: u32 = 43;
166pub const XEN_DOMCTL_TEST_ASSIGN_DEVICE: u32 = 45;
167pub const XEN_DOMCTL_SET_TARGET: u32 = 46;
168pub const XEN_DOMCTL_DEASSIGN_DEVICE: u32 = 47;
169pub const XEN_DOMCTL_UNBIND_PT_IRQ: u32 = 48;
170pub const XEN_DOMCTL_SET_CPUID: u32 = 49;
171pub const XEN_DOMCTL_GET_DEVICE_GROUP: u32 = 50;
172pub const XEN_DOMCTL_SET_MACHINE_ADDRESS_SIZE: u32 = 51;
173pub const XEN_DOMCTL_GET_MACHINE_ADDRESS_SIZE: u32 = 52;
174pub const XEN_DOMCTL_SUPPRESS_SPURIOUS_PAGE_FAULTS: u32 = 53;
175pub const XEN_DOMCTL_DEBUG_OP: u32 = 54;
176pub const XEN_DOMCTL_GETHVMCONTEXT_PARTIAL: u32 = 55;
177pub const XEN_DOMCTL_VM_EVENT_OP: u32 = 56;
178pub const XEN_DOMCTL_MEM_SHARING_OP: u32 = 57;
179pub const XEN_DOMCTL_DISABLE_MIGRATE: u32 = 58;
180pub const XEN_DOMCTL_GETTSCINFO: u32 = 59;
181pub const XEN_DOMCTL_SETTSCINFO: u32 = 60;
182pub const XEN_DOMCTL_GETPAGEFRAMEINFO3: u32 = 61;
183pub const XEN_DOMCTL_SETVCPUEXTSTATE: u32 = 62;
184pub const XEN_DOMCTL_GETVCPUEXTSTATE: u32 = 63;
185pub const XEN_DOMCTL_SET_ACCESS_REQUIRED: u32 = 64;
186pub const XEN_DOMCTL_AUDIT_P2M: u32 = 65;
187pub const XEN_DOMCTL_SET_VIRQ_HANDLER: u32 = 66;
188pub const XEN_DOMCTL_SET_BROKEN_PAGE_P2M: u32 = 67;
189pub const XEN_DOMCTL_SETNODEAFFINITY: u32 = 68;
190pub const XEN_DOMCTL_GETNODEAFFINITY: u32 = 69;
191pub const XEN_DOMCTL_SET_MAX_EVTCHN: u32 = 70;
192pub const XEN_DOMCTL_CACHEFLUSH: u32 = 71;
193pub const XEN_DOMCTL_GET_VCPU_MSRS: u32 = 72;
194pub const XEN_DOMCTL_SET_VCPU_MSRS: u32 = 73;
195pub const XEN_DOMCTL_SETVNUMAINFO: u32 = 74;
196pub const XEN_DOMCTL_PSR_CMT_OP: u32 = 75;
197pub const XEN_DOMCTL_MONITOR_OP: u32 = 77;
198pub const XEN_DOMCTL_PSR_CAT_OP: u32 = 78;
199pub const XEN_DOMCTL_SOFT_RESET: u32 = 79;
200pub const XEN_DOMCTL_SET_GNTTAB_LIMITS: u32 = 80;
201pub const XEN_DOMCTL_VUART_OP: u32 = 81;
202pub const XEN_DOMCTL_SET_PAGING_MEMPOOL_SIZE: u32 = 86;
203pub const XEN_DOMCTL_GDBSX_GUESTMEMIO: u32 = 1000;
204pub const XEN_DOMCTL_GDBSX_PAUSEVCPU: u32 = 1001;
205pub const XEN_DOMCTL_GDBSX_UNPAUSEVCPU: u32 = 1002;
206pub const XEN_DOMCTL_GDBSX_DOMSTATUS: u32 = 1003;
207
208pub const XEN_DOMINF_DYING: u32 = 1u32 << 0;
209pub const XEN_DOMINF_HVM_GUEST: u32 = 1u32 << 1;
210pub const XEN_DOMINF_SHUTDOWN: u32 = 1u32 << 2;
211pub const XEN_DOMINF_PAUSED: u32 = 1u32 << 3;
212pub const XEN_DOMINF_BLOCKED: u32 = 1u32 << 4;
213pub const XEN_DOMINF_RUNNING: u32 = 1u32 << 5;
214pub const XEN_DOMINF_DEBUGGED: u32 = 1u32 << 6;
215pub const XEN_DOMINF_XS_DOMAIN: u32 = 1u32 << 7;
216pub const XEN_DOMINF_HAP: u32 = 1u32 << 8;
217
218#[repr(C)]
219#[derive(Copy, Clone)]
220pub struct DomCtl {
221    pub cmd: u32,
222    pub interface_version: u32,
223    pub domid: u32,
224    pub value: DomCtlValue,
225}
226
227#[repr(C)]
228#[derive(Copy, Clone)]
229pub struct DomCtlVcpuContext {
230    pub vcpu: u32,
231    pub ctx: u64,
232}
233
234#[repr(C)]
235#[derive(Copy, Clone)]
236pub struct AddressSize {
237    pub size: u32,
238}
239
240#[repr(C)]
241#[derive(Copy, Clone)]
242pub union DomCtlValue {
243    pub create_domain: CreateDomain,
244    pub create_domain2: CreateDomain2,
245    pub get_domain_info: GetDomainInfo,
246    pub max_mem: MaxMem,
247    pub max_cpus: MaxVcpus,
248    pub hypercall_init: HypercallInit,
249    pub vcpu_context: DomCtlVcpuContext,
250    pub address_size: AddressSize,
251    pub get_page_frame_info: GetPageFrameInfo3,
252    pub ioport_permission: IoPortPermission,
253    pub iomem_permission: IoMemPermission,
254    pub irq_permission: IrqPermission,
255    pub assign_device: AssignDevice,
256    pub hvm_context: HvmContext,
257    pub paging_mempool: PagingMempool,
258    pub set_domain_handle: SetDomainHandle,
259    pub pad: [u8; 128],
260}
261
262#[repr(C)]
263#[derive(Copy, Clone, Debug)]
264pub struct CreateDomain {
265    pub ssidref: u32,
266    pub handle: [u8; 16],
267    pub flags: u32,
268    pub iommu_opts: u32,
269    pub max_vcpus: u32,
270    pub max_evtchn_port: u32,
271    pub max_grant_frames: i32,
272    pub max_maptrack_frames: i32,
273    pub grant_opts: u32,
274    pub vmtrace_size: u32,
275    pub cpupool_id: u32,
276    pub arch_domain_config: ArchDomainConfig,
277}
278
279#[repr(C)]
280#[derive(Copy, Clone, Debug)]
281pub struct CreateDomain2 {
282    pub ssidref: u32,
283    pub handle: [u8; 16],
284    pub flags: u32,
285    pub iommu_opts: u32,
286    pub max_vcpus: u32,
287    pub max_evtchn_port: u32,
288    pub max_grant_frames: i32,
289    pub max_maptrack_frames: i32,
290    pub grant_opts: u32,
291    pub altp2m_opts: u32,
292    pub vmtrace_size: u32,
293    pub cpupool_id: u32,
294    pub arch_domain_config: ArchDomainConfig,
295}
296
297impl Default for CreateDomain {
298    fn default() -> Self {
299        CreateDomain {
300            ssidref: SECINITSID_DOMU,
301            handle: [0; 16],
302            flags: 0,
303            iommu_opts: 0,
304            max_vcpus: 1,
305            max_evtchn_port: 1023,
306            max_grant_frames: -1,
307            max_maptrack_frames: -1,
308            grant_opts: 2,
309            vmtrace_size: 0,
310            cpupool_id: 0,
311            arch_domain_config: ArchDomainConfig::default(),
312        }
313    }
314}
315
316impl CreateDomain {
317    pub fn to_cd_2(self) -> CreateDomain2 {
318        CreateDomain2 {
319            ssidref: self.ssidref,
320            handle: self.handle,
321            flags: self.flags,
322            iommu_opts: self.iommu_opts,
323            max_vcpus: self.max_vcpus,
324            max_evtchn_port: self.max_evtchn_port,
325            max_grant_frames: self.max_grant_frames,
326            max_maptrack_frames: self.max_maptrack_frames,
327            grant_opts: self.grant_opts,
328            altp2m_opts: 0,
329            vmtrace_size: self.vmtrace_size,
330            cpupool_id: self.cpupool_id,
331            arch_domain_config: self.arch_domain_config,
332        }
333    }
334}
335
336#[repr(C)]
337#[derive(Copy, Clone, Debug, Default)]
338pub struct SetDomainHandle {
339    pub handle: [u8; 16],
340}
341
342#[repr(C)]
343#[derive(Copy, Clone, Debug, Default)]
344pub struct GetDomainInfo {
345    pub domid: u16,
346    pub pad1: u16,
347    pub flags: u32,
348    pub total_pages: u64,
349    pub max_pages: u64,
350    pub outstanding_pages: u64,
351    pub shr_pages: u64,
352    pub paged_pages: u64,
353    pub shared_info_frame: u64,
354    pub cpu_time: u64,
355    pub number_online_vcpus: u32,
356    pub max_vcpu_id: u32,
357    pub ssidref: u32,
358    pub handle: [u8; 16],
359    pub cpupool: u32,
360    pub gpaddr_bits: u8,
361    pub pad2: [u8; 7],
362    pub arch: ArchDomainConfig,
363}
364
365#[repr(C)]
366#[derive(Copy, Clone, Debug)]
367pub struct GetPageFrameInfo3 {
368    pub num: u64,
369    pub array: c_ulong,
370}
371
372#[repr(C)]
373#[derive(Copy, Clone, Debug)]
374pub struct IoPortPermission {
375    pub first_port: u32,
376    pub nr_ports: u32,
377    pub allow: u8,
378}
379
380#[repr(C)]
381#[derive(Copy, Clone, Debug)]
382pub struct IoMemPermission {
383    pub first_mfn: u64,
384    pub nr_mfns: u64,
385    pub allow: u8,
386}
387
388#[repr(C)]
389#[derive(Copy, Clone, Debug)]
390pub struct IrqPermission {
391    pub pirq: u32,
392    pub allow: u8,
393    pub pad: [u8; 3],
394}
395
396#[repr(C)]
397#[derive(Copy, Clone, Debug, Default)]
398#[cfg(target_arch = "x86_64")]
399pub struct ArchDomainConfig {
400    pub emulation_flags: u32,
401    pub misc_flags: u32,
402}
403
404pub const X86_EMU_LAPIC: u32 = 1 << 0;
405
406#[repr(C)]
407#[derive(Copy, Clone, Debug, Default)]
408#[cfg(target_arch = "aarch64")]
409pub struct ArchDomainConfig {
410    pub gic_version: u8,
411    pub sve_v1: u8,
412    pub tee_type: u16,
413    pub nr_spis: u32,
414    pub clock_frequency: u32,
415}
416
417#[repr(C)]
418#[derive(Copy, Clone, Debug)]
419pub struct MaxMem {
420    pub max_memkb: u64,
421}
422
423#[repr(C)]
424#[derive(Copy, Clone, Debug)]
425pub struct MaxVcpus {
426    pub max_vcpus: u32,
427}
428
429#[repr(C)]
430#[derive(Copy, Clone, Debug)]
431pub struct HypercallInit {
432    pub gmfn: u64,
433}
434
435pub const XEN_DOMCTL_MIN_INTERFACE_VERSION: u32 = 0x00000015;
436pub const XEN_DOMCTL_MAX_INTERFACE_VERSION: u32 = 0x00000017;
437pub const XEN_DOMCTL_CREATE_DOMAIN2_INTERFACE_THRESHOLD: u32 = 0x00000017;
438
439pub const SECINITSID_DOMU: u32 = 12;
440
441#[repr(C)]
442#[derive(Copy, Clone, Debug)]
443pub struct XenCapabilitiesInfo {
444    pub capabilities: [c_char; 1024],
445}
446
447pub const XENVER_CAPABILITIES: u64 = 3;
448
449#[repr(C)]
450#[derive(Copy, Clone, Debug)]
451pub struct MemoryReservation {
452    pub extent_start: c_ulong,
453    pub nr_extents: c_ulong,
454    pub extent_order: c_uint,
455    pub mem_flags: c_uint,
456    pub domid: u16,
457}
458
459#[repr(C)]
460#[derive(Copy, Clone, Debug)]
461pub struct AddToPhysmap {
462    pub domid: u16,
463    pub size: u16,
464    pub space: u32,
465    pub idx: u64,
466    pub gpfn: u64,
467}
468
469#[repr(C)]
470#[derive(Copy, Clone, Debug)]
471pub struct MultiCallEntry {
472    pub op: c_ulong,
473    pub result: c_ulong,
474    pub args: [c_ulong; 6],
475}
476
477pub const XEN_MEM_POPULATE_PHYSMAP: u32 = 6;
478pub const XEN_MEM_MEMORY_MAP: u32 = 10;
479pub const XEN_MEM_SET_MEMORY_MAP: u32 = 13;
480pub const XEN_MEM_CLAIM_PAGES: u32 = 24;
481pub const XEN_MEM_ADD_TO_PHYSMAP: u32 = 7;
482
483#[repr(C)]
484#[derive(Copy, Clone, Debug)]
485pub struct MemoryMap {
486    pub count: c_uint,
487    pub buffer: c_ulong,
488}
489
490#[repr(C)]
491#[derive(Copy, Clone, Debug)]
492pub struct ForeignMemoryMap {
493    pub domid: u16,
494    pub map: MemoryMap,
495}
496
497#[repr(C)]
498#[derive(Copy, Clone, Debug)]
499pub struct VcpuGuestContextFpuCtx {
500    pub x: [c_char; 512],
501}
502
503impl Default for VcpuGuestContextFpuCtx {
504    fn default() -> Self {
505        VcpuGuestContextFpuCtx { x: [0; 512] }
506    }
507}
508
509#[repr(C)]
510#[derive(Copy, Clone, Debug, Default)]
511#[allow(non_camel_case_types)]
512pub struct x8664CpuUserRegs {
513    pub r15: u64,
514    pub r14: u64,
515    pub r13: u64,
516    pub r12: u64,
517    pub rbp: u64,
518    pub rbx: u64,
519    pub r11: u64,
520    pub r10: u64,
521    pub r9: u64,
522    pub r8: u64,
523    pub rax: u64,
524    pub rcx: u64,
525    pub rdx: u64,
526    pub rsi: u64,
527    pub rdi: u64,
528    pub error_code: u32,
529    pub entry_vector: u32,
530    pub rip: u64,
531    pub cs: u16,
532    _pad0: [u16; 1],
533    pub saved_upcall_mask: u8,
534    _pad1: [u8; 3],
535    pub rflags: u64,
536    pub rsp: u64,
537    pub ss: u16,
538    _pad2: [u16; 3],
539    pub es: u16,
540    _pad3: [u16; 3],
541    pub ds: u16,
542    _pad4: [u16; 3],
543    pub fs: u16,
544    _pad5: [u16; 3],
545    pub gs: u16,
546    _pad6: [u16; 3],
547}
548
549#[repr(C)]
550#[derive(Copy, Clone, Debug, Default)]
551pub struct TrapInfo {
552    pub vector: u8,
553    pub flags: u8,
554    pub cs: u16,
555    pub address: u64,
556}
557
558#[repr(C)]
559#[derive(Copy, Clone, Debug)]
560#[allow(non_camel_case_types)]
561pub struct x8664VcpuGuestContext {
562    pub fpu_ctx: VcpuGuestContextFpuCtx,
563    pub flags: u64,
564    pub user_regs: x8664CpuUserRegs,
565    pub trap_ctx: [TrapInfo; 256],
566    pub ldt_base: u64,
567    pub ldt_ents: u64,
568    pub gdt_frames: [u64; 16],
569    pub gdt_ents: u64,
570    pub kernel_ss: u64,
571    pub kernel_sp: u64,
572    pub ctrlreg: [u64; 8],
573    pub debugreg: [u64; 8],
574    pub event_callback_eip: u64,
575    pub failsafe_callback_eip: u64,
576    pub syscall_callback_eip: u64,
577    pub vm_assist: u64,
578    pub fs_base: u64,
579    pub gs_base_kernel: u64,
580    pub gs_base_user: u64,
581}
582
583impl Default for x8664VcpuGuestContext {
584    fn default() -> Self {
585        Self {
586            fpu_ctx: Default::default(),
587            flags: 0,
588            user_regs: Default::default(),
589            trap_ctx: [TrapInfo::default(); 256],
590            ldt_base: 0,
591            ldt_ents: 0,
592            gdt_frames: [0; 16],
593            gdt_ents: 0,
594            kernel_ss: 0,
595            kernel_sp: 0,
596            ctrlreg: [0; 8],
597            debugreg: [0; 8],
598            event_callback_eip: 0,
599            failsafe_callback_eip: 0,
600            syscall_callback_eip: 0,
601            vm_assist: 0,
602            fs_base: 0,
603            gs_base_kernel: 0,
604            gs_base_user: 0,
605        }
606    }
607}
608
609#[repr(C)]
610#[derive(Copy, Clone, Debug, Default)]
611pub struct Arm64CpuUserRegs {
612    pub x0: u64,
613    pub x1: u64,
614    pub x2: u64,
615    pub x3: u64,
616    pub x4: u64,
617    pub x5: u64,
618    pub x6: u64,
619    pub x7: u64,
620    pub x8: u64,
621    pub x9: u64,
622    pub x10: u64,
623    pub x11: u64,
624    pub x12: u64,
625    pub x13: u64,
626    pub x14: u64,
627    pub x15: u64,
628    pub x16: u64,
629    pub x17: u64,
630    pub x18: u64,
631    pub x19: u64,
632    pub x20: u64,
633    pub x21: u64,
634    pub x22: u64,
635    pub x23: u64,
636    pub x24: u64,
637    pub x25: u64,
638    pub x26: u64,
639    pub x27: u64,
640    pub x28: u64,
641    pub x29: u64,
642    pub x30: u64,
643    pub pc: u64,
644    pub cpsr: u64,
645    pub spsr_el1: u64,
646    pub spsr_fiq: u32,
647    pub spsr_irq: u32,
648    pub spsr_und: u32,
649    pub spsr_abt: u32,
650    pub sp_el0: u64,
651    pub sp_el1: u64,
652    pub elr_el1: u64,
653}
654
655#[repr(C)]
656#[derive(Copy, Clone, Debug, Default)]
657pub struct Arm64VcpuGuestContext {
658    pub flags: u32,
659    pub user_regs: x8664CpuUserRegs,
660    pub sctlr: u64,
661    pub ttbcr: u64,
662    pub ttbr0: u64,
663    pub ttbr1: u64,
664}
665
666pub union VcpuGuestContextAny {
667    #[cfg(target_arch = "aarch64")]
668    pub value: Arm64VcpuGuestContext,
669    #[cfg(target_arch = "x86_64")]
670    pub value: x8664VcpuGuestContext,
671}
672
673#[repr(C)]
674#[derive(Debug, Copy, Clone)]
675pub struct MmuExtOp {
676    pub cmd: c_uint,
677    pub arg1: c_ulong,
678    pub arg2: c_ulong,
679}
680
681pub const MMUEXT_PIN_L4_TABLE: u32 = 3;
682
683#[repr(C)]
684#[derive(Debug, Copy, Clone)]
685pub struct EvtChnAllocUnbound {
686    pub dom: u16,
687    pub remote_dom: u16,
688    pub port: u32,
689}
690
691#[repr(C, packed)]
692#[derive(Debug, Copy, Clone, Default)]
693pub struct E820Entry {
694    pub addr: u64,
695    pub size: u64,
696    pub typ: u32,
697}
698
699pub const E820_MAX: u32 = 1024;
700pub const E820_RAM: u32 = 1;
701pub const E820_RESERVED: u32 = 2;
702pub const E820_ACPI: u32 = 3;
703pub const E820_NVS: u32 = 4;
704pub const E820_UNUSABLE: u32 = 5;
705
706pub const PHYSDEVOP_MAP_PIRQ: u64 = 13;
707
708#[repr(C)]
709#[derive(Default, Clone, Copy, Debug)]
710pub struct PhysdevMapPirq {
711    pub domid: u16,
712    pub typ: c_int,
713    pub index: c_int,
714    pub pirq: c_int,
715    pub bus: c_int,
716    pub devfn: c_int,
717    pub entry_nr: u16,
718    pub table_base: u64,
719}
720
721pub const DOMCTL_DEV_RDM_RELAXED: u32 = 1;
722pub const DOMCTL_DEV_PCI: u32 = 0;
723pub const DOMCTL_DEV_DT: u32 = 1;
724
725#[repr(C)]
726#[derive(Default, Clone, Copy, Debug)]
727pub struct PciAssignDevice {
728    pub sbdf: u32,
729    pub padding: u64,
730}
731
732#[repr(C)]
733#[derive(Default, Clone, Copy, Debug)]
734pub struct AssignDevice {
735    pub device: u32,
736    pub flags: u32,
737    pub pci_assign_device: PciAssignDevice,
738}
739
740pub const DOMID_IO: u32 = 0x7FF1;
741pub const MEMFLAGS_POPULATE_ON_DEMAND: u32 = 1 << 16;
742
743pub struct PodTarget {
744    pub target_pages: u64,
745    pub total_pages: u64,
746    pub pod_cache_pages: u64,
747    pub pod_entries: u64,
748    pub domid: u16,
749}
750
751#[repr(C)]
752#[derive(Default, Clone, Copy, Debug)]
753pub struct HvmParam {
754    pub domid: u16,
755    pub pad: u8,
756    pub index: u32,
757    pub value: u64,
758}
759
760#[repr(C)]
761#[derive(Clone, Copy, Debug)]
762pub struct HvmContext {
763    pub size: u32,
764    pub buffer: u64,
765}
766
767#[repr(C)]
768#[derive(Clone, Copy, Debug)]
769pub struct PagingMempool {
770    pub size: u64,
771}
772
773#[repr(C)]
774#[derive(Clone, Copy, Debug)]
775pub struct SysctlCputopo {
776    pub core: u32,
777    pub socket: u32,
778    pub node: u32,
779}
780
781#[repr(C)]
782#[derive(Clone, Copy, Debug)]
783pub struct SysctlSetCpuFreqGov {
784    pub scaling_governor: [u8; 16],
785}
786
787#[repr(C)]
788#[derive(Clone, Copy)]
789pub union SysctlPmOpValue {
790    pub set_gov: SysctlSetCpuFreqGov,
791    pub opt_smt: u32,
792    pub pad: [u8; 128],
793}
794
795#[repr(C)]
796#[derive(Clone, Copy)]
797pub struct SysctlPmOp {
798    pub cmd: u32,
799    pub cpuid: u32,
800    pub value: SysctlPmOpValue,
801}
802
803#[repr(C)]
804#[derive(Clone, Copy, Debug)]
805pub struct SysctlCputopoinfo {
806    pub num_cpus: u32,
807    pub handle: c_ulong,
808}
809
810#[repr(C)]
811pub union SysctlValue {
812    pub console: SysctlReadconsole,
813    pub cputopoinfo: SysctlCputopoinfo,
814    pub pm_op: SysctlPmOp,
815    pub phys_info: SysctlPhysinfo,
816    pub pad: [u8; 128],
817}
818
819#[repr(C)]
820pub struct Sysctl {
821    pub cmd: u32,
822    pub interface_version: u32,
823    pub value: SysctlValue,
824}
825
826pub const XEN_SYSCTL_READCONSOLE: u32 = 1;
827pub const XEN_SYSCTL_PHYSINFO: u32 = 3;
828pub const XEN_SYSCTL_PM_OP: u32 = 12;
829pub const XEN_SYSCTL_CPUTOPOINFO: u32 = 16;
830
831pub const XEN_SYSCTL_MIN_INTERFACE_VERSION: u32 = 0x00000015;
832pub const XEN_SYSCTL_MAX_INTERFACE_VERSION: u32 = 0x00000020;
833pub const XEN_SYSCTL_PM_OP_SET_CPUFREQ_GOV: u32 = 0x12;
834pub const XEN_SYSCTL_PM_OP_SET_SCHED_OPT_STMT: u32 = 0x21;
835pub const XEN_SYSCTL_PM_OP_ENABLE_TURBO: u32 = 0x26;
836pub const XEN_SYSCTL_PM_OP_DISABLE_TURBO: u32 = 0x27;
837
838#[derive(Clone, Copy, Debug)]
839pub enum CpuId {
840    All,
841    Single(u32),
842}
843
844#[repr(C)]
845#[derive(Clone, Copy, Debug, Default)]
846pub struct SysctlPhysinfo {
847    pub threads_per_core: u32,
848    pub cores_per_socket: u32,
849    pub nr_cpus: u32,
850    pub max_cpu_id: u32,
851    pub nr_nodes: u32,
852    pub max_node_id: u32,
853    pub cpu_khz: u32,
854    pub capabilities: u32,
855    pub arch_capabilities: u32,
856    pub pad: u32,
857    pub total_pages: u64,
858    pub free_pages: u64,
859    pub scrub_pages: u64,
860    pub outstanding_pages: u64,
861    pub max_mfn: u64,
862    pub hw_cap: [u32; 8],
863}
864
865#[repr(C)]
866#[derive(Clone, Copy, Debug, Default)]
867pub struct SysctlReadconsole {
868    pub clear: u8,
869    pub incremental: u8,
870    pub pad: u16,
871    pub index: u32,
872    pub buffer: u64,
873    pub count: u32,
874}
xencall/sys.rs

xencall/
sys.rs
