#ifdef GET_INSTRINFO_ENUM
#undef GET_INSTRINFO_ENUM
namespace llvm_ks {
namespace SystemZ {
enum {
PHI = 0,
INLINEASM = 1,
CFI_INSTRUCTION = 2,
EH_LABEL = 3,
GC_LABEL = 4,
KILL = 5,
EXTRACT_SUBREG = 6,
INSERT_SUBREG = 7,
IMPLICIT_DEF = 8,
SUBREG_TO_REG = 9,
COPY_TO_REGCLASS = 10,
DBG_VALUE = 11,
REG_SEQUENCE = 12,
COPY = 13,
BUNDLE = 14,
LIFETIME_START = 15,
LIFETIME_END = 16,
STACKMAP = 17,
PATCHPOINT = 18,
LOAD_STACK_GUARD = 19,
STATEPOINT = 20,
LOCAL_ESCAPE = 21,
FAULTING_LOAD_OP = 22,
G_ADD = 23,
A = 24,
ADB = 25,
ADBR = 26,
ADJCALLSTACKDOWN = 27,
ADJCALLSTACKUP = 28,
ADJDYNALLOC = 29,
AEB = 30,
AEBR = 31,
AEXT128_64 = 32,
AFI = 33,
AFIMux = 34,
AG = 35,
AGF = 36,
AGFI = 37,
AGFR = 38,
AGHI = 39,
AGHIK = 40,
AGR = 41,
AGRK = 42,
AGSI = 43,
AH = 44,
AHI = 45,
AHIK = 46,
AHIMux = 47,
AHIMuxK = 48,
AHY = 49,
AIH = 50,
AL = 51,
ALC = 52,
ALCG = 53,
ALCGR = 54,
ALCR = 55,
ALFI = 56,
ALG = 57,
ALGF = 58,
ALGFI = 59,
ALGFR = 60,
ALGHSIK = 61,
ALGR = 62,
ALGRK = 63,
ALHSIK = 64,
ALR = 65,
ALRK = 66,
ALY = 67,
AR = 68,
ARK = 69,
ASI = 70,
ATOMIC_CMP_SWAPW = 71,
ATOMIC_LOADW_AFI = 72,
ATOMIC_LOADW_AR = 73,
ATOMIC_LOADW_MAX = 74,
ATOMIC_LOADW_MIN = 75,
ATOMIC_LOADW_NILH = 76,
ATOMIC_LOADW_NILHi = 77,
ATOMIC_LOADW_NR = 78,
ATOMIC_LOADW_NRi = 79,
ATOMIC_LOADW_OILH = 80,
ATOMIC_LOADW_OR = 81,
ATOMIC_LOADW_SR = 82,
ATOMIC_LOADW_UMAX = 83,
ATOMIC_LOADW_UMIN = 84,
ATOMIC_LOADW_XILF = 85,
ATOMIC_LOADW_XR = 86,
ATOMIC_LOAD_AFI = 87,
ATOMIC_LOAD_AGFI = 88,
ATOMIC_LOAD_AGHI = 89,
ATOMIC_LOAD_AGR = 90,
ATOMIC_LOAD_AHI = 91,
ATOMIC_LOAD_AR = 92,
ATOMIC_LOAD_MAX_32 = 93,
ATOMIC_LOAD_MAX_64 = 94,
ATOMIC_LOAD_MIN_32 = 95,
ATOMIC_LOAD_MIN_64 = 96,
ATOMIC_LOAD_NGR = 97,
ATOMIC_LOAD_NGRi = 98,
ATOMIC_LOAD_NIHF64 = 99,
ATOMIC_LOAD_NIHF64i = 100,
ATOMIC_LOAD_NIHH64 = 101,
ATOMIC_LOAD_NIHH64i = 102,
ATOMIC_LOAD_NIHL64 = 103,
ATOMIC_LOAD_NIHL64i = 104,
ATOMIC_LOAD_NILF = 105,
ATOMIC_LOAD_NILF64 = 106,
ATOMIC_LOAD_NILF64i = 107,
ATOMIC_LOAD_NILFi = 108,
ATOMIC_LOAD_NILH = 109,
ATOMIC_LOAD_NILH64 = 110,
ATOMIC_LOAD_NILH64i = 111,
ATOMIC_LOAD_NILHi = 112,
ATOMIC_LOAD_NILL = 113,
ATOMIC_LOAD_NILL64 = 114,
ATOMIC_LOAD_NILL64i = 115,
ATOMIC_LOAD_NILLi = 116,
ATOMIC_LOAD_NR = 117,
ATOMIC_LOAD_NRi = 118,
ATOMIC_LOAD_OGR = 119,
ATOMIC_LOAD_OIHF64 = 120,
ATOMIC_LOAD_OIHH64 = 121,
ATOMIC_LOAD_OIHL64 = 122,
ATOMIC_LOAD_OILF = 123,
ATOMIC_LOAD_OILF64 = 124,
ATOMIC_LOAD_OILH = 125,
ATOMIC_LOAD_OILH64 = 126,
ATOMIC_LOAD_OILL = 127,
ATOMIC_LOAD_OILL64 = 128,
ATOMIC_LOAD_OR = 129,
ATOMIC_LOAD_SGR = 130,
ATOMIC_LOAD_SR = 131,
ATOMIC_LOAD_UMAX_32 = 132,
ATOMIC_LOAD_UMAX_64 = 133,
ATOMIC_LOAD_UMIN_32 = 134,
ATOMIC_LOAD_UMIN_64 = 135,
ATOMIC_LOAD_XGR = 136,
ATOMIC_LOAD_XIHF64 = 137,
ATOMIC_LOAD_XILF = 138,
ATOMIC_LOAD_XILF64 = 139,
ATOMIC_LOAD_XR = 140,
ATOMIC_SWAPW = 141,
ATOMIC_SWAP_32 = 142,
ATOMIC_SWAP_64 = 143,
AXBR = 144,
AY = 145,
AsmBCR = 146,
AsmBRC = 147,
AsmBRCL = 148,
AsmCGIJ = 149,
AsmCGRJ = 150,
AsmCIJ = 151,
AsmCLGIJ = 152,
AsmCLGRJ = 153,
AsmCLIJ = 154,
AsmCLRJ = 155,
AsmCRJ = 156,
AsmEBR = 157,
AsmEJ = 158,
AsmEJG = 159,
AsmELOC = 160,
AsmELOCG = 161,
AsmELOCGR = 162,
AsmELOCR = 163,
AsmESTOC = 164,
AsmESTOCG = 165,
AsmHBR = 166,
AsmHEBR = 167,
AsmHEJ = 168,
AsmHEJG = 169,
AsmHELOC = 170,
AsmHELOCG = 171,
AsmHELOCGR = 172,
AsmHELOCR = 173,
AsmHESTOC = 174,
AsmHESTOCG = 175,
AsmHJ = 176,
AsmHJG = 177,
AsmHLOC = 178,
AsmHLOCG = 179,
AsmHLOCGR = 180,
AsmHLOCR = 181,
AsmHSTOC = 182,
AsmHSTOCG = 183,
AsmJEAltCGI = 184,
AsmJEAltCGR = 185,
AsmJEAltCI = 186,
AsmJEAltCLGI = 187,
AsmJEAltCLGR = 188,
AsmJEAltCLI = 189,
AsmJEAltCLR = 190,
AsmJEAltCR = 191,
AsmJECGI = 192,
AsmJECGR = 193,
AsmJECI = 194,
AsmJECLGI = 195,
AsmJECLGR = 196,
AsmJECLI = 197,
AsmJECLR = 198,
AsmJECR = 199,
AsmJHAltCGI = 200,
AsmJHAltCGR = 201,
AsmJHAltCI = 202,
AsmJHAltCLGI = 203,
AsmJHAltCLGR = 204,
AsmJHAltCLI = 205,
AsmJHAltCLR = 206,
AsmJHAltCR = 207,
AsmJHCGI = 208,
AsmJHCGR = 209,
AsmJHCI = 210,
AsmJHCLGI = 211,
AsmJHCLGR = 212,
AsmJHCLI = 213,
AsmJHCLR = 214,
AsmJHCR = 215,
AsmJHEAltCGI = 216,
AsmJHEAltCGR = 217,
AsmJHEAltCI = 218,
AsmJHEAltCLGI = 219,
AsmJHEAltCLGR = 220,
AsmJHEAltCLI = 221,
AsmJHEAltCLR = 222,
AsmJHEAltCR = 223,
AsmJHECGI = 224,
AsmJHECGR = 225,
AsmJHECI = 226,
AsmJHECLGI = 227,
AsmJHECLGR = 228,
AsmJHECLI = 229,
AsmJHECLR = 230,
AsmJHECR = 231,
AsmJLAltCGI = 232,
AsmJLAltCGR = 233,
AsmJLAltCI = 234,
AsmJLAltCLGI = 235,
AsmJLAltCLGR = 236,
AsmJLAltCLI = 237,
AsmJLAltCLR = 238,
AsmJLAltCR = 239,
AsmJLCGI = 240,
AsmJLCGR = 241,
AsmJLCI = 242,
AsmJLCLGI = 243,
AsmJLCLGR = 244,
AsmJLCLI = 245,
AsmJLCLR = 246,
AsmJLCR = 247,
AsmJLEAltCGI = 248,
AsmJLEAltCGR = 249,
AsmJLEAltCI = 250,
AsmJLEAltCLGI = 251,
AsmJLEAltCLGR = 252,
AsmJLEAltCLI = 253,
AsmJLEAltCLR = 254,
AsmJLEAltCR = 255,
AsmJLECGI = 256,
AsmJLECGR = 257,
AsmJLECI = 258,
AsmJLECLGI = 259,
AsmJLECLGR = 260,
AsmJLECLI = 261,
AsmJLECLR = 262,
AsmJLECR = 263,
AsmJLHAltCGI = 264,
AsmJLHAltCGR = 265,
AsmJLHAltCI = 266,
AsmJLHAltCLGI = 267,
AsmJLHAltCLGR = 268,
AsmJLHAltCLI = 269,
AsmJLHAltCLR = 270,
AsmJLHAltCR = 271,
AsmJLHCGI = 272,
AsmJLHCGR = 273,
AsmJLHCI = 274,
AsmJLHCLGI = 275,
AsmJLHCLGR = 276,
AsmJLHCLI = 277,
AsmJLHCLR = 278,
AsmJLHCR = 279,
AsmLBR = 280,
AsmLEBR = 281,
AsmLEJ = 282,
AsmLEJG = 283,
AsmLELOC = 284,
AsmLELOCG = 285,
AsmLELOCGR = 286,
AsmLELOCR = 287,
AsmLESTOC = 288,
AsmLESTOCG = 289,
AsmLHBR = 290,
AsmLHJ = 291,
AsmLHJG = 292,
AsmLHLOC = 293,
AsmLHLOCG = 294,
AsmLHLOCGR = 295,
AsmLHLOCR = 296,
AsmLHSTOC = 297,
AsmLHSTOCG = 298,
AsmLJ = 299,
AsmLJG = 300,
AsmLLOC = 301,
AsmLLOCG = 302,
AsmLLOCGR = 303,
AsmLLOCR = 304,
AsmLOC = 305,
AsmLOCG = 306,
AsmLOCGR = 307,
AsmLOCR = 308,
AsmLSTOC = 309,
AsmLSTOCG = 310,
AsmNEBR = 311,
AsmNEJ = 312,
AsmNEJG = 313,
AsmNELOC = 314,
AsmNELOCG = 315,
AsmNELOCGR = 316,
AsmNELOCR = 317,
AsmNESTOC = 318,
AsmNESTOCG = 319,
AsmNHBR = 320,
AsmNHEBR = 321,
AsmNHEJ = 322,
AsmNHEJG = 323,
AsmNHELOC = 324,
AsmNHELOCG = 325,
AsmNHELOCGR = 326,
AsmNHELOCR = 327,
AsmNHESTOC = 328,
AsmNHESTOCG = 329,
AsmNHJ = 330,
AsmNHJG = 331,
AsmNHLOC = 332,
AsmNHLOCG = 333,
AsmNHLOCGR = 334,
AsmNHLOCR = 335,
AsmNHSTOC = 336,
AsmNHSTOCG = 337,
AsmNLBR = 338,
AsmNLEBR = 339,
AsmNLEJ = 340,
AsmNLEJG = 341,
AsmNLELOC = 342,
AsmNLELOCG = 343,
AsmNLELOCGR = 344,
AsmNLELOCR = 345,
AsmNLESTOC = 346,
AsmNLESTOCG = 347,
AsmNLHBR = 348,
AsmNLHJ = 349,
AsmNLHJG = 350,
AsmNLHLOC = 351,
AsmNLHLOCG = 352,
AsmNLHLOCGR = 353,
AsmNLHLOCR = 354,
AsmNLHSTOC = 355,
AsmNLHSTOCG = 356,
AsmNLJ = 357,
AsmNLJG = 358,
AsmNLLOC = 359,
AsmNLLOCG = 360,
AsmNLLOCGR = 361,
AsmNLLOCR = 362,
AsmNLSTOC = 363,
AsmNLSTOCG = 364,
AsmNOBR = 365,
AsmNOJ = 366,
AsmNOJG = 367,
AsmNOLOC = 368,
AsmNOLOCG = 369,
AsmNOLOCGR = 370,
AsmNOLOCR = 371,
AsmNOSTOC = 372,
AsmNOSTOCG = 373,
AsmOBR = 374,
AsmOJ = 375,
AsmOJG = 376,
AsmOLOC = 377,
AsmOLOCG = 378,
AsmOLOCGR = 379,
AsmOLOCR = 380,
AsmOSTOC = 381,
AsmOSTOCG = 382,
AsmSTOC = 383,
AsmSTOCG = 384,
BASR = 385,
BR = 386,
BRAS = 387,
BRASL = 388,
BRC = 389,
BRCL = 390,
BRCT = 391,
BRCTG = 392,
C = 393,
CDB = 394,
CDBR = 395,
CDFBR = 396,
CDGBR = 397,
CDLFBR = 398,
CDLGBR = 399,
CEB = 400,
CEBR = 401,
CEFBR = 402,
CEGBR = 403,
CELFBR = 404,
CELGBR = 405,
CFDBR = 406,
CFEBR = 407,
CFI = 408,
CFIMux = 409,
CFXBR = 410,
CG = 411,
CGDBR = 412,
CGEBR = 413,
CGF = 414,
CGFI = 415,
CGFR = 416,
CGFRL = 417,
CGH = 418,
CGHI = 419,
CGHRL = 420,
CGHSI = 421,
CGIJ = 422,
CGR = 423,
CGRJ = 424,
CGRL = 425,
CGXBR = 426,
CH = 427,
CHF = 428,
CHHSI = 429,
CHI = 430,
CHRL = 431,
CHSI = 432,
CHY = 433,
CIH = 434,
CIJ = 435,
CL = 436,
CLC = 437,
CLCLoop = 438,
CLCSequence = 439,
CLFDBR = 440,
CLFEBR = 441,
CLFHSI = 442,
CLFI = 443,
CLFIMux = 444,
CLFXBR = 445,
CLG = 446,
CLGDBR = 447,
CLGEBR = 448,
CLGF = 449,
CLGFI = 450,
CLGFR = 451,
CLGFRL = 452,
CLGHRL = 453,
CLGHSI = 454,
CLGIJ = 455,
CLGR = 456,
CLGRJ = 457,
CLGRL = 458,
CLGXBR = 459,
CLHF = 460,
CLHHSI = 461,
CLHRL = 462,
CLI = 463,
CLIH = 464,
CLIJ = 465,
CLIY = 466,
CLMux = 467,
CLR = 468,
CLRJ = 469,
CLRL = 470,
CLST = 471,
CLSTLoop = 472,
CLY = 473,
CMux = 474,
CPSDRdd = 475,
CPSDRds = 476,
CPSDRsd = 477,
CPSDRss = 478,
CR = 479,
CRJ = 480,
CRL = 481,
CS = 482,
CSG = 483,
CSY = 484,
CXBR = 485,
CXFBR = 486,
CXGBR = 487,
CXLFBR = 488,
CXLGBR = 489,
CY = 490,
CallBASR = 491,
CallBR = 492,
CallBRASL = 493,
CallJG = 494,
CondStore16 = 495,
CondStore16Inv = 496,
CondStore16Mux = 497,
CondStore16MuxInv = 498,
CondStore32 = 499,
CondStore32Inv = 500,
CondStore64 = 501,
CondStore64Inv = 502,
CondStore8 = 503,
CondStore8Inv = 504,
CondStore8Mux = 505,
CondStore8MuxInv = 506,
CondStoreF32 = 507,
CondStoreF32Inv = 508,
CondStoreF64 = 509,
CondStoreF64Inv = 510,
DDB = 511,
DDBR = 512,
DEB = 513,
DEBR = 514,
DL = 515,
DLG = 516,
DLGR = 517,
DLR = 518,
DSG = 519,
DSGF = 520,
DSGFR = 521,
DSGR = 522,
DXBR = 523,
EAR = 524,
ETND = 525,
FIDBR = 526,
FIDBRA = 527,
FIEBR = 528,
FIEBRA = 529,
FIXBR = 530,
FIXBRA = 531,
FLOGR = 532,
GOT = 533,
IC = 534,
IC32 = 535,
IC32Y = 536,
ICY = 537,
IIFMux = 538,
IIHF = 539,
IIHF64 = 540,
IIHH = 541,
IIHH64 = 542,
IIHL = 543,
IIHL64 = 544,
IIHMux = 545,
IILF = 546,
IILF64 = 547,
IILH = 548,
IILH64 = 549,
IILL = 550,
IILL64 = 551,
IILMux = 552,
IPM = 553,
J = 554,
JG = 555,
L = 556,
L128 = 557,
LA = 558,
LAA = 559,
LAAG = 560,
LAAL = 561,
LAALG = 562,
LAN = 563,
LANG = 564,
LAO = 565,
LAOG = 566,
LARL = 567,
LAX = 568,
LAXG = 569,
LAY = 570,
LB = 571,
LBH = 572,
LBMux = 573,
LBR = 574,
LCBB = 575,
LCDBR = 576,
LCDFR = 577,
LCDFR_32 = 578,
LCEBR = 579,
LCGFR = 580,
LCGR = 581,
LCR = 582,
LCXBR = 583,
LD = 584,
LDE32 = 585,
LDEB = 586,
LDEBR = 587,
LDGR = 588,
LDR = 589,
LDXBR = 590,
LDXBRA = 591,
LDY = 592,
LE = 593,
LEDBR = 594,
LEDBRA = 595,
LEFR = 596,
LER = 597,
LEXBR = 598,
LEXBRA = 599,
LEY = 600,
LFER = 601,
LFH = 602,
LG = 603,
LGB = 604,
LGBR = 605,
LGDR = 606,
LGF = 607,
LGFI = 608,
LGFR = 609,
LGFRL = 610,
LGH = 611,
LGHI = 612,
LGHR = 613,
LGHRL = 614,
LGR = 615,
LGRL = 616,
LH = 617,
LHH = 618,
LHI = 619,
LHIMux = 620,
LHMux = 621,
LHR = 622,
LHRL = 623,
LHY = 624,
LLC = 625,
LLCH = 626,
LLCMux = 627,
LLCR = 628,
LLCRMux = 629,
LLGC = 630,
LLGCR = 631,
LLGF = 632,
LLGFR = 633,
LLGFRL = 634,
LLGH = 635,
LLGHR = 636,
LLGHRL = 637,
LLH = 638,
LLHH = 639,
LLHMux = 640,
LLHR = 641,
LLHRL = 642,
LLHRMux = 643,
LLIHF = 644,
LLIHH = 645,
LLIHL = 646,
LLILF = 647,
LLILH = 648,
LLILL = 649,
LMG = 650,
LMux = 651,
LNDBR = 652,
LNDFR = 653,
LNDFR_32 = 654,
LNEBR = 655,
LNGFR = 656,
LNGR = 657,
LNR = 658,
LNXBR = 659,
LOC = 660,
LOCG = 661,
LOCGR = 662,
LOCR = 663,
LPDBR = 664,
LPDFR = 665,
LPDFR_32 = 666,
LPEBR = 667,
LPGFR = 668,
LPGR = 669,
LPR = 670,
LPXBR = 671,
LR = 672,
LRL = 673,
LRMux = 674,
LRV = 675,
LRVG = 676,
LRVGR = 677,
LRVR = 678,
LT = 679,
LTDBR = 680,
LTDBRCompare = 681,
LTDBRCompare_VecPseudo = 682,
LTEBR = 683,
LTEBRCompare = 684,
LTEBRCompare_VecPseudo = 685,
LTG = 686,
LTGF = 687,
LTGFR = 688,
LTGR = 689,
LTR = 690,
LTXBR = 691,
LTXBRCompare = 692,
LTXBRCompare_VecPseudo = 693,
LX = 694,
LXDB = 695,
LXDBR = 696,
LXEB = 697,
LXEBR = 698,
LXR = 699,
LY = 700,
LZDR = 701,
LZER = 702,
LZXR = 703,
MADB = 704,
MADBR = 705,
MAEB = 706,
MAEBR = 707,
MDB = 708,
MDBR = 709,
MDEB = 710,
MDEBR = 711,
MEEB = 712,
MEEBR = 713,
MGHI = 714,
MH = 715,
MHI = 716,
MHY = 717,
MLG = 718,
MLGR = 719,
MS = 720,
MSDB = 721,
MSDBR = 722,
MSEB = 723,
MSEBR = 724,
MSFI = 725,
MSG = 726,
MSGF = 727,
MSGFI = 728,
MSGFR = 729,
MSGR = 730,
MSR = 731,
MSY = 732,
MVC = 733,
MVCLoop = 734,
MVCSequence = 735,
MVGHI = 736,
MVHHI = 737,
MVHI = 738,
MVI = 739,
MVIY = 740,
MVST = 741,
MVSTLoop = 742,
MXBR = 743,
MXDB = 744,
MXDBR = 745,
N = 746,
NC = 747,
NCLoop = 748,
NCSequence = 749,
NG = 750,
NGR = 751,
NGRK = 752,
NI = 753,
NIFMux = 754,
NIHF = 755,
NIHF64 = 756,
NIHH = 757,
NIHH64 = 758,
NIHL = 759,
NIHL64 = 760,
NIHMux = 761,
NILF = 762,
NILF64 = 763,
NILH = 764,
NILH64 = 765,
NILL = 766,
NILL64 = 767,
NILMux = 768,
NIY = 769,
NR = 770,
NRK = 771,
NTSTG = 772,
NY = 773,
O = 774,
OC = 775,
OCLoop = 776,
OCSequence = 777,
OG = 778,
OGR = 779,
OGRK = 780,
OI = 781,
OIFMux = 782,
OIHF = 783,
OIHF64 = 784,
OIHH = 785,
OIHH64 = 786,
OIHL = 787,
OIHL64 = 788,
OIHMux = 789,
OILF = 790,
OILF64 = 791,
OILH = 792,
OILH64 = 793,
OILL = 794,
OILL64 = 795,
OILMux = 796,
OIY = 797,
OR = 798,
ORK = 799,
OY = 800,
PFD = 801,
PFDRL = 802,
POPCNT = 803,
PPA = 804,
RISBG = 805,
RISBG32 = 806,
RISBGN = 807,
RISBHG = 808,
RISBHH = 809,
RISBHL = 810,
RISBLG = 811,
RISBLH = 812,
RISBLL = 813,
RISBMux = 814,
RLL = 815,
RLLG = 816,
RNSBG = 817,
ROSBG = 818,
RXSBG = 819,
Return = 820,
S = 821,
SDB = 822,
SDBR = 823,
SEB = 824,
SEBR = 825,
SG = 826,
SGF = 827,
SGFR = 828,
SGR = 829,
SGRK = 830,
SH = 831,
SHY = 832,
SL = 833,
SLB = 834,
SLBG = 835,
SLBGR = 836,
SLBR = 837,
SLFI = 838,
SLG = 839,
SLGF = 840,
SLGFI = 841,
SLGFR = 842,
SLGR = 843,
SLGRK = 844,
SLL = 845,
SLLG = 846,
SLLK = 847,
SLR = 848,
SLRK = 849,
SLY = 850,
SQDB = 851,
SQDBR = 852,
SQEB = 853,
SQEBR = 854,
SQXBR = 855,
SR = 856,
SRA = 857,
SRAG = 858,
SRAK = 859,
SRK = 860,
SRL = 861,
SRLG = 862,
SRLK = 863,
SRST = 864,
SRSTLoop = 865,
ST = 866,
ST128 = 867,
STC = 868,
STCH = 869,
STCK = 870,
STCKE = 871,
STCKF = 872,
STCMux = 873,
STCY = 874,
STD = 875,
STDY = 876,
STE = 877,
STEY = 878,
STFH = 879,
STFLE = 880,
STG = 881,
STGRL = 882,
STH = 883,
STHH = 884,
STHMux = 885,
STHRL = 886,
STHY = 887,
STMG = 888,
STMux = 889,
STOC = 890,
STOCG = 891,
STRL = 892,
STRV = 893,
STRVG = 894,
STX = 895,
STY = 896,
SXBR = 897,
SY = 898,
Select32 = 899,
Select32Mux = 900,
Select64 = 901,
SelectF128 = 902,
SelectF32 = 903,
SelectF64 = 904,
Serialize = 905,
TABORT = 906,
TBEGIN = 907,
TBEGINC = 908,
TBEGIN_nofloat = 909,
TEND = 910,
TLS_GDCALL = 911,
TLS_LDCALL = 912,
TM = 913,
TMHH = 914,
TMHH64 = 915,
TMHL = 916,
TMHL64 = 917,
TMHMux = 918,
TMLH = 919,
TMLH64 = 920,
TMLL = 921,
TMLL64 = 922,
TMLMux = 923,
TMY = 924,
VAB = 925,
VACCB = 926,
VACCCQ = 927,
VACCF = 928,
VACCG = 929,
VACCH = 930,
VACCQ = 931,
VACQ = 932,
VAF = 933,
VAG = 934,
VAH = 935,
VAQ = 936,
VAVGB = 937,
VAVGF = 938,
VAVGG = 939,
VAVGH = 940,
VAVGLB = 941,
VAVGLF = 942,
VAVGLG = 943,
VAVGLH = 944,
VCDGB = 945,
VCDLGB = 946,
VCEQB = 947,
VCEQBS = 948,
VCEQF = 949,
VCEQFS = 950,
VCEQG = 951,
VCEQGS = 952,
VCEQH = 953,
VCEQHS = 954,
VCGDB = 955,
VCHB = 956,
VCHBS = 957,
VCHF = 958,
VCHFS = 959,
VCHG = 960,
VCHGS = 961,
VCHH = 962,
VCHHS = 963,
VCHLB = 964,
VCHLBS = 965,
VCHLF = 966,
VCHLFS = 967,
VCHLG = 968,
VCHLGS = 969,
VCHLH = 970,
VCHLHS = 971,
VCKSM = 972,
VCLGDB = 973,
VCLZB = 974,
VCLZF = 975,
VCLZG = 976,
VCLZH = 977,
VCTZB = 978,
VCTZF = 979,
VCTZG = 980,
VCTZH = 981,
VECB = 982,
VECF = 983,
VECG = 984,
VECH = 985,
VECLB = 986,
VECLF = 987,
VECLG = 988,
VECLH = 989,
VERIMB = 990,
VERIMF = 991,
VERIMG = 992,
VERIMH = 993,
VERLLB = 994,
VERLLF = 995,
VERLLG = 996,
VERLLH = 997,
VERLLVB = 998,
VERLLVF = 999,
VERLLVG = 1000,
VERLLVH = 1001,
VESLB = 1002,
VESLF = 1003,
VESLG = 1004,
VESLH = 1005,
VESLVB = 1006,
VESLVF = 1007,
VESLVG = 1008,
VESLVH = 1009,
VESRAB = 1010,
VESRAF = 1011,
VESRAG = 1012,
VESRAH = 1013,
VESRAVB = 1014,
VESRAVF = 1015,
VESRAVG = 1016,
VESRAVH = 1017,
VESRLB = 1018,
VESRLF = 1019,
VESRLG = 1020,
VESRLH = 1021,
VESRLVB = 1022,
VESRLVF = 1023,
VESRLVG = 1024,
VESRLVH = 1025,
VFADB = 1026,
VFAEB = 1027,
VFAEBS = 1028,
VFAEF = 1029,
VFAEFS = 1030,
VFAEH = 1031,
VFAEHS = 1032,
VFAEZB = 1033,
VFAEZBS = 1034,
VFAEZF = 1035,
VFAEZFS = 1036,
VFAEZH = 1037,
VFAEZHS = 1038,
VFCEDB = 1039,
VFCEDBS = 1040,
VFCHDB = 1041,
VFCHDBS = 1042,
VFCHEDB = 1043,
VFCHEDBS = 1044,
VFDDB = 1045,
VFEEB = 1046,
VFEEBS = 1047,
VFEEF = 1048,
VFEEFS = 1049,
VFEEH = 1050,
VFEEHS = 1051,
VFEEZB = 1052,
VFEEZBS = 1053,
VFEEZF = 1054,
VFEEZFS = 1055,
VFEEZH = 1056,
VFEEZHS = 1057,
VFENEB = 1058,
VFENEBS = 1059,
VFENEF = 1060,
VFENEFS = 1061,
VFENEH = 1062,
VFENEHS = 1063,
VFENEZB = 1064,
VFENEZBS = 1065,
VFENEZF = 1066,
VFENEZFS = 1067,
VFENEZH = 1068,
VFENEZHS = 1069,
VFIDB = 1070,
VFLCDB = 1071,
VFLNDB = 1072,
VFLPDB = 1073,
VFMADB = 1074,
VFMDB = 1075,
VFMSDB = 1076,
VFSDB = 1077,
VFSQDB = 1078,
VFTCIDB = 1079,
VGBM = 1080,
VGEF = 1081,
VGEG = 1082,
VGFMAB = 1083,
VGFMAF = 1084,
VGFMAG = 1085,
VGFMAH = 1086,
VGFMB = 1087,
VGFMF = 1088,
VGFMG = 1089,
VGFMH = 1090,
VGMB = 1091,
VGMF = 1092,
VGMG = 1093,
VGMH = 1094,
VISTRB = 1095,
VISTRBS = 1096,
VISTRF = 1097,
VISTRFS = 1098,
VISTRH = 1099,
VISTRHS = 1100,
VL = 1101,
VL32 = 1102,
VL64 = 1103,
VLBB = 1104,
VLCB = 1105,
VLCF = 1106,
VLCG = 1107,
VLCH = 1108,
VLDEB = 1109,
VLEB = 1110,
VLEDB = 1111,
VLEF = 1112,
VLEG = 1113,
VLEH = 1114,
VLEIB = 1115,
VLEIF = 1116,
VLEIG = 1117,
VLEIH = 1118,
VLGVB = 1119,
VLGVF = 1120,
VLGVG = 1121,
VLGVH = 1122,
VLL = 1123,
VLLEZB = 1124,
VLLEZF = 1125,
VLLEZG = 1126,
VLLEZH = 1127,
VLM = 1128,
VLPB = 1129,
VLPF = 1130,
VLPG = 1131,
VLPH = 1132,
VLR = 1133,
VLR32 = 1134,
VLR64 = 1135,
VLREPB = 1136,
VLREPF = 1137,
VLREPG = 1138,
VLREPH = 1139,
VLVGB = 1140,
VLVGF = 1141,
VLVGG = 1142,
VLVGH = 1143,
VLVGP = 1144,
VLVGP32 = 1145,
VMAEB = 1146,
VMAEF = 1147,
VMAEH = 1148,
VMAHB = 1149,
VMAHF = 1150,
VMAHH = 1151,
VMALB = 1152,
VMALEB = 1153,
VMALEF = 1154,
VMALEH = 1155,
VMALF = 1156,
VMALHB = 1157,
VMALHF = 1158,
VMALHH = 1159,
VMALHW = 1160,
VMALOB = 1161,
VMALOF = 1162,
VMALOH = 1163,
VMAOB = 1164,
VMAOF = 1165,
VMAOH = 1166,
VMEB = 1167,
VMEF = 1168,
VMEH = 1169,
VMHB = 1170,
VMHF = 1171,
VMHH = 1172,
VMLB = 1173,
VMLEB = 1174,
VMLEF = 1175,
VMLEH = 1176,
VMLF = 1177,
VMLHB = 1178,
VMLHF = 1179,
VMLHH = 1180,
VMLHW = 1181,
VMLOB = 1182,
VMLOF = 1183,
VMLOH = 1184,
VMNB = 1185,
VMNF = 1186,
VMNG = 1187,
VMNH = 1188,
VMNLB = 1189,
VMNLF = 1190,
VMNLG = 1191,
VMNLH = 1192,
VMOB = 1193,
VMOF = 1194,
VMOH = 1195,
VMRHB = 1196,
VMRHF = 1197,
VMRHG = 1198,
VMRHH = 1199,
VMRLB = 1200,
VMRLF = 1201,
VMRLG = 1202,
VMRLH = 1203,
VMXB = 1204,
VMXF = 1205,
VMXG = 1206,
VMXH = 1207,
VMXLB = 1208,
VMXLF = 1209,
VMXLG = 1210,
VMXLH = 1211,
VN = 1212,
VNC = 1213,
VNO = 1214,
VO = 1215,
VONE = 1216,
VPDI = 1217,
VPERM = 1218,
VPKF = 1219,
VPKG = 1220,
VPKH = 1221,
VPKLSF = 1222,
VPKLSFS = 1223,
VPKLSG = 1224,
VPKLSGS = 1225,
VPKLSH = 1226,
VPKLSHS = 1227,
VPKSF = 1228,
VPKSFS = 1229,
VPKSG = 1230,
VPKSGS = 1231,
VPKSH = 1232,
VPKSHS = 1233,
VPOPCT = 1234,
VREPB = 1235,
VREPF = 1236,
VREPG = 1237,
VREPH = 1238,
VREPIB = 1239,
VREPIF = 1240,
VREPIG = 1241,
VREPIH = 1242,
VSB = 1243,
VSBCBIQ = 1244,
VSBIQ = 1245,
VSCBIB = 1246,
VSCBIF = 1247,
VSCBIG = 1248,
VSCBIH = 1249,
VSCBIQ = 1250,
VSCEF = 1251,
VSCEG = 1252,
VSEGB = 1253,
VSEGF = 1254,
VSEGH = 1255,
VSEL = 1256,
VSF = 1257,
VSG = 1258,
VSH = 1259,
VSL = 1260,
VSLB = 1261,
VSLDB = 1262,
VSQ = 1263,
VSRA = 1264,
VSRAB = 1265,
VSRL = 1266,
VSRLB = 1267,
VST = 1268,
VST32 = 1269,
VST64 = 1270,
VSTEB = 1271,
VSTEF = 1272,
VSTEG = 1273,
VSTEH = 1274,
VSTL = 1275,
VSTM = 1276,
VSTRCB = 1277,
VSTRCBS = 1278,
VSTRCF = 1279,
VSTRCFS = 1280,
VSTRCH = 1281,
VSTRCHS = 1282,
VSTRCZB = 1283,
VSTRCZBS = 1284,
VSTRCZF = 1285,
VSTRCZFS = 1286,
VSTRCZH = 1287,
VSTRCZHS = 1288,
VSUMB = 1289,
VSUMGF = 1290,
VSUMGH = 1291,
VSUMH = 1292,
VSUMQF = 1293,
VSUMQG = 1294,
VTM = 1295,
VUPHB = 1296,
VUPHF = 1297,
VUPHH = 1298,
VUPLB = 1299,
VUPLF = 1300,
VUPLHB = 1301,
VUPLHF = 1302,
VUPLHH = 1303,
VUPLHW = 1304,
VUPLLB = 1305,
VUPLLF = 1306,
VUPLLH = 1307,
VX = 1308,
VZERO = 1309,
WCDGB = 1310,
WCDLGB = 1311,
WCGDB = 1312,
WCLGDB = 1313,
WFADB = 1314,
WFCDB = 1315,
WFCEDB = 1316,
WFCEDBS = 1317,
WFCHDB = 1318,
WFCHDBS = 1319,
WFCHEDB = 1320,
WFCHEDBS = 1321,
WFDDB = 1322,
WFIDB = 1323,
WFKDB = 1324,
WFLCDB = 1325,
WFLNDB = 1326,
WFLPDB = 1327,
WFMADB = 1328,
WFMDB = 1329,
WFMSDB = 1330,
WFSDB = 1331,
WFSQDB = 1332,
WFTCIDB = 1333,
WLDEB = 1334,
WLEDB = 1335,
X = 1336,
XC = 1337,
XCLoop = 1338,
XCSequence = 1339,
XG = 1340,
XGR = 1341,
XGRK = 1342,
XI = 1343,
XIFMux = 1344,
XIHF = 1345,
XIHF64 = 1346,
XILF = 1347,
XILF64 = 1348,
XIY = 1349,
XR = 1350,
XRK = 1351,
XY = 1352,
ZEXT128_32 = 1353,
ZEXT128_64 = 1354,
INSTRUCTION_LIST_END = 1355
};
namespace Sched {
enum {
NoInstrModel = 0,
SCHED_LIST_END = 1
};
} } } #endif
#ifdef GET_INSTRINFO_MC_DESC
#undef GET_INSTRINFO_MC_DESC
namespace llvm_ks {
static const MCPhysReg ImplicitList1[] = { SystemZ::CC, 0 };
static const MCPhysReg ImplicitList2[] = { SystemZ::R0L, 0 };
static const MCPhysReg ImplicitList3[] = { SystemZ::R14D, SystemZ::CC, 0 };
static const MCPhysReg ImplicitList4[] = { SystemZ::R1D, 0 };
static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo11[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo12[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo13[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo14[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo15[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo16[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo17[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo18[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo19[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo20[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo21[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo22[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo23[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo24[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo25[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo26[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo27[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo28[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo29[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo30[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo31[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo32[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo33[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo34[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo35[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo36[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo37[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo38[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo39[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo40[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo41[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo42[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo43[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo44[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo45[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo46[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo47[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo48[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo49[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo50[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo51[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo52[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo53[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo54[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo55[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo56[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo57[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo58[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo59[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo60[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo61[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo62[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo63[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo64[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo65[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo66[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo67[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo68[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo69[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo70[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo71[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo72[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo73[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo74[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo75[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo76[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo77[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo78[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo79[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo80[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo81[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo82[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo83[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo84[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo85[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo86[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo87[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo88[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo89[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo90[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo91[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo92[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo93[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo94[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo95[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo96[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
static const MCOperandInfo OperandInfo97[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo98[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo99[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo100[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo101[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo102[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo103[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo104[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo105[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo106[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo107[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo108[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo109[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo110[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo111[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo112[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo113[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo114[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo115[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo116[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo117[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo118[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo119[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo120[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo121[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo122[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo123[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo124[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo125[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo126[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo127[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo128[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo129[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo130[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo131[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo132[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo133[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo134[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo135[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo136[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo137[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo138[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo139[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo140[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo141[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo142[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo143[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo144[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo145[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo146[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo147[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo148[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo149[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo150[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo151[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo152[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo153[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo154[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo155[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo156[] = { { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo157[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo158[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo159[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo160[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo161[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo162[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo163[] = { { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo164[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo165[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo166[] = { { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo167[] = { { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo168[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo169[] = { { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo170[] = { { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo171[] = { { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo172[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo173[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo174[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo175[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo176[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo177[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo178[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo179[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo180[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo181[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo182[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo183[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo184[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo185[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo186[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo187[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo188[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo189[] = { { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo190[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo191[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo192[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo193[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo194[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo195[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo196[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo197[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo198[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo199[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo200[] = { { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo201[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo202[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo203[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo204[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo205[] = { { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo206[] = { { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo207[] = { { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
extern const MCInstrDesc SystemZInsts[] = {
{ 0, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, { 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, { 2, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, { 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, { 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, { 5, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, { 6, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, { 7, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, { 8, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo6, -1 ,nullptr }, { 10, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, { 11, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, { 12, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr }, { 13, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr }, { 14, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, { 15, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, { 16, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, { 17, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr }, { 18, 6, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo9, -1 ,nullptr }, { 19, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo10, -1 ,nullptr }, { 20, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, { 21, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr }, { 22, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 23, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, { 24, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x23c88ULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 25, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x3fd08ULL, nullptr, ImplicitList1, OperandInfo14, -1 ,nullptr }, { 26, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo15, -1 ,nullptr }, { 27, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, { 28, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr }, { 29, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, { 30, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x3fc88ULL, nullptr, ImplicitList1, OperandInfo17, -1 ,nullptr }, { 31, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo18, -1 ,nullptr }, { 32, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr }, { 33, 3, 1, 6, 0, 0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo20, -1 ,nullptr }, { 34, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo21, -1 ,nullptr }, { 35, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x23d0cULL, nullptr, ImplicitList1, OperandInfo22, -1 ,nullptr }, { 36, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x23c8cULL, nullptr, ImplicitList1, OperandInfo22, -1 ,nullptr }, { 37, 3, 1, 6, 0, 0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 38, 3, 1, 4, 0, 0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo24, -1 ,nullptr }, { 39, 3, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 40, 3, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo25, -1 ,nullptr }, { 41, 3, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo26, -1 ,nullptr }, { 42, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo27, -1 ,nullptr }, { 43, 3, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x23c04ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 44, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x23c48ULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 45, 3, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo20, -1 ,nullptr }, { 46, 3, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr }, { 47, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo21, -1 ,nullptr }, { 48, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo30, -1 ,nullptr }, { 49, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x23c4cULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 50, 3, 1, 6, 0, 0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr }, { 51, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 52, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL, ImplicitList1, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 53, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL, ImplicitList1, ImplicitList1, OperandInfo22, -1 ,nullptr }, { 54, 3, 1, 4, 0, 0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo26, -1 ,nullptr }, { 55, 3, 1, 4, 0, 0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo32, -1 ,nullptr }, { 56, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo20, -1 ,nullptr }, { 57, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL, nullptr, ImplicitList1, OperandInfo22, -1 ,nullptr }, { 58, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, ImplicitList1, OperandInfo22, -1 ,nullptr }, { 59, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 60, 3, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo24, -1 ,nullptr }, { 61, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo25, -1 ,nullptr }, { 62, 3, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo26, -1 ,nullptr }, { 63, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo27, -1 ,nullptr }, { 64, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo29, -1 ,nullptr }, { 65, 3, 1, 2, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList1, OperandInfo32, -1 ,nullptr }, { 66, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr }, { 67, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 68, 3, 1, 2, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo32, -1 ,nullptr }, { 69, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr }, { 70, 3, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x23c04ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 71, 8, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo34, -1 ,nullptr }, { 72, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo35, -1 ,nullptr }, { 73, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr }, { 74, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr }, { 75, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr }, { 76, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo35, -1 ,nullptr }, { 77, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo35, -1 ,nullptr }, { 78, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr }, { 79, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr }, { 80, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo35, -1 ,nullptr }, { 81, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr }, { 82, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr }, { 83, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr }, { 84, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr }, { 85, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo35, -1 ,nullptr }, { 86, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr }, { 87, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr }, { 88, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 89, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 90, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr }, { 91, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr }, { 92, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr }, { 93, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr }, { 94, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr }, { 95, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr }, { 96, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr }, { 97, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr }, { 98, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr }, { 99, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 100, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 101, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 102, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 103, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 104, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 105, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr }, { 106, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 107, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 108, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr }, { 109, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr }, { 110, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 111, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 112, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr }, { 113, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr }, { 114, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 115, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 116, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr }, { 117, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr }, { 118, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr }, { 119, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr }, { 120, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 121, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 122, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 123, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr }, { 124, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 125, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr }, { 126, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 127, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr }, { 128, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 129, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr }, { 130, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr }, { 131, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr }, { 132, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr }, { 133, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr }, { 134, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr }, { 135, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr }, { 136, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr }, { 137, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 138, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo37, -1 ,nullptr }, { 139, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo38, -1 ,nullptr }, { 140, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr }, { 141, 7, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo36, -1 ,nullptr }, { 142, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo40, -1 ,nullptr }, { 143, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL, nullptr, ImplicitList1, OperandInfo39, -1 ,nullptr }, { 144, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr }, { 145, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x23c8cULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 146, 2, 0, 2, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo42, -1 ,nullptr }, { 147, 2, 0, 4, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr }, { 148, 2, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList1, nullptr, OperandInfo7, -1 ,nullptr }, { 149, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr }, { 150, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr }, { 151, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr }, { 152, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr }, { 153, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr }, { 154, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr }, { 155, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr }, { 156, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr }, { 157, 1, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, { 158, 1, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 159, 1, 0, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 160, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x84ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr }, { 161, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x104ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr }, { 162, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo26, -1 ,nullptr }, { 163, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, { 164, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x84ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, { 165, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x104ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, { 166, 1, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, { 167, 1, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, { 168, 1, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 169, 1, 0, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 170, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x84ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr }, { 171, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x104ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr }, { 172, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo26, -1 ,nullptr }, { 173, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, { 174, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x84ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, { 175, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x104ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, { 176, 1, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 177, 1, 0, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 178, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x84ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr }, { 179, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x104ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr }, { 180, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo26, -1 ,nullptr }, { 181, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, { 182, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x84ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, { 183, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x104ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, { 184, 3, 0, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, { 185, 3, 0, 6, 0, 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0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, { 355, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x84ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, { 356, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x104ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, { 357, 1, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 358, 1, 0, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 359, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x84ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr }, { 360, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x104ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr }, { 361, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo26, -1 ,nullptr }, { 362, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, { 363, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x84ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, { 364, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x104ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, { 365, 1, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, { 366, 1, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 367, 1, 0, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 368, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x84ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr }, { 369, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x104ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr }, { 370, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo26, -1 ,nullptr }, { 371, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, { 372, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x84ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, { 373, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x104ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, { 374, 1, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, { 375, 1, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 376, 1, 0, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 377, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x84ULL, nullptr, nullptr, OperandInfo48, -1 ,nullptr }, { 378, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x104ULL, nullptr, nullptr, OperandInfo49, -1 ,nullptr }, { 379, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo26, -1 ,nullptr }, { 380, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, { 381, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x84ULL, nullptr, nullptr, OperandInfo50, -1 ,nullptr }, { 382, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x104ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, { 383, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x84ULL, ImplicitList1, nullptr, OperandInfo37, -1 ,nullptr }, { 384, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x104ULL, ImplicitList1, nullptr, OperandInfo38, -1 ,nullptr }, { 385, 2, 0, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr }, { 386, 1, 0, 2, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo47, -1 ,nullptr }, { 387, 3, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, { 388, 3, 0, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, { 389, 3, 0, 4, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40000ULL, ImplicitList1, nullptr, OperandInfo12, -1 ,nullptr }, { 390, 3, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x40000ULL, ImplicitList1, nullptr, OperandInfo12, -1 ,nullptr }, { 391, 3, 1, 4, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo20, -1 ,nullptr }, { 392, 3, 1, 4, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 393, 4, 0, 4, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3888ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr }, { 394, 4, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3d08ULL, nullptr, ImplicitList1, OperandInfo60, -1 ,nullptr }, { 395, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x3c00ULL, nullptr, ImplicitList1, OperandInfo61, -1 ,nullptr }, { 396, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, { 397, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr }, { 398, 4, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo64, -1 ,nullptr }, { 399, 4, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr }, { 400, 4, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3c88ULL, nullptr, ImplicitList1, OperandInfo66, -1 ,nullptr }, { 401, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x3c00ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr }, { 402, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo68, -1 ,nullptr }, { 403, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo69, -1 ,nullptr }, { 404, 4, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, { 405, 4, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, { 406, 3, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo72, -1 ,nullptr }, { 407, 3, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo73, -1 ,nullptr }, { 408, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr }, { 409, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x3800ULL, nullptr, ImplicitList1, OperandInfo75, -1 ,nullptr }, { 410, 3, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo76, -1 ,nullptr }, { 411, 4, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x390cULL, nullptr, ImplicitList1, OperandInfo16, -1 ,nullptr }, { 412, 3, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo77, -1 ,nullptr }, { 413, 3, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo78, -1 ,nullptr }, { 414, 4, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL, nullptr, ImplicitList1, OperandInfo16, -1 ,nullptr }, { 415, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo79, -1 ,nullptr }, { 416, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo80, -1 ,nullptr }, { 417, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo79, -1 ,nullptr }, { 418, 4, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x384cULL, nullptr, ImplicitList1, OperandInfo16, -1 ,nullptr }, { 419, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo79, -1 ,nullptr }, { 420, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo79, -1 ,nullptr }, { 421, 3, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 422, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr }, { 423, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo81, -1 ,nullptr }, { 424, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr }, { 425, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo79, -1 ,nullptr }, { 426, 3, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo82, -1 ,nullptr }, { 427, 4, 0, 4, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3848ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr }, { 428, 4, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL, nullptr, ImplicitList1, OperandInfo83, -1 ,nullptr }, { 429, 3, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 430, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr }, { 431, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr }, { 432, 3, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 433, 4, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x384cULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr }, { 434, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo84, -1 ,nullptr }, { 435, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr }, { 436, 4, 0, 4, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103888ULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr }, { 437, 5, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo85, -1 ,nullptr }, { 438, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr }, { 439, 5, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr }, { 440, 4, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo88, -1 ,nullptr }, { 441, 4, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo89, -1 ,nullptr }, { 442, 3, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 443, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr }, { 444, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x103800ULL, nullptr, ImplicitList1, OperandInfo75, -1 ,nullptr }, { 445, 4, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo90, -1 ,nullptr }, { 446, 4, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10390cULL, nullptr, ImplicitList1, OperandInfo16, -1 ,nullptr }, { 447, 4, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo91, -1 ,nullptr }, { 448, 4, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo92, -1 ,nullptr }, { 449, 4, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL, nullptr, ImplicitList1, OperandInfo16, -1 ,nullptr }, { 450, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo79, -1 ,nullptr }, { 451, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo80, -1 ,nullptr }, { 452, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo79, -1 ,nullptr }, { 453, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo79, -1 ,nullptr }, { 454, 3, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 455, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo43, -1 ,nullptr }, { 456, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo81, -1 ,nullptr }, { 457, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo44, -1 ,nullptr }, { 458, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo79, -1 ,nullptr }, { 459, 4, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo93, -1 ,nullptr }, { 460, 4, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL, nullptr, ImplicitList1, OperandInfo83, -1 ,nullptr }, { 461, 3, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 462, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr }, { 463, 3, 0, 4, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 464, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo84, -1 ,nullptr }, { 465, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo45, -1 ,nullptr }, { 466, 3, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103804ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 467, 4, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x10388cULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr }, { 468, 2, 0, 2, 0, 0|(1ULL<<MCID::Compare), 0x103800ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr }, { 469, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr }, { 470, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr }, { 471, 4, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo96, -1 ,nullptr }, { 472, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo97, -1 ,nullptr }, { 473, 4, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr }, { 474, 4, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x388cULL, nullptr, ImplicitList1, OperandInfo94, -1 ,nullptr }, { 475, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo98, -1 ,nullptr }, { 476, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, { 477, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo100, -1 ,nullptr }, { 478, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, { 479, 2, 0, 2, 0, 0|(1ULL<<MCID::Compare), 0x3800ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr }, { 480, 4, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo46, -1 ,nullptr }, { 481, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr }, { 482, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo102, -1 ,nullptr }, { 483, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo103, -1 ,nullptr }, { 484, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo102, -1 ,nullptr }, { 485, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x3c00ULL, nullptr, ImplicitList1, OperandInfo104, -1 ,nullptr }, { 486, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo105, -1 ,nullptr }, { 487, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr }, { 488, 4, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr }, { 489, 4, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo108, -1 ,nullptr }, { 490, 4, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr }, { 491, 1, 0, 2, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, ImplicitList3, OperandInfo47, -1 ,nullptr }, { 492, 0, 0, 2, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList4, nullptr, nullptr, -1 ,nullptr }, { 493, 1, 0, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, ImplicitList3, OperandInfo5, -1 ,nullptr }, { 494, 1, 0, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 495, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo109, -1 ,nullptr }, { 496, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo109, -1 ,nullptr }, { 497, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo110, -1 ,nullptr }, { 498, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo110, -1 ,nullptr }, { 499, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo109, -1 ,nullptr }, { 500, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo109, -1 ,nullptr }, { 501, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo111, -1 ,nullptr }, { 502, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo111, -1 ,nullptr }, { 503, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo109, -1 ,nullptr }, { 504, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo109, -1 ,nullptr }, { 505, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo110, -1 ,nullptr }, { 506, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo110, -1 ,nullptr }, { 507, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo112, -1 ,nullptr }, { 508, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo112, -1 ,nullptr }, { 509, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo113, -1 ,nullptr }, { 510, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo113, -1 ,nullptr }, { 511, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr }, { 512, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr }, { 513, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, { 514, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, { 515, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, nullptr, OperandInfo114, -1 ,nullptr }, { 516, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL, nullptr, nullptr, OperandInfo114, -1 ,nullptr }, { 517, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, { 518, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo116, -1 ,nullptr }, { 519, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL, nullptr, nullptr, OperandInfo114, -1 ,nullptr }, { 520, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, nullptr, OperandInfo114, -1 ,nullptr }, { 521, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo116, -1 ,nullptr }, { 522, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, { 523, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, { 524, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, { 525, 1, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo117, -1 ,nullptr }, { 526, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo118, -1 ,nullptr }, { 527, 4, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr }, { 528, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr }, { 529, 4, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, { 530, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo122, -1 ,nullptr }, { 531, 4, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr }, { 532, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo19, -1 ,nullptr }, { 533, 1, 1, 6, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, { 534, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x28ULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr }, { 535, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x28ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr }, { 536, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr }, { 537, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr }, { 538, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo75, -1 ,nullptr }, { 539, 2, 1, 6, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr }, { 540, 3, 1, 6, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr }, { 541, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, { 542, 3, 1, 4, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr }, { 543, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, { 544, 3, 1, 4, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr }, { 545, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr }, { 546, 2, 1, 6, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, { 547, 3, 1, 6, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr }, { 548, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr }, { 549, 3, 1, 4, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr }, { 550, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr }, { 551, 3, 1, 4, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr }, { 552, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr }, { 553, 1, 1, 4, 0, 0, 0x0ULL, ImplicitList1, nullptr, OperandInfo117, -1 ,nullptr }, { 554, 1, 0, 4, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 555, 1, 0, 6, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, { 556, 4, 1, 4, 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x89ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 557, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1dULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr }, { 558, 4, 1, 4, 0, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x8ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, { 559, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr }, { 560, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, { 561, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr }, { 562, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, { 563, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr }, { 564, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, { 565, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr }, { 566, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, { 567, 2, 1, 6, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 568, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr }, { 569, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, { 570, 4, 1, 6, 0, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0xcULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, { 571, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 572, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, { 573, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2cULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, { 574, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo95, -1 ,nullptr }, { 575, 5, 1, 6, 0, 0, 0x8ULL, nullptr, ImplicitList1, OperandInfo128, -1 ,nullptr }, { 576, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo61, -1 ,nullptr }, { 577, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr }, { 578, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo67, -1 ,nullptr }, { 579, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr }, { 580, 2, 1, 4, 0, 0, 0x3b800ULL, nullptr, ImplicitList1, OperandInfo80, -1 ,nullptr }, { 581, 2, 1, 4, 0, 0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo81, -1 ,nullptr }, { 582, 2, 1, 2, 0, 0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr }, { 583, 2, 1, 4, 0, 0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo104, -1 ,nullptr }, { 584, 4, 1, 4, 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x109ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr }, { 585, 4, 1, 6, 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x89ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, { 586, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr }, { 587, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr }, { 588, 2, 1, 4, 0, 0|(1ULL<<MCID::Bitcast), 0x0ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr }, { 589, 2, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr }, { 590, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo104, -1 ,nullptr }, { 591, 4, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr }, { 592, 4, 1, 6, 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x10dULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr }, { 593, 4, 1, 4, 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x89ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, { 594, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr }, { 595, 4, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr }, { 596, 2, 1, 6, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr }, { 597, 2, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo67, -1 ,nullptr }, { 598, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo104, -1 ,nullptr }, { 599, 4, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr }, { 600, 4, 1, 6, 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, { 601, 2, 1, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo133, -1 ,nullptr }, { 602, 4, 1, 6, 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, { 603, 4, 1, 6, 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x10dULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, { 604, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, { 605, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo81, -1 ,nullptr }, { 606, 2, 1, 4, 0, 0|(1ULL<<MCID::Bitcast), 0x0ULL, nullptr, nullptr, OperandInfo134, -1 ,nullptr }, { 607, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, { 608, 2, 1, 6, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 609, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, { 610, 2, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 611, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, { 612, 2, 1, 4, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 613, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo81, -1 ,nullptr }, { 614, 2, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 615, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo81, -1 ,nullptr }, { 616, 2, 1, 6, 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 617, 4, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x48ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 618, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, { 619, 2, 1, 4, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, { 620, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo75, -1 ,nullptr }, { 621, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4cULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, { 622, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo95, -1 ,nullptr }, { 623, 2, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, { 624, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 625, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 626, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, { 627, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2cULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, { 628, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo95, -1 ,nullptr }, { 629, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr }, { 630, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x2cULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, { 631, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo81, -1 ,nullptr }, { 632, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, { 633, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, { 634, 2, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 635, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, { 636, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo81, -1 ,nullptr }, { 637, 2, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 638, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 639, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, { 640, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4cULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, { 641, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo95, -1 ,nullptr }, { 642, 2, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, { 643, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr }, { 644, 2, 1, 6, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 645, 2, 1, 4, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 646, 2, 1, 4, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 647, 2, 1, 6, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 648, 2, 1, 4, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 649, 2, 1, 4, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 650, 4, 2, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL, nullptr, nullptr, OperandInfo127, -1 ,nullptr }, { 651, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, { 652, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo61, -1 ,nullptr }, { 653, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr }, { 654, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo67, -1 ,nullptr }, { 655, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr }, { 656, 2, 1, 4, 0, 0, 0x3b800ULL, nullptr, ImplicitList1, OperandInfo80, -1 ,nullptr }, { 657, 2, 1, 4, 0, 0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo81, -1 ,nullptr }, { 658, 2, 1, 2, 0, 0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr }, { 659, 2, 1, 4, 0, 0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo104, -1 ,nullptr }, { 660, 6, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x80084ULL, ImplicitList1, nullptr, OperandInfo136, -1 ,nullptr }, { 661, 6, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x80104ULL, ImplicitList1, nullptr, OperandInfo137, -1 ,nullptr }, { 662, 4, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80000ULL, ImplicitList1, nullptr, OperandInfo44, -1 ,nullptr }, { 663, 4, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80000ULL, ImplicitList1, nullptr, OperandInfo46, -1 ,nullptr }, { 664, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo61, -1 ,nullptr }, { 665, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr }, { 666, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo67, -1 ,nullptr }, { 667, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr }, { 668, 2, 1, 4, 0, 0, 0x3b800ULL, nullptr, ImplicitList1, OperandInfo80, -1 ,nullptr }, { 669, 2, 1, 4, 0, 0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo81, -1 ,nullptr }, { 670, 2, 1, 2, 0, 0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr }, { 671, 2, 1, 4, 0, 0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo104, -1 ,nullptr }, { 672, 2, 1, 2, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo95, -1 ,nullptr }, { 673, 2, 1, 6, 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, { 674, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr }, { 675, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 676, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, { 677, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo81, -1 ,nullptr }, { 678, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo95, -1 ,nullptr }, { 679, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x3b88cULL, nullptr, ImplicitList1, OperandInfo59, -1 ,nullptr }, { 680, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo61, -1 ,nullptr }, { 681, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo61, -1 ,nullptr }, { 682, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo61, -1 ,nullptr }, { 683, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr }, { 684, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr }, { 685, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo67, -1 ,nullptr }, { 686, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x3b90cULL, nullptr, ImplicitList1, OperandInfo16, -1 ,nullptr }, { 687, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x3b88cULL, nullptr, ImplicitList1, OperandInfo16, -1 ,nullptr }, { 688, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3b800ULL, nullptr, ImplicitList1, OperandInfo80, -1 ,nullptr }, { 689, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3b800ULL, nullptr, ImplicitList1, OperandInfo81, -1 ,nullptr }, { 690, 2, 1, 2, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3b800ULL, nullptr, ImplicitList1, OperandInfo95, -1 ,nullptr }, { 691, 2, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo104, -1 ,nullptr }, { 692, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo104, -1 ,nullptr }, { 693, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo104, -1 ,nullptr }, { 694, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1dULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr }, { 695, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr }, { 696, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo139, -1 ,nullptr }, { 697, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr }, { 698, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr }, { 699, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo104, -1 ,nullptr }, { 700, 4, 1, 6, 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 701, 1, 1, 4, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo141, -1 ,nullptr }, { 702, 1, 1, 4, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, { 703, 1, 1, 4, 0, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo143, -1 ,nullptr }, { 704, 6, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr }, { 705, 4, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo145, -1 ,nullptr }, { 706, 6, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, nullptr, OperandInfo146, -1 ,nullptr }, { 707, 4, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo147, -1 ,nullptr }, { 708, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr }, { 709, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo15, -1 ,nullptr }, { 710, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x88ULL, nullptr, nullptr, OperandInfo14, -1 ,nullptr }, { 711, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo148, -1 ,nullptr }, { 712, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, { 713, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, { 714, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr }, { 715, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x48ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr }, { 716, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr }, { 717, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x4cULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr }, { 718, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL, nullptr, nullptr, OperandInfo114, -1 ,nullptr }, { 719, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, { 720, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr }, { 721, 6, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, nullptr, OperandInfo144, -1 ,nullptr }, { 722, 4, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo145, -1 ,nullptr }, { 723, 6, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, nullptr, OperandInfo146, -1 ,nullptr }, { 724, 4, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo147, -1 ,nullptr }, { 725, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr }, { 726, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr }, { 727, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, nullptr, OperandInfo22, -1 ,nullptr }, { 728, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr }, { 729, 3, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr }, { 730, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo26, -1 ,nullptr }, { 731, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, { 732, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, nullptr, OperandInfo13, -1 ,nullptr }, { 733, 5, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, { 734, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, { 735, 5, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo87, -1 ,nullptr }, { 736, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, { 737, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, { 738, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, { 739, 3, 0, 4, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, { 740, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, { 741, 4, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo96, -1 ,nullptr }, { 742, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo97, -1 ,nullptr }, { 743, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, { 744, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x108ULL, nullptr, nullptr, OperandInfo149, -1 ,nullptr }, { 745, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, { 746, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x23088ULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 747, 5, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo85, -1 ,nullptr }, { 748, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr }, { 749, 5, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr }, { 750, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x2310cULL, nullptr, ImplicitList1, OperandInfo22, -1 ,nullptr }, { 751, 3, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo26, -1 ,nullptr }, { 752, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x23000ULL, nullptr, ImplicitList1, OperandInfo27, -1 ,nullptr }, { 753, 3, 0, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 754, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL, nullptr, ImplicitList1, OperandInfo21, -1 ,nullptr }, { 755, 3, 1, 6, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr }, { 756, 3, 1, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 757, 3, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr }, { 758, 3, 1, 4, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 759, 3, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr }, { 760, 3, 1, 4, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 761, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo21, -1 ,nullptr }, { 762, 3, 1, 6, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL, nullptr, ImplicitList1, OperandInfo20, -1 ,nullptr }, { 763, 3, 1, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 764, 3, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo20, -1 ,nullptr }, { 765, 3, 1, 4, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 766, 3, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo20, -1 ,nullptr }, { 767, 3, 1, 4, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 768, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo21, -1 ,nullptr }, { 769, 3, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 770, 3, 1, 2, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo32, -1 ,nullptr }, { 771, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x23000ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr }, { 772, 4, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, { 773, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x2308cULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 774, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x23088ULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 775, 5, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo85, -1 ,nullptr }, { 776, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr }, { 777, 5, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr }, { 778, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x2310cULL, nullptr, ImplicitList1, OperandInfo22, -1 ,nullptr }, { 779, 3, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo26, -1 ,nullptr }, { 780, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x23000ULL, nullptr, ImplicitList1, OperandInfo27, -1 ,nullptr }, { 781, 3, 0, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 782, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x23000ULL, nullptr, ImplicitList1, OperandInfo21, -1 ,nullptr }, { 783, 3, 1, 6, 0, 0, 0x23000ULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr }, { 784, 3, 1, 6, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 785, 3, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr }, { 786, 3, 1, 4, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 787, 3, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr }, { 788, 3, 1, 4, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 789, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo21, -1 ,nullptr }, { 790, 3, 1, 6, 0, 0, 0x23000ULL, nullptr, ImplicitList1, OperandInfo20, -1 ,nullptr }, { 791, 3, 1, 6, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 792, 3, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo20, -1 ,nullptr }, { 793, 3, 1, 4, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 794, 3, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo20, -1 ,nullptr }, { 795, 3, 1, 4, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 796, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo21, -1 ,nullptr }, { 797, 3, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 798, 3, 1, 2, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo32, -1 ,nullptr }, { 799, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x23000ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr }, { 800, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x2308cULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 801, 4, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xcULL, nullptr, nullptr, OperandInfo151, -1 ,nullptr }, { 802, 2, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr }, { 803, 2, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo81, -1 ,nullptr }, { 804, 3, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr }, { 805, 6, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3b800ULL, nullptr, ImplicitList1, OperandInfo152, -1 ,nullptr }, { 806, 6, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo153, -1 ,nullptr }, { 807, 6, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, { 808, 6, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, { 809, 6, 1, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, { 810, 6, 1, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, { 811, 6, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, { 812, 6, 1, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo158, -1 ,nullptr }, { 813, 6, 1, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, { 814, 6, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo159, -1 ,nullptr }, { 815, 4, 1, 6, 0, 0, 0x4ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr }, { 816, 4, 1, 6, 0, 0, 0x4ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, { 817, 6, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo152, -1 ,nullptr }, { 818, 6, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo152, -1 ,nullptr }, { 819, 6, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo152, -1 ,nullptr }, { 820, 0, 0, 2, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, { 821, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x23c88ULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 822, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x3fd08ULL, nullptr, ImplicitList1, OperandInfo14, -1 ,nullptr }, { 823, 3, 1, 4, 0, 0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo15, -1 ,nullptr }, { 824, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x3fc88ULL, nullptr, ImplicitList1, OperandInfo17, -1 ,nullptr }, { 825, 3, 1, 4, 0, 0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo18, -1 ,nullptr }, { 826, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x23d0cULL, nullptr, ImplicitList1, OperandInfo22, -1 ,nullptr }, { 827, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x23c8cULL, nullptr, ImplicitList1, OperandInfo22, -1 ,nullptr }, { 828, 3, 1, 4, 0, 0, 0x23c00ULL, nullptr, ImplicitList1, OperandInfo24, -1 ,nullptr }, { 829, 3, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo26, -1 ,nullptr }, { 830, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo27, -1 ,nullptr }, { 831, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x23c48ULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 832, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x23c4cULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 833, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 834, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL, ImplicitList1, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 835, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL, ImplicitList1, ImplicitList1, OperandInfo22, -1 ,nullptr }, { 836, 3, 1, 4, 0, 0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo26, -1 ,nullptr }, { 837, 3, 1, 4, 0, 0, 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo32, -1 ,nullptr }, { 838, 3, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo20, -1 ,nullptr }, { 839, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x10cULL, nullptr, ImplicitList1, OperandInfo22, -1 ,nullptr }, { 840, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, ImplicitList1, OperandInfo22, -1 ,nullptr }, { 841, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 842, 3, 1, 4, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo24, -1 ,nullptr }, { 843, 3, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo26, -1 ,nullptr }, { 844, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo27, -1 ,nullptr }, { 845, 4, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, { 846, 4, 1, 6, 0, 0, 0x4ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, { 847, 4, 1, 6, 0, 0, 0x4ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr }, { 848, 3, 1, 2, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList1, OperandInfo32, -1 ,nullptr }, { 849, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr }, { 850, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x8cULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 851, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x108ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr }, { 852, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr }, { 853, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x88ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, { 854, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo67, -1 ,nullptr }, { 855, 2, 1, 4, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo104, -1 ,nullptr }, { 856, 3, 1, 2, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo32, -1 ,nullptr }, { 857, 4, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x3b800ULL, nullptr, ImplicitList1, OperandInfo162, -1 ,nullptr }, { 858, 4, 1, 6, 0, 0, 0x3b804ULL, nullptr, ImplicitList1, OperandInfo161, -1 ,nullptr }, { 859, 4, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3b804ULL, nullptr, ImplicitList1, OperandInfo160, -1 ,nullptr }, { 860, 3, 1, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x23c00ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr }, { 861, 4, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, { 862, 4, 1, 6, 0, 0, 0x4ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, { 863, 4, 1, 6, 0, 0, 0x4ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr }, { 864, 4, 2, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList2, ImplicitList1, OperandInfo96, -1 ,nullptr }, { 865, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo97, -1 ,nullptr }, { 866, 4, 0, 4, 0, 0|(1ULL<<MCID::MayStore), 0x8aULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 867, 4, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1eULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr }, { 868, 4, 0, 4, 0, 0|(1ULL<<MCID::MayStore), 0x28ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 869, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x2cULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, { 870, 2, 0, 4, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo163, -1 ,nullptr }, { 871, 2, 0, 4, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo163, -1 ,nullptr }, { 872, 2, 0, 4, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo163, -1 ,nullptr }, { 873, 4, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2cULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, { 874, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x2cULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 875, 4, 0, 4, 0, 0|(1ULL<<MCID::MayStore), 0x10aULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr }, { 876, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x10eULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr }, { 877, 4, 0, 4, 0, 0|(1ULL<<MCID::MayStore), 0x8aULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, { 878, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x8eULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, { 879, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x8eULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, { 880, 2, 0, 4, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo163, -1 ,nullptr }, { 881, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x10eULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, { 882, 2, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, { 883, 4, 0, 4, 0, 0|(1ULL<<MCID::MayStore), 0x48ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 884, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x4cULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, { 885, 4, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2cULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, { 886, 2, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, { 887, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x4cULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 888, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL, nullptr, nullptr, OperandInfo127, -1 ,nullptr }, { 889, 4, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x8eULL, nullptr, nullptr, OperandInfo94, -1 ,nullptr }, { 890, 5, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80084ULL, ImplicitList1, nullptr, OperandInfo164, -1 ,nullptr }, { 891, 5, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80104ULL, ImplicitList1, nullptr, OperandInfo165, -1 ,nullptr }, { 892, 2, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, { 893, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x8cULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 894, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x10cULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, { 895, 4, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1eULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr }, { 896, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x8eULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, { 897, 3, 1, 4, 0, 0, 0x3fc00ULL, nullptr, ImplicitList1, OperandInfo41, -1 ,nullptr }, { 898, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x23c8cULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 899, 5, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo166, -1 ,nullptr }, { 900, 5, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo167, -1 ,nullptr }, { 901, 5, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo168, -1 ,nullptr }, { 902, 5, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo169, -1 ,nullptr }, { 903, 5, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo170, -1 ,nullptr }, { 904, 5, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo171, -1 ,nullptr }, { 905, 0, 0, 2, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, { 906, 2, 0, 4, 0, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr }, { 907, 3, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 908, 3, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 909, 3, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 910, 0, 0, 4, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, nullptr, -1 ,nullptr }, { 911, 1, 0, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, ImplicitList3, OperandInfo5, -1 ,nullptr }, { 912, 1, 0, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, ImplicitList3, OperandInfo5, -1 ,nullptr }, { 913, 3, 0, 4, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 914, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo84, -1 ,nullptr }, { 915, 2, 0, 4, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo79, -1 ,nullptr }, { 916, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo84, -1 ,nullptr }, { 917, 2, 0, 4, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo79, -1 ,nullptr }, { 918, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo75, -1 ,nullptr }, { 919, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr }, { 920, 2, 0, 4, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo79, -1 ,nullptr }, { 921, 2, 0, 4, 0, 0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo74, -1 ,nullptr }, { 922, 2, 0, 4, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo79, -1 ,nullptr }, { 923, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo75, -1 ,nullptr }, { 924, 3, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 925, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 926, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 927, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 928, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 929, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 930, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 931, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 932, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 933, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 934, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 935, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 936, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 937, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 938, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 939, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 940, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 941, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 942, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 943, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 944, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 945, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, { 946, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, { 947, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 948, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 949, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 950, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 951, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 952, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 953, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 954, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 955, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, { 956, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 957, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 958, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 959, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 960, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 961, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 962, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 963, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 964, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 965, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 966, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 967, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 968, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 969, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 970, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 971, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 972, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 973, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, { 974, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 975, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 976, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 977, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 978, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 979, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 980, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 981, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 982, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo175, -1 ,nullptr }, { 983, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo175, -1 ,nullptr }, { 984, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo175, -1 ,nullptr }, { 985, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo175, -1 ,nullptr }, { 986, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo175, -1 ,nullptr }, { 987, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo175, -1 ,nullptr }, { 988, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo175, -1 ,nullptr }, { 989, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo175, -1 ,nullptr }, { 990, 5, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo176, -1 ,nullptr }, { 991, 5, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo176, -1 ,nullptr }, { 992, 5, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo176, -1 ,nullptr }, { 993, 5, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo176, -1 ,nullptr }, { 994, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 995, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 996, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 997, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 998, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 999, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1000, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1001, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1002, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 1003, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 1004, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 1005, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 1006, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1007, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1008, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1009, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1010, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 1011, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 1012, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 1013, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 1014, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1015, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1016, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1017, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1018, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 1019, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 1020, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 1021, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, { 1022, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1023, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1024, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1025, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1026, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1027, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo178, -1 ,nullptr }, { 1028, 4, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo178, -1 ,nullptr }, { 1029, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo178, -1 ,nullptr }, { 1030, 4, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo178, -1 ,nullptr }, { 1031, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo178, -1 ,nullptr }, { 1032, 4, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo178, -1 ,nullptr }, { 1033, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo178, -1 ,nullptr }, { 1034, 4, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo178, -1 ,nullptr }, { 1035, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo178, -1 ,nullptr }, { 1036, 4, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo178, -1 ,nullptr }, { 1037, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo178, -1 ,nullptr }, { 1038, 4, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo178, -1 ,nullptr }, { 1039, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1040, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1041, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1042, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1043, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1044, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1045, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1046, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1047, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1048, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1049, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1050, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1051, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1052, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1053, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1054, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1055, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1056, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1057, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1058, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1059, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1060, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1061, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1062, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1063, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1064, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1065, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1066, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1067, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1068, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1069, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1070, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, { 1071, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1072, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1073, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1074, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1075, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1076, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1077, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1078, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1079, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo179, -1 ,nullptr }, { 1080, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo180, -1 ,nullptr }, { 1081, 6, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo181, -1 ,nullptr }, { 1082, 6, 1, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo181, -1 ,nullptr }, { 1083, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1084, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1085, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1086, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1087, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1088, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1089, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1090, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1091, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo182, -1 ,nullptr }, { 1092, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo182, -1 ,nullptr }, { 1093, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo182, -1 ,nullptr }, { 1094, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo182, -1 ,nullptr }, { 1095, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1096, 2, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo175, -1 ,nullptr }, { 1097, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1098, 2, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo175, -1 ,nullptr }, { 1099, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1100, 2, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo175, -1 ,nullptr }, { 1101, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x200ULL, nullptr, nullptr, OperandInfo183, -1 ,nullptr }, { 1102, 4, 1, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo184, -1 ,nullptr }, { 1103, 4, 1, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo185, -1 ,nullptr }, { 1104, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo186, -1 ,nullptr }, { 1105, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1106, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1107, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1108, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1109, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1110, 6, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x20ULL, nullptr, nullptr, OperandInfo187, -1 ,nullptr }, { 1111, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, { 1112, 6, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, nullptr, OperandInfo187, -1 ,nullptr }, { 1113, 6, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x100ULL, nullptr, nullptr, OperandInfo187, -1 ,nullptr }, { 1114, 6, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, nullptr, OperandInfo187, -1 ,nullptr }, { 1115, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo188, -1 ,nullptr }, { 1116, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo188, -1 ,nullptr }, { 1117, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo188, -1 ,nullptr }, { 1118, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo188, -1 ,nullptr }, { 1119, 4, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo189, -1 ,nullptr }, { 1120, 4, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo189, -1 ,nullptr }, { 1121, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo189, -1 ,nullptr }, { 1122, 4, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo189, -1 ,nullptr }, { 1123, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo190, -1 ,nullptr }, { 1124, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x20ULL, nullptr, nullptr, OperandInfo183, -1 ,nullptr }, { 1125, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, nullptr, OperandInfo183, -1 ,nullptr }, { 1126, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x100ULL, nullptr, nullptr, OperandInfo183, -1 ,nullptr }, { 1127, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, nullptr, OperandInfo183, -1 ,nullptr }, { 1128, 4, 2, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo191, -1 ,nullptr }, { 1129, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1130, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1131, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1132, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1133, 2, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1134, 2, 1, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo192, -1 ,nullptr }, { 1135, 2, 1, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo193, -1 ,nullptr }, { 1136, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x20ULL, nullptr, nullptr, OperandInfo183, -1 ,nullptr }, { 1137, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x80ULL, nullptr, nullptr, OperandInfo183, -1 ,nullptr }, { 1138, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x100ULL, nullptr, nullptr, OperandInfo183, -1 ,nullptr }, { 1139, 4, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x40ULL, nullptr, nullptr, OperandInfo183, -1 ,nullptr }, { 1140, 5, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo194, -1 ,nullptr }, { 1141, 5, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo194, -1 ,nullptr }, { 1142, 5, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo195, -1 ,nullptr }, { 1143, 5, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo194, -1 ,nullptr }, { 1144, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo196, -1 ,nullptr }, { 1145, 3, 1, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo197, -1 ,nullptr }, { 1146, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1147, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1148, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1149, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1150, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1151, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1152, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1153, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1154, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1155, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1156, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1157, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1158, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1159, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1160, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1161, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1162, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1163, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1164, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1165, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1166, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1167, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1168, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1169, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1170, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1171, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1172, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1173, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1174, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1175, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1176, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1177, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1178, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1179, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1180, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1181, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1182, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1183, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1184, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1185, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1186, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1187, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1188, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1189, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1190, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1191, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1192, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1193, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1194, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1195, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1196, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1197, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1198, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1199, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1200, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1201, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1202, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1203, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1204, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1205, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1206, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1207, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1208, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1209, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1210, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1211, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1212, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1213, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1214, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1215, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1216, 1, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo198, -1 ,nullptr }, { 1217, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo178, -1 ,nullptr }, { 1218, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1219, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1220, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1221, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1222, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1223, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1224, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1225, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1226, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1227, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1228, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1229, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1230, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1231, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1232, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1233, 3, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo172, -1 ,nullptr }, { 1234, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo179, -1 ,nullptr }, { 1235, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo179, -1 ,nullptr }, { 1236, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo179, -1 ,nullptr }, { 1237, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo179, -1 ,nullptr }, { 1238, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo179, -1 ,nullptr }, { 1239, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo180, -1 ,nullptr }, { 1240, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo180, -1 ,nullptr }, { 1241, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo180, -1 ,nullptr }, { 1242, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo180, -1 ,nullptr }, { 1243, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1244, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1245, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1246, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1247, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1248, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1249, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1250, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1251, 5, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL, nullptr, nullptr, OperandInfo199, -1 ,nullptr }, { 1252, 5, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL, nullptr, nullptr, OperandInfo199, -1 ,nullptr }, { 1253, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1254, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1255, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1256, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, { 1257, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1258, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1259, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1260, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1261, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1262, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo178, -1 ,nullptr }, { 1263, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1264, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1265, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1266, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1267, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1268, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x200ULL, nullptr, nullptr, OperandInfo183, -1 ,nullptr }, { 1269, 4, 0, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo184, -1 ,nullptr }, { 1270, 4, 0, 6, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo185, -1 ,nullptr }, { 1271, 5, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x20ULL, nullptr, nullptr, OperandInfo186, -1 ,nullptr }, { 1272, 5, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x80ULL, nullptr, nullptr, OperandInfo186, -1 ,nullptr }, { 1273, 5, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x100ULL, nullptr, nullptr, OperandInfo186, -1 ,nullptr }, { 1274, 5, 0, 6, 0, 0|(1ULL<<MCID::MayStore), 0x40ULL, nullptr, nullptr, OperandInfo186, -1 ,nullptr }, { 1275, 4, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo190, -1 ,nullptr }, { 1276, 4, 0, 6, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo191, -1 ,nullptr }, { 1277, 5, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo200, -1 ,nullptr }, { 1278, 5, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo200, -1 ,nullptr }, { 1279, 5, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo200, -1 ,nullptr }, { 1280, 5, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo200, -1 ,nullptr }, { 1281, 5, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo200, -1 ,nullptr }, { 1282, 5, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo200, -1 ,nullptr }, { 1283, 5, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo200, -1 ,nullptr }, { 1284, 5, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo200, -1 ,nullptr }, { 1285, 5, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo200, -1 ,nullptr }, { 1286, 5, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo200, -1 ,nullptr }, { 1287, 5, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo200, -1 ,nullptr }, { 1288, 5, 1, 6, 0, 0, 0x0ULL, nullptr, ImplicitList1, OperandInfo200, -1 ,nullptr }, { 1289, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1290, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1291, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1292, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1293, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1294, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1295, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo175, -1 ,nullptr }, { 1296, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1297, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1298, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1299, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1300, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1301, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1302, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1303, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1304, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1305, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1306, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1307, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, { 1308, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, { 1309, 1, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo198, -1 ,nullptr }, { 1310, 4, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, { 1311, 4, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, { 1312, 4, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, { 1313, 4, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, { 1314, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr }, { 1315, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList1, OperandInfo193, -1 ,nullptr }, { 1316, 3, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr }, { 1317, 3, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo202, -1 ,nullptr }, { 1318, 3, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr }, { 1319, 3, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo202, -1 ,nullptr }, { 1320, 3, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr }, { 1321, 3, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo202, -1 ,nullptr }, { 1322, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr }, { 1323, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, { 1324, 2, 0, 6, 0, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo193, -1 ,nullptr }, { 1325, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo193, -1 ,nullptr }, { 1326, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo193, -1 ,nullptr }, { 1327, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo193, -1 ,nullptr }, { 1328, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo203, -1 ,nullptr }, { 1329, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr }, { 1330, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo203, -1 ,nullptr }, { 1331, 3, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr }, { 1332, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo193, -1 ,nullptr }, { 1333, 3, 1, 6, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo204, -1 ,nullptr }, { 1334, 2, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr }, { 1335, 4, 1, 6, 0, 0, 0x0ULL, nullptr, nullptr, OperandInfo206, -1 ,nullptr }, { 1336, 5, 1, 4, 0, 0|(1ULL<<MCID::MayLoad), 0x23088ULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 1337, 5, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, ImplicitList1, OperandInfo85, -1 ,nullptr }, { 1338, 6, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo86, -1 ,nullptr }, { 1339, 5, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList1, OperandInfo87, -1 ,nullptr }, { 1340, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x2310cULL, nullptr, ImplicitList1, OperandInfo22, -1 ,nullptr }, { 1341, 3, 1, 4, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo26, -1 ,nullptr }, { 1342, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x23000ULL, nullptr, ImplicitList1, OperandInfo27, -1 ,nullptr }, { 1343, 3, 0, 4, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 1344, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x23000ULL, nullptr, ImplicitList1, OperandInfo21, -1 ,nullptr }, { 1345, 3, 1, 6, 0, 0, 0x23000ULL, nullptr, ImplicitList1, OperandInfo31, -1 ,nullptr }, { 1346, 3, 1, 6, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 1347, 3, 1, 6, 0, 0, 0x23000ULL, nullptr, ImplicitList1, OperandInfo20, -1 ,nullptr }, { 1348, 3, 1, 6, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, ImplicitList1, OperandInfo23, -1 ,nullptr }, { 1349, 3, 0, 6, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList1, OperandInfo28, -1 ,nullptr }, { 1350, 3, 1, 2, 0, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x23000ULL, nullptr, ImplicitList1, OperandInfo32, -1 ,nullptr }, { 1351, 3, 1, 4, 0, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x23000ULL, nullptr, ImplicitList1, OperandInfo33, -1 ,nullptr }, { 1352, 5, 1, 6, 0, 0|(1ULL<<MCID::MayLoad), 0x2308cULL, nullptr, ImplicitList1, OperandInfo13, -1 ,nullptr }, { 1353, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo207, -1 ,nullptr }, { 1354, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr }, };
static inline void InitSystemZMCInstrInfo(MCInstrInfo *II) {
II->InitMCInstrInfo(SystemZInsts, NULL, NULL, 1355);
}
} #endif
#ifdef GET_INSTRINFO_HEADER
#undef GET_INSTRINFO_HEADER
namespace llvm_ks {
struct SystemZGenInstrInfo : public TargetInstrInfo {
explicit SystemZGenInstrInfo(int CFSetupOpcode = -1, int CFDestroyOpcode = -1, int CatchRetOpcode = -1);
~SystemZGenInstrInfo() override {}
};
} #endif
#ifdef GET_INSTRINFO_OPERAND_ENUM
#undef GET_INSTRINFO_OPERAND_ENUM
namespace llvm_ks {
namespace SystemZ {
namespace OpName {
enum {
OPERAND_LAST
};
} } } #endif #ifdef GET_INSTRINFO_NAMED_OPS
#undef GET_INSTRINFO_NAMED_OPS
namespace llvm_ks {
namespace SystemZ {
LLVM_READONLY
int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) {
return -1;
}
} } #endif
#ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM
#undef GET_INSTRINFO_OPERAND_TYPES_ENUM
namespace llvm_ks {
namespace SystemZ {
namespace OpTypes {
enum OperandType {
access_reg = 0,
bdaddr12only = 1,
bdaddr12pair = 2,
bdaddr20only = 3,
bdaddr20pair = 4,
bdladdr12onlylen8 = 5,
bdvaddr12only = 6,
bdxaddr12only = 7,
bdxaddr12pair = 8,
bdxaddr20only = 9,
bdxaddr20only128 = 10,
bdxaddr20pair = 11,
brtarget16 = 12,
brtarget16tls = 13,
brtarget32 = 14,
brtarget32tls = 15,
cond4 = 16,
disp12imm32 = 17,
disp12imm64 = 18,
disp20imm32 = 19,
disp20imm64 = 20,
dynalloc12only = 21,
f32imm = 22,
f64imm = 23,
i16imm = 24,
i1imm = 25,
i32imm = 26,
i64imm = 27,
i8imm = 28,
imm32lh16 = 29,
imm32lh16c = 30,
imm32ll16 = 31,
imm32ll16c = 32,
imm32sx16 = 33,
imm32sx16trunc = 34,
imm32sx8 = 35,
imm32zx1 = 36,
imm32zx12 = 37,
imm32zx16 = 38,
imm32zx2 = 39,
imm32zx3 = 40,
imm32zx4 = 41,
imm32zx4even = 42,
imm32zx6 = 43,
imm32zx8 = 44,
imm32zx8trunc = 45,
imm64 = 46,
imm64hf32 = 47,
imm64hf32c = 48,
imm64hh16 = 49,
imm64hh16c = 50,
imm64hl16 = 51,
imm64hl16c = 52,
imm64lf32 = 53,
imm64lf32c = 54,
imm64lh16 = 55,
imm64lh16c = 56,
imm64ll16 = 57,
imm64ll16c = 58,
imm64sx16 = 59,
imm64sx32 = 60,
imm64sx8 = 61,
imm64zx16 = 62,
imm64zx32 = 63,
imm64zx32n = 64,
imm64zx8 = 65,
laaddr12pair = 66,
laaddr20pair = 67,
mviaddr12pair = 68,
mviaddr20pair = 69,
pcrel32 = 70,
shift12only = 71,
shift20only = 72,
simm32 = 73,
tlssym = 74,
uimm32 = 75,
OPERAND_TYPE_LIST_END
};
} } } #endif #ifdef GET_INSTRMAP_INFO
#undef GET_INSTRMAP_INFO
namespace llvm_ks {
namespace SystemZ {
enum DispSize {
DispSize_12,
DispSize_20
};
enum NumOpsValue {
NumOpsValue_3
};
enum OpType {
OpType_mem
};
LLVM_READONLY
int getDisp12Opcode(uint16_t Opcode) {
static const uint16_t getDisp12OpcodeTable[][2] = {
{ SystemZ::AHY, SystemZ::AH },
{ SystemZ::ALY, SystemZ::AL },
{ SystemZ::AY, SystemZ::A },
{ SystemZ::CHY, SystemZ::CH },
{ SystemZ::CLIY, SystemZ::CLI },
{ SystemZ::CLY, SystemZ::CL },
{ SystemZ::CSY, SystemZ::CS },
{ SystemZ::CY, SystemZ::C },
{ SystemZ::IC32Y, SystemZ::IC32 },
{ SystemZ::ICY, SystemZ::IC },
{ SystemZ::LAY, SystemZ::LA },
{ SystemZ::LDY, SystemZ::LD },
{ SystemZ::LEY, SystemZ::LE },
{ SystemZ::LHY, SystemZ::LH },
{ SystemZ::LY, SystemZ::L },
{ SystemZ::MHY, SystemZ::MH },
{ SystemZ::MSY, SystemZ::MS },
{ SystemZ::MVIY, SystemZ::MVI },
{ SystemZ::NIY, SystemZ::NI },
{ SystemZ::NY, SystemZ::N },
{ SystemZ::OIY, SystemZ::OI },
{ SystemZ::OY, SystemZ::O },
{ SystemZ::SHY, SystemZ::SH },
{ SystemZ::SLY, SystemZ::SL },
{ SystemZ::STCY, SystemZ::STC },
{ SystemZ::STDY, SystemZ::STD },
{ SystemZ::STEY, SystemZ::STE },
{ SystemZ::STHY, SystemZ::STH },
{ SystemZ::STY, SystemZ::ST },
{ SystemZ::SY, SystemZ::S },
{ SystemZ::TMY, SystemZ::TM },
{ SystemZ::XIY, SystemZ::XI },
{ SystemZ::XY, SystemZ::X },
};
unsigned mid;
unsigned start = 0;
unsigned end = 33;
while (start < end) {
mid = start + (end - start)/2;
if (Opcode == getDisp12OpcodeTable[mid][0]) {
break;
}
if (Opcode < getDisp12OpcodeTable[mid][0])
end = mid;
else
start = mid + 1;
}
if (start == end)
return -1;
return getDisp12OpcodeTable[mid][1];
}
LLVM_READONLY
int getDisp20Opcode(uint16_t Opcode) {
static const uint16_t getDisp20OpcodeTable[][2] = {
{ SystemZ::A, SystemZ::AY },
{ SystemZ::AH, SystemZ::AHY },
{ SystemZ::AL, SystemZ::ALY },
{ SystemZ::C, SystemZ::CY },
{ SystemZ::CH, SystemZ::CHY },
{ SystemZ::CL, SystemZ::CLY },
{ SystemZ::CLI, SystemZ::CLIY },
{ SystemZ::CS, SystemZ::CSY },
{ SystemZ::IC, SystemZ::ICY },
{ SystemZ::IC32, SystemZ::IC32Y },
{ SystemZ::L, SystemZ::LY },
{ SystemZ::LA, SystemZ::LAY },
{ SystemZ::LD, SystemZ::LDY },
{ SystemZ::LE, SystemZ::LEY },
{ SystemZ::LH, SystemZ::LHY },
{ SystemZ::MH, SystemZ::MHY },
{ SystemZ::MS, SystemZ::MSY },
{ SystemZ::MVI, SystemZ::MVIY },
{ SystemZ::N, SystemZ::NY },
{ SystemZ::NI, SystemZ::NIY },
{ SystemZ::O, SystemZ::OY },
{ SystemZ::OI, SystemZ::OIY },
{ SystemZ::S, SystemZ::SY },
{ SystemZ::SH, SystemZ::SHY },
{ SystemZ::SL, SystemZ::SLY },
{ SystemZ::ST, SystemZ::STY },
{ SystemZ::STC, SystemZ::STCY },
{ SystemZ::STD, SystemZ::STDY },
{ SystemZ::STE, SystemZ::STEY },
{ SystemZ::STH, SystemZ::STHY },
{ SystemZ::TM, SystemZ::TMY },
{ SystemZ::X, SystemZ::XY },
{ SystemZ::XI, SystemZ::XIY },
};
unsigned mid;
unsigned start = 0;
unsigned end = 33;
while (start < end) {
mid = start + (end - start)/2;
if (Opcode == getDisp20OpcodeTable[mid][0]) {
break;
}
if (Opcode < getDisp20OpcodeTable[mid][0])
end = mid;
else
start = mid + 1;
}
if (start == end)
return -1;
return getDisp20OpcodeTable[mid][1];
}
LLVM_READONLY
int getMemOpcode(uint16_t Opcode) {
static const uint16_t getMemOpcodeTable[][2] = {
{ SystemZ::ADBR, SystemZ::ADB },
{ SystemZ::AEBR, SystemZ::AEB },
{ SystemZ::AGFR, SystemZ::AGF },
{ SystemZ::AGR, SystemZ::AG },
{ SystemZ::ALCGR, SystemZ::ALCG },
{ SystemZ::ALCR, SystemZ::ALC },
{ SystemZ::ALGFR, SystemZ::ALGF },
{ SystemZ::ALGR, SystemZ::ALG },
{ SystemZ::ALR, SystemZ::AL },
{ SystemZ::AR, SystemZ::A },
{ SystemZ::CDBR, SystemZ::CDB },
{ SystemZ::CEBR, SystemZ::CEB },
{ SystemZ::CGFR, SystemZ::CGF },
{ SystemZ::CGR, SystemZ::CG },
{ SystemZ::CLGFR, SystemZ::CLGF },
{ SystemZ::CLGR, SystemZ::CLG },
{ SystemZ::CLR, SystemZ::CL },
{ SystemZ::CR, SystemZ::C },
{ SystemZ::DDBR, SystemZ::DDB },
{ SystemZ::DEBR, SystemZ::DEB },
{ SystemZ::DLGR, SystemZ::DLG },
{ SystemZ::DLR, SystemZ::DL },
{ SystemZ::DSGFR, SystemZ::DSGF },
{ SystemZ::DSGR, SystemZ::DSG },
{ SystemZ::LBR, SystemZ::LB },
{ SystemZ::LDEBR, SystemZ::LDEB },
{ SystemZ::LDR, SystemZ::LD },
{ SystemZ::LER, SystemZ::LE },
{ SystemZ::LGBR, SystemZ::LGB },
{ SystemZ::LGFR, SystemZ::LGF },
{ SystemZ::LGHR, SystemZ::LGH },
{ SystemZ::LGR, SystemZ::LG },
{ SystemZ::LHR, SystemZ::LH },
{ SystemZ::LLCR, SystemZ::LLC },
{ SystemZ::LLCRMux, SystemZ::LLCMux },
{ SystemZ::LLGCR, SystemZ::LLGC },
{ SystemZ::LLGFR, SystemZ::LLGF },
{ SystemZ::LLGHR, SystemZ::LLGH },
{ SystemZ::LLHR, SystemZ::LLH },
{ SystemZ::LLHRMux, SystemZ::LLHMux },
{ SystemZ::LR, SystemZ::L },
{ SystemZ::LRMux, SystemZ::LMux },
{ SystemZ::LRVGR, SystemZ::LRVG },
{ SystemZ::LRVR, SystemZ::LRV },
{ SystemZ::LTGFR, SystemZ::LTGF },
{ SystemZ::LTGR, SystemZ::LTG },
{ SystemZ::LTR, SystemZ::LT },
{ SystemZ::LXDBR, SystemZ::LXDB },
{ SystemZ::LXEBR, SystemZ::LXEB },
{ SystemZ::MADBR, SystemZ::MADB },
{ SystemZ::MAEBR, SystemZ::MAEB },
{ SystemZ::MDBR, SystemZ::MDB },
{ SystemZ::MDEBR, SystemZ::MDEB },
{ SystemZ::MEEBR, SystemZ::MEEB },
{ SystemZ::MLGR, SystemZ::MLG },
{ SystemZ::MSDBR, SystemZ::MSDB },
{ SystemZ::MSEBR, SystemZ::MSEB },
{ SystemZ::MSGFR, SystemZ::MSGF },
{ SystemZ::MSGR, SystemZ::MSG },
{ SystemZ::MSR, SystemZ::MS },
{ SystemZ::MXDBR, SystemZ::MXDB },
{ SystemZ::NGR, SystemZ::NG },
{ SystemZ::NR, SystemZ::N },
{ SystemZ::OGR, SystemZ::OG },
{ SystemZ::OR, SystemZ::O },
{ SystemZ::SDBR, SystemZ::SDB },
{ SystemZ::SEBR, SystemZ::SEB },
{ SystemZ::SGFR, SystemZ::SGF },
{ SystemZ::SGR, SystemZ::SG },
{ SystemZ::SLBGR, SystemZ::SLBG },
{ SystemZ::SLBR, SystemZ::SLB },
{ SystemZ::SLGFR, SystemZ::SLGF },
{ SystemZ::SLGR, SystemZ::SLG },
{ SystemZ::SLR, SystemZ::SL },
{ SystemZ::SQDBR, SystemZ::SQDB },
{ SystemZ::SQEBR, SystemZ::SQEB },
{ SystemZ::SR, SystemZ::S },
{ SystemZ::XGR, SystemZ::XG },
{ SystemZ::XR, SystemZ::X },
};
unsigned mid;
unsigned start = 0;
unsigned end = 79;
while (start < end) {
mid = start + (end - start)/2;
if (Opcode == getMemOpcodeTable[mid][0]) {
break;
}
if (Opcode < getMemOpcodeTable[mid][0])
end = mid;
else
start = mid + 1;
}
if (start == end)
return -1;
return getMemOpcodeTable[mid][1];
}
LLVM_READONLY
int getThreeOperandOpcode(uint16_t Opcode) {
static const uint16_t getThreeOperandOpcodeTable[][2] = {
{ SystemZ::AGHI, SystemZ::AGHIK },
{ SystemZ::AGR, SystemZ::AGRK },
{ SystemZ::AHI, SystemZ::AHIK },
{ SystemZ::AHIMux, SystemZ::AHIMuxK },
{ SystemZ::ALGR, SystemZ::ALGRK },
{ SystemZ::ALR, SystemZ::ALRK },
{ SystemZ::AR, SystemZ::ARK },
{ SystemZ::NGR, SystemZ::NGRK },
{ SystemZ::NR, SystemZ::NRK },
{ SystemZ::OGR, SystemZ::OGRK },
{ SystemZ::OR, SystemZ::ORK },
{ SystemZ::SGR, SystemZ::SGRK },
{ SystemZ::SLGR, SystemZ::SLGRK },
{ SystemZ::SLL, SystemZ::SLLK },
{ SystemZ::SLR, SystemZ::SLRK },
{ SystemZ::SR, SystemZ::SRK },
{ SystemZ::SRA, SystemZ::SRAK },
{ SystemZ::SRL, SystemZ::SRLK },
{ SystemZ::XGR, SystemZ::XGRK },
{ SystemZ::XR, SystemZ::XRK },
};
unsigned mid;
unsigned start = 0;
unsigned end = 20;
while (start < end) {
mid = start + (end - start)/2;
if (Opcode == getThreeOperandOpcodeTable[mid][0]) {
break;
}
if (Opcode < getThreeOperandOpcodeTable[mid][0])
end = mid;
else
start = mid + 1;
}
if (start == end)
return -1;
return getThreeOperandOpcodeTable[mid][1];
}
} } #endif