k66/usbhs/
usbcmd.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::USBCMD {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct RSR {
47    bits: bool,
48}
49impl RSR {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bit(&self) -> bool {
53        self.bits
54    }
55    #[doc = r" Returns `true` if the bit is clear (0)"]
56    #[inline]
57    pub fn bit_is_clear(&self) -> bool {
58        !self.bit()
59    }
60    #[doc = r" Returns `true` if the bit is set (1)"]
61    #[inline]
62    pub fn bit_is_set(&self) -> bool {
63        self.bit()
64    }
65}
66#[doc = r" Value of the field"]
67pub struct RSTR {
68    bits: bool,
69}
70impl RSTR {
71    #[doc = r" Value of the field as raw bits"]
72    #[inline]
73    pub fn bit(&self) -> bool {
74        self.bits
75    }
76    #[doc = r" Returns `true` if the bit is clear (0)"]
77    #[inline]
78    pub fn bit_is_clear(&self) -> bool {
79        !self.bit()
80    }
81    #[doc = r" Returns `true` if the bit is set (1)"]
82    #[inline]
83    pub fn bit_is_set(&self) -> bool {
84        self.bit()
85    }
86}
87#[doc = "Possible values of the field `FS`"]
88#[derive(Clone, Copy, Debug, PartialEq)]
89pub enum FSR {
90    #[doc = "When FS2 = 0, the size is 1024 elements (4096 bytes). When FS2 = 1, the size is 64 elements (256 bytes)."]
91    _00,
92    #[doc = "When FS2 = 0, the size is 512 elements (2048 bytes). When FS2 = 1, the size is 32 elements (128 bytes)."]
93    _01,
94    #[doc = "When FS2 = 0, the size is 256 elements (1024 bytes). When FS2 = 1, the size is 16 elements (64 bytes)."]
95    _10,
96    #[doc = "When FS2 = 0, the size is 128 elements (512 bytes). When FS2 = 1, the size is 8 elements (32 bytes)."]
97    _11,
98}
99impl FSR {
100    #[doc = r" Value of the field as raw bits"]
101    #[inline]
102    pub fn bits(&self) -> u8 {
103        match *self {
104            FSR::_00 => 0,
105            FSR::_01 => 1,
106            FSR::_10 => 2,
107            FSR::_11 => 3,
108        }
109    }
110    #[allow(missing_docs)]
111    #[doc(hidden)]
112    #[inline]
113    pub fn _from(value: u8) -> FSR {
114        match value {
115            0 => FSR::_00,
116            1 => FSR::_01,
117            2 => FSR::_10,
118            3 => FSR::_11,
119            _ => unreachable!(),
120        }
121    }
122    #[doc = "Checks if the value of the field is `_00`"]
123    #[inline]
124    pub fn is_00(&self) -> bool {
125        *self == FSR::_00
126    }
127    #[doc = "Checks if the value of the field is `_01`"]
128    #[inline]
129    pub fn is_01(&self) -> bool {
130        *self == FSR::_01
131    }
132    #[doc = "Checks if the value of the field is `_10`"]
133    #[inline]
134    pub fn is_10(&self) -> bool {
135        *self == FSR::_10
136    }
137    #[doc = "Checks if the value of the field is `_11`"]
138    #[inline]
139    pub fn is_11(&self) -> bool {
140        *self == FSR::_11
141    }
142}
143#[doc = "Possible values of the field `PSE`"]
144#[derive(Clone, Copy, Debug, PartialEq)]
145pub enum PSER {
146    #[doc = "Do not process periodic schedule."]
147    _0,
148    #[doc = "Use the PERIODICLISTBASE register to access the periodic schedule."]
149    _1,
150}
151impl PSER {
152    #[doc = r" Returns `true` if the bit is clear (0)"]
153    #[inline]
154    pub fn bit_is_clear(&self) -> bool {
155        !self.bit()
156    }
157    #[doc = r" Returns `true` if the bit is set (1)"]
158    #[inline]
159    pub fn bit_is_set(&self) -> bool {
160        self.bit()
161    }
162    #[doc = r" Value of the field as raw bits"]
163    #[inline]
164    pub fn bit(&self) -> bool {
165        match *self {
166            PSER::_0 => false,
167            PSER::_1 => true,
168        }
169    }
170    #[allow(missing_docs)]
171    #[doc(hidden)]
172    #[inline]
173    pub fn _from(value: bool) -> PSER {
174        match value {
175            false => PSER::_0,
176            true => PSER::_1,
177        }
178    }
179    #[doc = "Checks if the value of the field is `_0`"]
180    #[inline]
181    pub fn is_0(&self) -> bool {
182        *self == PSER::_0
183    }
184    #[doc = "Checks if the value of the field is `_1`"]
185    #[inline]
186    pub fn is_1(&self) -> bool {
187        *self == PSER::_1
188    }
189}
190#[doc = "Possible values of the field `ASE`"]
191#[derive(Clone, Copy, Debug, PartialEq)]
192pub enum ASER {
193    #[doc = "Do not process asynchronous schedule."]
194    _0,
195    #[doc = "Use the ASYNCLISTADDR register to access asynchronous schedule."]
196    _1,
197}
198impl ASER {
199    #[doc = r" Returns `true` if the bit is clear (0)"]
200    #[inline]
201    pub fn bit_is_clear(&self) -> bool {
202        !self.bit()
203    }
204    #[doc = r" Returns `true` if the bit is set (1)"]
205    #[inline]
206    pub fn bit_is_set(&self) -> bool {
207        self.bit()
208    }
209    #[doc = r" Value of the field as raw bits"]
210    #[inline]
211    pub fn bit(&self) -> bool {
212        match *self {
213            ASER::_0 => false,
214            ASER::_1 => true,
215        }
216    }
217    #[allow(missing_docs)]
218    #[doc(hidden)]
219    #[inline]
220    pub fn _from(value: bool) -> ASER {
221        match value {
222            false => ASER::_0,
223            true => ASER::_1,
224        }
225    }
226    #[doc = "Checks if the value of the field is `_0`"]
227    #[inline]
228    pub fn is_0(&self) -> bool {
229        *self == ASER::_0
230    }
231    #[doc = "Checks if the value of the field is `_1`"]
232    #[inline]
233    pub fn is_1(&self) -> bool {
234        *self == ASER::_1
235    }
236}
237#[doc = r" Value of the field"]
238pub struct IAAR {
239    bits: bool,
240}
241impl IAAR {
242    #[doc = r" Value of the field as raw bits"]
243    #[inline]
244    pub fn bit(&self) -> bool {
245        self.bits
246    }
247    #[doc = r" Returns `true` if the bit is clear (0)"]
248    #[inline]
249    pub fn bit_is_clear(&self) -> bool {
250        !self.bit()
251    }
252    #[doc = r" Returns `true` if the bit is set (1)"]
253    #[inline]
254    pub fn bit_is_set(&self) -> bool {
255        self.bit()
256    }
257}
258#[doc = r" Value of the field"]
259pub struct ASPR {
260    bits: u8,
261}
262impl ASPR {
263    #[doc = r" Value of the field as raw bits"]
264    #[inline]
265    pub fn bits(&self) -> u8 {
266        self.bits
267    }
268}
269#[doc = "Possible values of the field `ASPE`"]
270#[derive(Clone, Copy, Debug, PartialEq)]
271pub enum ASPER {
272    #[doc = "Park mode disabled"]
273    _0,
274    #[doc = "Park mode enabled"]
275    _1,
276}
277impl ASPER {
278    #[doc = r" Returns `true` if the bit is clear (0)"]
279    #[inline]
280    pub fn bit_is_clear(&self) -> bool {
281        !self.bit()
282    }
283    #[doc = r" Returns `true` if the bit is set (1)"]
284    #[inline]
285    pub fn bit_is_set(&self) -> bool {
286        self.bit()
287    }
288    #[doc = r" Value of the field as raw bits"]
289    #[inline]
290    pub fn bit(&self) -> bool {
291        match *self {
292            ASPER::_0 => false,
293            ASPER::_1 => true,
294        }
295    }
296    #[allow(missing_docs)]
297    #[doc(hidden)]
298    #[inline]
299    pub fn _from(value: bool) -> ASPER {
300        match value {
301            false => ASPER::_0,
302            true => ASPER::_1,
303        }
304    }
305    #[doc = "Checks if the value of the field is `_0`"]
306    #[inline]
307    pub fn is_0(&self) -> bool {
308        *self == ASPER::_0
309    }
310    #[doc = "Checks if the value of the field is `_1`"]
311    #[inline]
312    pub fn is_1(&self) -> bool {
313        *self == ASPER::_1
314    }
315}
316#[doc = r" Value of the field"]
317pub struct SUTWR {
318    bits: bool,
319}
320impl SUTWR {
321    #[doc = r" Value of the field as raw bits"]
322    #[inline]
323    pub fn bit(&self) -> bool {
324        self.bits
325    }
326    #[doc = r" Returns `true` if the bit is clear (0)"]
327    #[inline]
328    pub fn bit_is_clear(&self) -> bool {
329        !self.bit()
330    }
331    #[doc = r" Returns `true` if the bit is set (1)"]
332    #[inline]
333    pub fn bit_is_set(&self) -> bool {
334        self.bit()
335    }
336}
337#[doc = r" Value of the field"]
338pub struct ATDTWR {
339    bits: bool,
340}
341impl ATDTWR {
342    #[doc = r" Value of the field as raw bits"]
343    #[inline]
344    pub fn bit(&self) -> bool {
345        self.bits
346    }
347    #[doc = r" Returns `true` if the bit is clear (0)"]
348    #[inline]
349    pub fn bit_is_clear(&self) -> bool {
350        !self.bit()
351    }
352    #[doc = r" Returns `true` if the bit is set (1)"]
353    #[inline]
354    pub fn bit_is_set(&self) -> bool {
355        self.bit()
356    }
357}
358#[doc = r" Value of the field"]
359pub struct FS2R {
360    bits: bool,
361}
362impl FS2R {
363    #[doc = r" Value of the field as raw bits"]
364    #[inline]
365    pub fn bit(&self) -> bool {
366        self.bits
367    }
368    #[doc = r" Returns `true` if the bit is clear (0)"]
369    #[inline]
370    pub fn bit_is_clear(&self) -> bool {
371        !self.bit()
372    }
373    #[doc = r" Returns `true` if the bit is set (1)"]
374    #[inline]
375    pub fn bit_is_set(&self) -> bool {
376        self.bit()
377    }
378}
379#[doc = "Possible values of the field `ITC`"]
380#[derive(Clone, Copy, Debug, PartialEq)]
381pub enum ITCR {
382    #[doc = "Immediate (no threshold)"]
383    _0,
384    #[doc = "1 microframe"]
385    _1,
386    #[doc = "2 microframes"]
387    _10,
388    #[doc = "4 microframes"]
389    _100,
390    #[doc = "8 microframes"]
391    _1000,
392    #[doc = "16 microframes"]
393    _10000,
394    #[doc = "32 microframes"]
395    _100000,
396    #[doc = "64 microframes"]
397    _1000000,
398    #[doc = r" Reserved"]
399    _Reserved(u8),
400}
401impl ITCR {
402    #[doc = r" Value of the field as raw bits"]
403    #[inline]
404    pub fn bits(&self) -> u8 {
405        match *self {
406            ITCR::_0 => 0,
407            ITCR::_1 => 1,
408            ITCR::_10 => 2,
409            ITCR::_100 => 4,
410            ITCR::_1000 => 8,
411            ITCR::_10000 => 16,
412            ITCR::_100000 => 32,
413            ITCR::_1000000 => 64,
414            ITCR::_Reserved(bits) => bits,
415        }
416    }
417    #[allow(missing_docs)]
418    #[doc(hidden)]
419    #[inline]
420    pub fn _from(value: u8) -> ITCR {
421        match value {
422            0 => ITCR::_0,
423            1 => ITCR::_1,
424            2 => ITCR::_10,
425            4 => ITCR::_100,
426            8 => ITCR::_1000,
427            16 => ITCR::_10000,
428            32 => ITCR::_100000,
429            64 => ITCR::_1000000,
430            i => ITCR::_Reserved(i),
431        }
432    }
433    #[doc = "Checks if the value of the field is `_0`"]
434    #[inline]
435    pub fn is_0(&self) -> bool {
436        *self == ITCR::_0
437    }
438    #[doc = "Checks if the value of the field is `_1`"]
439    #[inline]
440    pub fn is_1(&self) -> bool {
441        *self == ITCR::_1
442    }
443    #[doc = "Checks if the value of the field is `_10`"]
444    #[inline]
445    pub fn is_10(&self) -> bool {
446        *self == ITCR::_10
447    }
448    #[doc = "Checks if the value of the field is `_100`"]
449    #[inline]
450    pub fn is_100(&self) -> bool {
451        *self == ITCR::_100
452    }
453    #[doc = "Checks if the value of the field is `_1000`"]
454    #[inline]
455    pub fn is_1000(&self) -> bool {
456        *self == ITCR::_1000
457    }
458    #[doc = "Checks if the value of the field is `_10000`"]
459    #[inline]
460    pub fn is_10000(&self) -> bool {
461        *self == ITCR::_10000
462    }
463    #[doc = "Checks if the value of the field is `_100000`"]
464    #[inline]
465    pub fn is_100000(&self) -> bool {
466        *self == ITCR::_100000
467    }
468    #[doc = "Checks if the value of the field is `_1000000`"]
469    #[inline]
470    pub fn is_1000000(&self) -> bool {
471        *self == ITCR::_1000000
472    }
473}
474#[doc = r" Proxy"]
475pub struct _RSW<'a> {
476    w: &'a mut W,
477}
478impl<'a> _RSW<'a> {
479    #[doc = r" Sets the field bit"]
480    pub fn set_bit(self) -> &'a mut W {
481        self.bit(true)
482    }
483    #[doc = r" Clears the field bit"]
484    pub fn clear_bit(self) -> &'a mut W {
485        self.bit(false)
486    }
487    #[doc = r" Writes raw bits to the field"]
488    #[inline]
489    pub fn bit(self, value: bool) -> &'a mut W {
490        const MASK: bool = true;
491        const OFFSET: u8 = 0;
492        self.w.bits &= !((MASK as u32) << OFFSET);
493        self.w.bits |= ((value & MASK) as u32) << OFFSET;
494        self.w
495    }
496}
497#[doc = r" Proxy"]
498pub struct _RSTW<'a> {
499    w: &'a mut W,
500}
501impl<'a> _RSTW<'a> {
502    #[doc = r" Sets the field bit"]
503    pub fn set_bit(self) -> &'a mut W {
504        self.bit(true)
505    }
506    #[doc = r" Clears the field bit"]
507    pub fn clear_bit(self) -> &'a mut W {
508        self.bit(false)
509    }
510    #[doc = r" Writes raw bits to the field"]
511    #[inline]
512    pub fn bit(self, value: bool) -> &'a mut W {
513        const MASK: bool = true;
514        const OFFSET: u8 = 1;
515        self.w.bits &= !((MASK as u32) << OFFSET);
516        self.w.bits |= ((value & MASK) as u32) << OFFSET;
517        self.w
518    }
519}
520#[doc = "Values that can be written to the field `FS`"]
521pub enum FSW {
522    #[doc = "When FS2 = 0, the size is 1024 elements (4096 bytes). When FS2 = 1, the size is 64 elements (256 bytes)."]
523    _00,
524    #[doc = "When FS2 = 0, the size is 512 elements (2048 bytes). When FS2 = 1, the size is 32 elements (128 bytes)."]
525    _01,
526    #[doc = "When FS2 = 0, the size is 256 elements (1024 bytes). When FS2 = 1, the size is 16 elements (64 bytes)."]
527    _10,
528    #[doc = "When FS2 = 0, the size is 128 elements (512 bytes). When FS2 = 1, the size is 8 elements (32 bytes)."]
529    _11,
530}
531impl FSW {
532    #[allow(missing_docs)]
533    #[doc(hidden)]
534    #[inline]
535    pub fn _bits(&self) -> u8 {
536        match *self {
537            FSW::_00 => 0,
538            FSW::_01 => 1,
539            FSW::_10 => 2,
540            FSW::_11 => 3,
541        }
542    }
543}
544#[doc = r" Proxy"]
545pub struct _FSW<'a> {
546    w: &'a mut W,
547}
548impl<'a> _FSW<'a> {
549    #[doc = r" Writes `variant` to the field"]
550    #[inline]
551    pub fn variant(self, variant: FSW) -> &'a mut W {
552        {
553            self.bits(variant._bits())
554        }
555    }
556    #[doc = "When FS2 = 0, the size is 1024 elements (4096 bytes). When FS2 = 1, the size is 64 elements (256 bytes)."]
557    #[inline]
558    pub fn _00(self) -> &'a mut W {
559        self.variant(FSW::_00)
560    }
561    #[doc = "When FS2 = 0, the size is 512 elements (2048 bytes). When FS2 = 1, the size is 32 elements (128 bytes)."]
562    #[inline]
563    pub fn _01(self) -> &'a mut W {
564        self.variant(FSW::_01)
565    }
566    #[doc = "When FS2 = 0, the size is 256 elements (1024 bytes). When FS2 = 1, the size is 16 elements (64 bytes)."]
567    #[inline]
568    pub fn _10(self) -> &'a mut W {
569        self.variant(FSW::_10)
570    }
571    #[doc = "When FS2 = 0, the size is 128 elements (512 bytes). When FS2 = 1, the size is 8 elements (32 bytes)."]
572    #[inline]
573    pub fn _11(self) -> &'a mut W {
574        self.variant(FSW::_11)
575    }
576    #[doc = r" Writes raw bits to the field"]
577    #[inline]
578    pub fn bits(self, value: u8) -> &'a mut W {
579        const MASK: u8 = 3;
580        const OFFSET: u8 = 2;
581        self.w.bits &= !((MASK as u32) << OFFSET);
582        self.w.bits |= ((value & MASK) as u32) << OFFSET;
583        self.w
584    }
585}
586#[doc = "Values that can be written to the field `PSE`"]
587pub enum PSEW {
588    #[doc = "Do not process periodic schedule."]
589    _0,
590    #[doc = "Use the PERIODICLISTBASE register to access the periodic schedule."]
591    _1,
592}
593impl PSEW {
594    #[allow(missing_docs)]
595    #[doc(hidden)]
596    #[inline]
597    pub fn _bits(&self) -> bool {
598        match *self {
599            PSEW::_0 => false,
600            PSEW::_1 => true,
601        }
602    }
603}
604#[doc = r" Proxy"]
605pub struct _PSEW<'a> {
606    w: &'a mut W,
607}
608impl<'a> _PSEW<'a> {
609    #[doc = r" Writes `variant` to the field"]
610    #[inline]
611    pub fn variant(self, variant: PSEW) -> &'a mut W {
612        {
613            self.bit(variant._bits())
614        }
615    }
616    #[doc = "Do not process periodic schedule."]
617    #[inline]
618    pub fn _0(self) -> &'a mut W {
619        self.variant(PSEW::_0)
620    }
621    #[doc = "Use the PERIODICLISTBASE register to access the periodic schedule."]
622    #[inline]
623    pub fn _1(self) -> &'a mut W {
624        self.variant(PSEW::_1)
625    }
626    #[doc = r" Sets the field bit"]
627    pub fn set_bit(self) -> &'a mut W {
628        self.bit(true)
629    }
630    #[doc = r" Clears the field bit"]
631    pub fn clear_bit(self) -> &'a mut W {
632        self.bit(false)
633    }
634    #[doc = r" Writes raw bits to the field"]
635    #[inline]
636    pub fn bit(self, value: bool) -> &'a mut W {
637        const MASK: bool = true;
638        const OFFSET: u8 = 4;
639        self.w.bits &= !((MASK as u32) << OFFSET);
640        self.w.bits |= ((value & MASK) as u32) << OFFSET;
641        self.w
642    }
643}
644#[doc = "Values that can be written to the field `ASE`"]
645pub enum ASEW {
646    #[doc = "Do not process asynchronous schedule."]
647    _0,
648    #[doc = "Use the ASYNCLISTADDR register to access asynchronous schedule."]
649    _1,
650}
651impl ASEW {
652    #[allow(missing_docs)]
653    #[doc(hidden)]
654    #[inline]
655    pub fn _bits(&self) -> bool {
656        match *self {
657            ASEW::_0 => false,
658            ASEW::_1 => true,
659        }
660    }
661}
662#[doc = r" Proxy"]
663pub struct _ASEW<'a> {
664    w: &'a mut W,
665}
666impl<'a> _ASEW<'a> {
667    #[doc = r" Writes `variant` to the field"]
668    #[inline]
669    pub fn variant(self, variant: ASEW) -> &'a mut W {
670        {
671            self.bit(variant._bits())
672        }
673    }
674    #[doc = "Do not process asynchronous schedule."]
675    #[inline]
676    pub fn _0(self) -> &'a mut W {
677        self.variant(ASEW::_0)
678    }
679    #[doc = "Use the ASYNCLISTADDR register to access asynchronous schedule."]
680    #[inline]
681    pub fn _1(self) -> &'a mut W {
682        self.variant(ASEW::_1)
683    }
684    #[doc = r" Sets the field bit"]
685    pub fn set_bit(self) -> &'a mut W {
686        self.bit(true)
687    }
688    #[doc = r" Clears the field bit"]
689    pub fn clear_bit(self) -> &'a mut W {
690        self.bit(false)
691    }
692    #[doc = r" Writes raw bits to the field"]
693    #[inline]
694    pub fn bit(self, value: bool) -> &'a mut W {
695        const MASK: bool = true;
696        const OFFSET: u8 = 5;
697        self.w.bits &= !((MASK as u32) << OFFSET);
698        self.w.bits |= ((value & MASK) as u32) << OFFSET;
699        self.w
700    }
701}
702#[doc = r" Proxy"]
703pub struct _IAAW<'a> {
704    w: &'a mut W,
705}
706impl<'a> _IAAW<'a> {
707    #[doc = r" Sets the field bit"]
708    pub fn set_bit(self) -> &'a mut W {
709        self.bit(true)
710    }
711    #[doc = r" Clears the field bit"]
712    pub fn clear_bit(self) -> &'a mut W {
713        self.bit(false)
714    }
715    #[doc = r" Writes raw bits to the field"]
716    #[inline]
717    pub fn bit(self, value: bool) -> &'a mut W {
718        const MASK: bool = true;
719        const OFFSET: u8 = 6;
720        self.w.bits &= !((MASK as u32) << OFFSET);
721        self.w.bits |= ((value & MASK) as u32) << OFFSET;
722        self.w
723    }
724}
725#[doc = r" Proxy"]
726pub struct _ASPW<'a> {
727    w: &'a mut W,
728}
729impl<'a> _ASPW<'a> {
730    #[doc = r" Writes raw bits to the field"]
731    #[inline]
732    pub unsafe fn bits(self, value: u8) -> &'a mut W {
733        const MASK: u8 = 3;
734        const OFFSET: u8 = 8;
735        self.w.bits &= !((MASK as u32) << OFFSET);
736        self.w.bits |= ((value & MASK) as u32) << OFFSET;
737        self.w
738    }
739}
740#[doc = "Values that can be written to the field `ASPE`"]
741pub enum ASPEW {
742    #[doc = "Park mode disabled"]
743    _0,
744    #[doc = "Park mode enabled"]
745    _1,
746}
747impl ASPEW {
748    #[allow(missing_docs)]
749    #[doc(hidden)]
750    #[inline]
751    pub fn _bits(&self) -> bool {
752        match *self {
753            ASPEW::_0 => false,
754            ASPEW::_1 => true,
755        }
756    }
757}
758#[doc = r" Proxy"]
759pub struct _ASPEW<'a> {
760    w: &'a mut W,
761}
762impl<'a> _ASPEW<'a> {
763    #[doc = r" Writes `variant` to the field"]
764    #[inline]
765    pub fn variant(self, variant: ASPEW) -> &'a mut W {
766        {
767            self.bit(variant._bits())
768        }
769    }
770    #[doc = "Park mode disabled"]
771    #[inline]
772    pub fn _0(self) -> &'a mut W {
773        self.variant(ASPEW::_0)
774    }
775    #[doc = "Park mode enabled"]
776    #[inline]
777    pub fn _1(self) -> &'a mut W {
778        self.variant(ASPEW::_1)
779    }
780    #[doc = r" Sets the field bit"]
781    pub fn set_bit(self) -> &'a mut W {
782        self.bit(true)
783    }
784    #[doc = r" Clears the field bit"]
785    pub fn clear_bit(self) -> &'a mut W {
786        self.bit(false)
787    }
788    #[doc = r" Writes raw bits to the field"]
789    #[inline]
790    pub fn bit(self, value: bool) -> &'a mut W {
791        const MASK: bool = true;
792        const OFFSET: u8 = 11;
793        self.w.bits &= !((MASK as u32) << OFFSET);
794        self.w.bits |= ((value & MASK) as u32) << OFFSET;
795        self.w
796    }
797}
798#[doc = r" Proxy"]
799pub struct _SUTWW<'a> {
800    w: &'a mut W,
801}
802impl<'a> _SUTWW<'a> {
803    #[doc = r" Sets the field bit"]
804    pub fn set_bit(self) -> &'a mut W {
805        self.bit(true)
806    }
807    #[doc = r" Clears the field bit"]
808    pub fn clear_bit(self) -> &'a mut W {
809        self.bit(false)
810    }
811    #[doc = r" Writes raw bits to the field"]
812    #[inline]
813    pub fn bit(self, value: bool) -> &'a mut W {
814        const MASK: bool = true;
815        const OFFSET: u8 = 13;
816        self.w.bits &= !((MASK as u32) << OFFSET);
817        self.w.bits |= ((value & MASK) as u32) << OFFSET;
818        self.w
819    }
820}
821#[doc = r" Proxy"]
822pub struct _ATDTWW<'a> {
823    w: &'a mut W,
824}
825impl<'a> _ATDTWW<'a> {
826    #[doc = r" Sets the field bit"]
827    pub fn set_bit(self) -> &'a mut W {
828        self.bit(true)
829    }
830    #[doc = r" Clears the field bit"]
831    pub fn clear_bit(self) -> &'a mut W {
832        self.bit(false)
833    }
834    #[doc = r" Writes raw bits to the field"]
835    #[inline]
836    pub fn bit(self, value: bool) -> &'a mut W {
837        const MASK: bool = true;
838        const OFFSET: u8 = 14;
839        self.w.bits &= !((MASK as u32) << OFFSET);
840        self.w.bits |= ((value & MASK) as u32) << OFFSET;
841        self.w
842    }
843}
844#[doc = r" Proxy"]
845pub struct _FS2W<'a> {
846    w: &'a mut W,
847}
848impl<'a> _FS2W<'a> {
849    #[doc = r" Sets the field bit"]
850    pub fn set_bit(self) -> &'a mut W {
851        self.bit(true)
852    }
853    #[doc = r" Clears the field bit"]
854    pub fn clear_bit(self) -> &'a mut W {
855        self.bit(false)
856    }
857    #[doc = r" Writes raw bits to the field"]
858    #[inline]
859    pub fn bit(self, value: bool) -> &'a mut W {
860        const MASK: bool = true;
861        const OFFSET: u8 = 15;
862        self.w.bits &= !((MASK as u32) << OFFSET);
863        self.w.bits |= ((value & MASK) as u32) << OFFSET;
864        self.w
865    }
866}
867#[doc = "Values that can be written to the field `ITC`"]
868pub enum ITCW {
869    #[doc = "Immediate (no threshold)"]
870    _0,
871    #[doc = "1 microframe"]
872    _1,
873    #[doc = "2 microframes"]
874    _10,
875    #[doc = "4 microframes"]
876    _100,
877    #[doc = "8 microframes"]
878    _1000,
879    #[doc = "16 microframes"]
880    _10000,
881    #[doc = "32 microframes"]
882    _100000,
883    #[doc = "64 microframes"]
884    _1000000,
885}
886impl ITCW {
887    #[allow(missing_docs)]
888    #[doc(hidden)]
889    #[inline]
890    pub fn _bits(&self) -> u8 {
891        match *self {
892            ITCW::_0 => 0,
893            ITCW::_1 => 1,
894            ITCW::_10 => 2,
895            ITCW::_100 => 4,
896            ITCW::_1000 => 8,
897            ITCW::_10000 => 16,
898            ITCW::_100000 => 32,
899            ITCW::_1000000 => 64,
900        }
901    }
902}
903#[doc = r" Proxy"]
904pub struct _ITCW<'a> {
905    w: &'a mut W,
906}
907impl<'a> _ITCW<'a> {
908    #[doc = r" Writes `variant` to the field"]
909    #[inline]
910    pub fn variant(self, variant: ITCW) -> &'a mut W {
911        unsafe { self.bits(variant._bits()) }
912    }
913    #[doc = "Immediate (no threshold)"]
914    #[inline]
915    pub fn _0(self) -> &'a mut W {
916        self.variant(ITCW::_0)
917    }
918    #[doc = "1 microframe"]
919    #[inline]
920    pub fn _1(self) -> &'a mut W {
921        self.variant(ITCW::_1)
922    }
923    #[doc = "2 microframes"]
924    #[inline]
925    pub fn _10(self) -> &'a mut W {
926        self.variant(ITCW::_10)
927    }
928    #[doc = "4 microframes"]
929    #[inline]
930    pub fn _100(self) -> &'a mut W {
931        self.variant(ITCW::_100)
932    }
933    #[doc = "8 microframes"]
934    #[inline]
935    pub fn _1000(self) -> &'a mut W {
936        self.variant(ITCW::_1000)
937    }
938    #[doc = "16 microframes"]
939    #[inline]
940    pub fn _10000(self) -> &'a mut W {
941        self.variant(ITCW::_10000)
942    }
943    #[doc = "32 microframes"]
944    #[inline]
945    pub fn _100000(self) -> &'a mut W {
946        self.variant(ITCW::_100000)
947    }
948    #[doc = "64 microframes"]
949    #[inline]
950    pub fn _1000000(self) -> &'a mut W {
951        self.variant(ITCW::_1000000)
952    }
953    #[doc = r" Writes raw bits to the field"]
954    #[inline]
955    pub unsafe fn bits(self, value: u8) -> &'a mut W {
956        const MASK: u8 = 255;
957        const OFFSET: u8 = 16;
958        self.w.bits &= !((MASK as u32) << OFFSET);
959        self.w.bits |= ((value & MASK) as u32) << OFFSET;
960        self.w
961    }
962}
963impl R {
964    #[doc = r" Value of the register as raw bits"]
965    #[inline]
966    pub fn bits(&self) -> u32 {
967        self.bits
968    }
969    #[doc = "Bit 0 - Run/Stop"]
970    #[inline]
971    pub fn rs(&self) -> RSR {
972        let bits = {
973            const MASK: bool = true;
974            const OFFSET: u8 = 0;
975            ((self.bits >> OFFSET) & MASK as u32) != 0
976        };
977        RSR { bits }
978    }
979    #[doc = "Bit 1 - Controller Reset"]
980    #[inline]
981    pub fn rst(&self) -> RSTR {
982        let bits = {
983            const MASK: bool = true;
984            const OFFSET: u8 = 1;
985            ((self.bits >> OFFSET) & MASK as u32) != 0
986        };
987        RSTR { bits }
988    }
989    #[doc = "Bits 2:3 - Frame list Size"]
990    #[inline]
991    pub fn fs(&self) -> FSR {
992        FSR::_from({
993            const MASK: u8 = 3;
994            const OFFSET: u8 = 2;
995            ((self.bits >> OFFSET) & MASK as u32) as u8
996        })
997    }
998    #[doc = "Bit 4 - Periodic Schedule Enable"]
999    #[inline]
1000    pub fn pse(&self) -> PSER {
1001        PSER::_from({
1002            const MASK: bool = true;
1003            const OFFSET: u8 = 4;
1004            ((self.bits >> OFFSET) & MASK as u32) != 0
1005        })
1006    }
1007    #[doc = "Bit 5 - Asynchronous Schedule Enable"]
1008    #[inline]
1009    pub fn ase(&self) -> ASER {
1010        ASER::_from({
1011            const MASK: bool = true;
1012            const OFFSET: u8 = 5;
1013            ((self.bits >> OFFSET) & MASK as u32) != 0
1014        })
1015    }
1016    #[doc = "Bit 6 - Interrupt on Async Advance doorbell"]
1017    #[inline]
1018    pub fn iaa(&self) -> IAAR {
1019        let bits = {
1020            const MASK: bool = true;
1021            const OFFSET: u8 = 6;
1022            ((self.bits >> OFFSET) & MASK as u32) != 0
1023        };
1024        IAAR { bits }
1025    }
1026    #[doc = "Bits 8:9 - Asynchronous Schedule Park mode count"]
1027    #[inline]
1028    pub fn asp(&self) -> ASPR {
1029        let bits = {
1030            const MASK: u8 = 3;
1031            const OFFSET: u8 = 8;
1032            ((self.bits >> OFFSET) & MASK as u32) as u8
1033        };
1034        ASPR { bits }
1035    }
1036    #[doc = "Bit 11 - Asynchronous Schedule Park mode Enable"]
1037    #[inline]
1038    pub fn aspe(&self) -> ASPER {
1039        ASPER::_from({
1040            const MASK: bool = true;
1041            const OFFSET: u8 = 11;
1042            ((self.bits >> OFFSET) & MASK as u32) != 0
1043        })
1044    }
1045    #[doc = "Bit 13 - Setup TripWire"]
1046    #[inline]
1047    pub fn sutw(&self) -> SUTWR {
1048        let bits = {
1049            const MASK: bool = true;
1050            const OFFSET: u8 = 13;
1051            ((self.bits >> OFFSET) & MASK as u32) != 0
1052        };
1053        SUTWR { bits }
1054    }
1055    #[doc = "Bit 14 - Add dTD TripWire"]
1056    #[inline]
1057    pub fn atdtw(&self) -> ATDTWR {
1058        let bits = {
1059            const MASK: bool = true;
1060            const OFFSET: u8 = 14;
1061            ((self.bits >> OFFSET) & MASK as u32) != 0
1062        };
1063        ATDTWR { bits }
1064    }
1065    #[doc = "Bit 15 - Frame list Size 2"]
1066    #[inline]
1067    pub fn fs2(&self) -> FS2R {
1068        let bits = {
1069            const MASK: bool = true;
1070            const OFFSET: u8 = 15;
1071            ((self.bits >> OFFSET) & MASK as u32) != 0
1072        };
1073        FS2R { bits }
1074    }
1075    #[doc = "Bits 16:23 - Interrupt Threshold Control"]
1076    #[inline]
1077    pub fn itc(&self) -> ITCR {
1078        ITCR::_from({
1079            const MASK: u8 = 255;
1080            const OFFSET: u8 = 16;
1081            ((self.bits >> OFFSET) & MASK as u32) as u8
1082        })
1083    }
1084}
1085impl W {
1086    #[doc = r" Reset value of the register"]
1087    #[inline]
1088    pub fn reset_value() -> W {
1089        W { bits: 524288 }
1090    }
1091    #[doc = r" Writes raw bits to the register"]
1092    #[inline]
1093    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1094        self.bits = bits;
1095        self
1096    }
1097    #[doc = "Bit 0 - Run/Stop"]
1098    #[inline]
1099    pub fn rs(&mut self) -> _RSW {
1100        _RSW { w: self }
1101    }
1102    #[doc = "Bit 1 - Controller Reset"]
1103    #[inline]
1104    pub fn rst(&mut self) -> _RSTW {
1105        _RSTW { w: self }
1106    }
1107    #[doc = "Bits 2:3 - Frame list Size"]
1108    #[inline]
1109    pub fn fs(&mut self) -> _FSW {
1110        _FSW { w: self }
1111    }
1112    #[doc = "Bit 4 - Periodic Schedule Enable"]
1113    #[inline]
1114    pub fn pse(&mut self) -> _PSEW {
1115        _PSEW { w: self }
1116    }
1117    #[doc = "Bit 5 - Asynchronous Schedule Enable"]
1118    #[inline]
1119    pub fn ase(&mut self) -> _ASEW {
1120        _ASEW { w: self }
1121    }
1122    #[doc = "Bit 6 - Interrupt on Async Advance doorbell"]
1123    #[inline]
1124    pub fn iaa(&mut self) -> _IAAW {
1125        _IAAW { w: self }
1126    }
1127    #[doc = "Bits 8:9 - Asynchronous Schedule Park mode count"]
1128    #[inline]
1129    pub fn asp(&mut self) -> _ASPW {
1130        _ASPW { w: self }
1131    }
1132    #[doc = "Bit 11 - Asynchronous Schedule Park mode Enable"]
1133    #[inline]
1134    pub fn aspe(&mut self) -> _ASPEW {
1135        _ASPEW { w: self }
1136    }
1137    #[doc = "Bit 13 - Setup TripWire"]
1138    #[inline]
1139    pub fn sutw(&mut self) -> _SUTWW {
1140        _SUTWW { w: self }
1141    }
1142    #[doc = "Bit 14 - Add dTD TripWire"]
1143    #[inline]
1144    pub fn atdtw(&mut self) -> _ATDTWW {
1145        _ATDTWW { w: self }
1146    }
1147    #[doc = "Bit 15 - Frame list Size 2"]
1148    #[inline]
1149    pub fn fs2(&mut self) -> _FS2W {
1150        _FS2W { w: self }
1151    }
1152    #[doc = "Bits 16:23 - Interrupt Threshold Control"]
1153    #[inline]
1154    pub fn itc(&mut self) -> _ITCW {
1155        _ITCW { w: self }
1156    }
1157}
k66/usbhs/usbcmd.rs

k66/usbhs/
usbcmd.rs
