k66/usbphy/
debug_clr.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::DEBUG_CLR {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct OTGIDPIOLOCKR {
47    bits: bool,
48}
49impl OTGIDPIOLOCKR {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bit(&self) -> bool {
53        self.bits
54    }
55    #[doc = r" Returns `true` if the bit is clear (0)"]
56    #[inline]
57    pub fn bit_is_clear(&self) -> bool {
58        !self.bit()
59    }
60    #[doc = r" Returns `true` if the bit is set (1)"]
61    #[inline]
62    pub fn bit_is_set(&self) -> bool {
63        self.bit()
64    }
65}
66#[doc = r" Value of the field"]
67pub struct DEBUG_INTERFACE_HOLDR {
68    bits: bool,
69}
70impl DEBUG_INTERFACE_HOLDR {
71    #[doc = r" Value of the field as raw bits"]
72    #[inline]
73    pub fn bit(&self) -> bool {
74        self.bits
75    }
76    #[doc = r" Returns `true` if the bit is clear (0)"]
77    #[inline]
78    pub fn bit_is_clear(&self) -> bool {
79        !self.bit()
80    }
81    #[doc = r" Returns `true` if the bit is set (1)"]
82    #[inline]
83    pub fn bit_is_set(&self) -> bool {
84        self.bit()
85    }
86}
87#[doc = r" Value of the field"]
88pub struct HSTPULLDOWNR {
89    bits: u8,
90}
91impl HSTPULLDOWNR {
92    #[doc = r" Value of the field as raw bits"]
93    #[inline]
94    pub fn bits(&self) -> u8 {
95        self.bits
96    }
97}
98#[doc = r" Value of the field"]
99pub struct ENHSTPULLDOWNR {
100    bits: u8,
101}
102impl ENHSTPULLDOWNR {
103    #[doc = r" Value of the field as raw bits"]
104    #[inline]
105    pub fn bits(&self) -> u8 {
106        self.bits
107    }
108}
109#[doc = r" Value of the field"]
110pub struct TX2RXCOUNTR {
111    bits: u8,
112}
113impl TX2RXCOUNTR {
114    #[doc = r" Value of the field as raw bits"]
115    #[inline]
116    pub fn bits(&self) -> u8 {
117        self.bits
118    }
119}
120#[doc = r" Value of the field"]
121pub struct ENTX2RXCOUNTR {
122    bits: bool,
123}
124impl ENTX2RXCOUNTR {
125    #[doc = r" Value of the field as raw bits"]
126    #[inline]
127    pub fn bit(&self) -> bool {
128        self.bits
129    }
130    #[doc = r" Returns `true` if the bit is clear (0)"]
131    #[inline]
132    pub fn bit_is_clear(&self) -> bool {
133        !self.bit()
134    }
135    #[doc = r" Returns `true` if the bit is set (1)"]
136    #[inline]
137    pub fn bit_is_set(&self) -> bool {
138        self.bit()
139    }
140}
141#[doc = r" Value of the field"]
142pub struct SQUELCHRESETCOUNTR {
143    bits: u8,
144}
145impl SQUELCHRESETCOUNTR {
146    #[doc = r" Value of the field as raw bits"]
147    #[inline]
148    pub fn bits(&self) -> u8 {
149        self.bits
150    }
151}
152#[doc = r" Value of the field"]
153pub struct ENSQUELCHRESETR {
154    bits: bool,
155}
156impl ENSQUELCHRESETR {
157    #[doc = r" Value of the field as raw bits"]
158    #[inline]
159    pub fn bit(&self) -> bool {
160        self.bits
161    }
162    #[doc = r" Returns `true` if the bit is clear (0)"]
163    #[inline]
164    pub fn bit_is_clear(&self) -> bool {
165        !self.bit()
166    }
167    #[doc = r" Returns `true` if the bit is set (1)"]
168    #[inline]
169    pub fn bit_is_set(&self) -> bool {
170        self.bit()
171    }
172}
173#[doc = r" Value of the field"]
174pub struct SQUELCHRESETLENGTHR {
175    bits: u8,
176}
177impl SQUELCHRESETLENGTHR {
178    #[doc = r" Value of the field as raw bits"]
179    #[inline]
180    pub fn bits(&self) -> u8 {
181        self.bits
182    }
183}
184#[doc = r" Value of the field"]
185pub struct HOST_RESUME_DEBUGR {
186    bits: bool,
187}
188impl HOST_RESUME_DEBUGR {
189    #[doc = r" Value of the field as raw bits"]
190    #[inline]
191    pub fn bit(&self) -> bool {
192        self.bits
193    }
194    #[doc = r" Returns `true` if the bit is clear (0)"]
195    #[inline]
196    pub fn bit_is_clear(&self) -> bool {
197        !self.bit()
198    }
199    #[doc = r" Returns `true` if the bit is set (1)"]
200    #[inline]
201    pub fn bit_is_set(&self) -> bool {
202        self.bit()
203    }
204}
205#[doc = r" Value of the field"]
206pub struct CLKGATER {
207    bits: bool,
208}
209impl CLKGATER {
210    #[doc = r" Value of the field as raw bits"]
211    #[inline]
212    pub fn bit(&self) -> bool {
213        self.bits
214    }
215    #[doc = r" Returns `true` if the bit is clear (0)"]
216    #[inline]
217    pub fn bit_is_clear(&self) -> bool {
218        !self.bit()
219    }
220    #[doc = r" Returns `true` if the bit is set (1)"]
221    #[inline]
222    pub fn bit_is_set(&self) -> bool {
223        self.bit()
224    }
225}
226#[doc = r" Proxy"]
227pub struct _OTGIDPIOLOCKW<'a> {
228    w: &'a mut W,
229}
230impl<'a> _OTGIDPIOLOCKW<'a> {
231    #[doc = r" Sets the field bit"]
232    pub fn set_bit(self) -> &'a mut W {
233        self.bit(true)
234    }
235    #[doc = r" Clears the field bit"]
236    pub fn clear_bit(self) -> &'a mut W {
237        self.bit(false)
238    }
239    #[doc = r" Writes raw bits to the field"]
240    #[inline]
241    pub fn bit(self, value: bool) -> &'a mut W {
242        const MASK: bool = true;
243        const OFFSET: u8 = 0;
244        self.w.bits &= !((MASK as u32) << OFFSET);
245        self.w.bits |= ((value & MASK) as u32) << OFFSET;
246        self.w
247    }
248}
249#[doc = r" Proxy"]
250pub struct _DEBUG_INTERFACE_HOLDW<'a> {
251    w: &'a mut W,
252}
253impl<'a> _DEBUG_INTERFACE_HOLDW<'a> {
254    #[doc = r" Sets the field bit"]
255    pub fn set_bit(self) -> &'a mut W {
256        self.bit(true)
257    }
258    #[doc = r" Clears the field bit"]
259    pub fn clear_bit(self) -> &'a mut W {
260        self.bit(false)
261    }
262    #[doc = r" Writes raw bits to the field"]
263    #[inline]
264    pub fn bit(self, value: bool) -> &'a mut W {
265        const MASK: bool = true;
266        const OFFSET: u8 = 1;
267        self.w.bits &= !((MASK as u32) << OFFSET);
268        self.w.bits |= ((value & MASK) as u32) << OFFSET;
269        self.w
270    }
271}
272#[doc = r" Proxy"]
273pub struct _HSTPULLDOWNW<'a> {
274    w: &'a mut W,
275}
276impl<'a> _HSTPULLDOWNW<'a> {
277    #[doc = r" Writes raw bits to the field"]
278    #[inline]
279    pub unsafe fn bits(self, value: u8) -> &'a mut W {
280        const MASK: u8 = 3;
281        const OFFSET: u8 = 2;
282        self.w.bits &= !((MASK as u32) << OFFSET);
283        self.w.bits |= ((value & MASK) as u32) << OFFSET;
284        self.w
285    }
286}
287#[doc = r" Proxy"]
288pub struct _ENHSTPULLDOWNW<'a> {
289    w: &'a mut W,
290}
291impl<'a> _ENHSTPULLDOWNW<'a> {
292    #[doc = r" Writes raw bits to the field"]
293    #[inline]
294    pub unsafe fn bits(self, value: u8) -> &'a mut W {
295        const MASK: u8 = 3;
296        const OFFSET: u8 = 4;
297        self.w.bits &= !((MASK as u32) << OFFSET);
298        self.w.bits |= ((value & MASK) as u32) << OFFSET;
299        self.w
300    }
301}
302#[doc = r" Proxy"]
303pub struct _TX2RXCOUNTW<'a> {
304    w: &'a mut W,
305}
306impl<'a> _TX2RXCOUNTW<'a> {
307    #[doc = r" Writes raw bits to the field"]
308    #[inline]
309    pub unsafe fn bits(self, value: u8) -> &'a mut W {
310        const MASK: u8 = 15;
311        const OFFSET: u8 = 8;
312        self.w.bits &= !((MASK as u32) << OFFSET);
313        self.w.bits |= ((value & MASK) as u32) << OFFSET;
314        self.w
315    }
316}
317#[doc = r" Proxy"]
318pub struct _ENTX2RXCOUNTW<'a> {
319    w: &'a mut W,
320}
321impl<'a> _ENTX2RXCOUNTW<'a> {
322    #[doc = r" Sets the field bit"]
323    pub fn set_bit(self) -> &'a mut W {
324        self.bit(true)
325    }
326    #[doc = r" Clears the field bit"]
327    pub fn clear_bit(self) -> &'a mut W {
328        self.bit(false)
329    }
330    #[doc = r" Writes raw bits to the field"]
331    #[inline]
332    pub fn bit(self, value: bool) -> &'a mut W {
333        const MASK: bool = true;
334        const OFFSET: u8 = 12;
335        self.w.bits &= !((MASK as u32) << OFFSET);
336        self.w.bits |= ((value & MASK) as u32) << OFFSET;
337        self.w
338    }
339}
340#[doc = r" Proxy"]
341pub struct _SQUELCHRESETCOUNTW<'a> {
342    w: &'a mut W,
343}
344impl<'a> _SQUELCHRESETCOUNTW<'a> {
345    #[doc = r" Writes raw bits to the field"]
346    #[inline]
347    pub unsafe fn bits(self, value: u8) -> &'a mut W {
348        const MASK: u8 = 31;
349        const OFFSET: u8 = 16;
350        self.w.bits &= !((MASK as u32) << OFFSET);
351        self.w.bits |= ((value & MASK) as u32) << OFFSET;
352        self.w
353    }
354}
355#[doc = r" Proxy"]
356pub struct _ENSQUELCHRESETW<'a> {
357    w: &'a mut W,
358}
359impl<'a> _ENSQUELCHRESETW<'a> {
360    #[doc = r" Sets the field bit"]
361    pub fn set_bit(self) -> &'a mut W {
362        self.bit(true)
363    }
364    #[doc = r" Clears the field bit"]
365    pub fn clear_bit(self) -> &'a mut W {
366        self.bit(false)
367    }
368    #[doc = r" Writes raw bits to the field"]
369    #[inline]
370    pub fn bit(self, value: bool) -> &'a mut W {
371        const MASK: bool = true;
372        const OFFSET: u8 = 24;
373        self.w.bits &= !((MASK as u32) << OFFSET);
374        self.w.bits |= ((value & MASK) as u32) << OFFSET;
375        self.w
376    }
377}
378#[doc = r" Proxy"]
379pub struct _SQUELCHRESETLENGTHW<'a> {
380    w: &'a mut W,
381}
382impl<'a> _SQUELCHRESETLENGTHW<'a> {
383    #[doc = r" Writes raw bits to the field"]
384    #[inline]
385    pub unsafe fn bits(self, value: u8) -> &'a mut W {
386        const MASK: u8 = 15;
387        const OFFSET: u8 = 25;
388        self.w.bits &= !((MASK as u32) << OFFSET);
389        self.w.bits |= ((value & MASK) as u32) << OFFSET;
390        self.w
391    }
392}
393#[doc = r" Proxy"]
394pub struct _HOST_RESUME_DEBUGW<'a> {
395    w: &'a mut W,
396}
397impl<'a> _HOST_RESUME_DEBUGW<'a> {
398    #[doc = r" Sets the field bit"]
399    pub fn set_bit(self) -> &'a mut W {
400        self.bit(true)
401    }
402    #[doc = r" Clears the field bit"]
403    pub fn clear_bit(self) -> &'a mut W {
404        self.bit(false)
405    }
406    #[doc = r" Writes raw bits to the field"]
407    #[inline]
408    pub fn bit(self, value: bool) -> &'a mut W {
409        const MASK: bool = true;
410        const OFFSET: u8 = 29;
411        self.w.bits &= !((MASK as u32) << OFFSET);
412        self.w.bits |= ((value & MASK) as u32) << OFFSET;
413        self.w
414    }
415}
416#[doc = r" Proxy"]
417pub struct _CLKGATEW<'a> {
418    w: &'a mut W,
419}
420impl<'a> _CLKGATEW<'a> {
421    #[doc = r" Sets the field bit"]
422    pub fn set_bit(self) -> &'a mut W {
423        self.bit(true)
424    }
425    #[doc = r" Clears the field bit"]
426    pub fn clear_bit(self) -> &'a mut W {
427        self.bit(false)
428    }
429    #[doc = r" Writes raw bits to the field"]
430    #[inline]
431    pub fn bit(self, value: bool) -> &'a mut W {
432        const MASK: bool = true;
433        const OFFSET: u8 = 30;
434        self.w.bits &= !((MASK as u32) << OFFSET);
435        self.w.bits |= ((value & MASK) as u32) << OFFSET;
436        self.w
437    }
438}
439impl R {
440    #[doc = r" Value of the register as raw bits"]
441    #[inline]
442    pub fn bits(&self) -> u32 {
443        self.bits
444    }
445    #[doc = "Bit 0 - Once OTG ID from USBPHY_STATUS_OTGID_STATUS is sampled, use this to hold the value"]
446    #[inline]
447    pub fn otgidpiolock(&self) -> OTGIDPIOLOCKR {
448        let bits = {
449            const MASK: bool = true;
450            const OFFSET: u8 = 0;
451            ((self.bits >> OFFSET) & MASK as u32) != 0
452        };
453        OTGIDPIOLOCKR { bits }
454    }
455    #[doc = "Bit 1 - Use holding registers to assist in timing for external UTMI interface."]
456    #[inline]
457    pub fn debug_interface_hold(&self) -> DEBUG_INTERFACE_HOLDR {
458        let bits = {
459            const MASK: bool = true;
460            const OFFSET: u8 = 1;
461            ((self.bits >> OFFSET) & MASK as u32) != 0
462        };
463        DEBUG_INTERFACE_HOLDR { bits }
464    }
465    #[doc = "Bits 2:3 - This bit field selects whether to connect pulldown resistors on the USB_DP/USB_DM pins if the corresponding pulldown overdrive mode is enabled through USBPHY_DEBUG\\[5:4} Set bit 3 to value 1'b1 to connect the 15ohm pulldown on USB_DP line"]
466    #[inline]
467    pub fn hstpulldown(&self) -> HSTPULLDOWNR {
468        let bits = {
469            const MASK: u8 = 3;
470            const OFFSET: u8 = 2;
471            ((self.bits >> OFFSET) & MASK as u32) as u8
472        };
473        HSTPULLDOWNR { bits }
474    }
475    #[doc = "Bits 4:5 - This bit field selects host pulldown overdrive mode"]
476    #[inline]
477    pub fn enhstpulldown(&self) -> ENHSTPULLDOWNR {
478        let bits = {
479            const MASK: u8 = 3;
480            const OFFSET: u8 = 4;
481            ((self.bits >> OFFSET) & MASK as u32) as u8
482        };
483        ENHSTPULLDOWNR { bits }
484    }
485    #[doc = "Bits 8:11 - Delay in between the end of transmit to the beginning of receive"]
486    #[inline]
487    pub fn tx2rxcount(&self) -> TX2RXCOUNTR {
488        let bits = {
489            const MASK: u8 = 15;
490            const OFFSET: u8 = 8;
491            ((self.bits >> OFFSET) & MASK as u32) as u8
492        };
493        TX2RXCOUNTR { bits }
494    }
495    #[doc = "Bit 12 - Set this bit to allow a countdown to transition in between TX and RX."]
496    #[inline]
497    pub fn entx2rxcount(&self) -> ENTX2RXCOUNTR {
498        let bits = {
499            const MASK: bool = true;
500            const OFFSET: u8 = 12;
501            ((self.bits >> OFFSET) & MASK as u32) != 0
502        };
503        ENTX2RXCOUNTR { bits }
504    }
505    #[doc = "Bits 16:20 - Delay in between the detection of squelch to the reset of high-speed RX."]
506    #[inline]
507    pub fn squelchresetcount(&self) -> SQUELCHRESETCOUNTR {
508        let bits = {
509            const MASK: u8 = 31;
510            const OFFSET: u8 = 16;
511            ((self.bits >> OFFSET) & MASK as u32) as u8
512        };
513        SQUELCHRESETCOUNTR { bits }
514    }
515    #[doc = "Bit 24 - Set bit to allow squelch to reset high-speed receive."]
516    #[inline]
517    pub fn ensquelchreset(&self) -> ENSQUELCHRESETR {
518        let bits = {
519            const MASK: bool = true;
520            const OFFSET: u8 = 24;
521            ((self.bits >> OFFSET) & MASK as u32) != 0
522        };
523        ENSQUELCHRESETR { bits }
524    }
525    #[doc = "Bits 25:28 - Duration of RESET in terms of the number of 480-MHz cycles."]
526    #[inline]
527    pub fn squelchresetlength(&self) -> SQUELCHRESETLENGTHR {
528        let bits = {
529            const MASK: u8 = 15;
530            const OFFSET: u8 = 25;
531            ((self.bits >> OFFSET) & MASK as u32) as u8
532        };
533        SQUELCHRESETLENGTHR { bits }
534    }
535    #[doc = "Bit 29 - Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND = 1."]
536    #[inline]
537    pub fn host_resume_debug(&self) -> HOST_RESUME_DEBUGR {
538        let bits = {
539            const MASK: bool = true;
540            const OFFSET: u8 = 29;
541            ((self.bits >> OFFSET) & MASK as u32) != 0
542        };
543        HOST_RESUME_DEBUGR { bits }
544    }
545    #[doc = "Bit 30 - Gate Test Clocks"]
546    #[inline]
547    pub fn clkgate(&self) -> CLKGATER {
548        let bits = {
549            const MASK: bool = true;
550            const OFFSET: u8 = 30;
551            ((self.bits >> OFFSET) & MASK as u32) != 0
552        };
553        CLKGATER { bits }
554    }
555}
556impl W {
557    #[doc = r" Reset value of the register"]
558    #[inline]
559    pub fn reset_value() -> W {
560        W { bits: 2132279296 }
561    }
562    #[doc = r" Writes raw bits to the register"]
563    #[inline]
564    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
565        self.bits = bits;
566        self
567    }
568    #[doc = "Bit 0 - Once OTG ID from USBPHY_STATUS_OTGID_STATUS is sampled, use this to hold the value"]
569    #[inline]
570    pub fn otgidpiolock(&mut self) -> _OTGIDPIOLOCKW {
571        _OTGIDPIOLOCKW { w: self }
572    }
573    #[doc = "Bit 1 - Use holding registers to assist in timing for external UTMI interface."]
574    #[inline]
575    pub fn debug_interface_hold(&mut self) -> _DEBUG_INTERFACE_HOLDW {
576        _DEBUG_INTERFACE_HOLDW { w: self }
577    }
578    #[doc = "Bits 2:3 - This bit field selects whether to connect pulldown resistors on the USB_DP/USB_DM pins if the corresponding pulldown overdrive mode is enabled through USBPHY_DEBUG\\[5:4} Set bit 3 to value 1'b1 to connect the 15ohm pulldown on USB_DP line"]
579    #[inline]
580    pub fn hstpulldown(&mut self) -> _HSTPULLDOWNW {
581        _HSTPULLDOWNW { w: self }
582    }
583    #[doc = "Bits 4:5 - This bit field selects host pulldown overdrive mode"]
584    #[inline]
585    pub fn enhstpulldown(&mut self) -> _ENHSTPULLDOWNW {
586        _ENHSTPULLDOWNW { w: self }
587    }
588    #[doc = "Bits 8:11 - Delay in between the end of transmit to the beginning of receive"]
589    #[inline]
590    pub fn tx2rxcount(&mut self) -> _TX2RXCOUNTW {
591        _TX2RXCOUNTW { w: self }
592    }
593    #[doc = "Bit 12 - Set this bit to allow a countdown to transition in between TX and RX."]
594    #[inline]
595    pub fn entx2rxcount(&mut self) -> _ENTX2RXCOUNTW {
596        _ENTX2RXCOUNTW { w: self }
597    }
598    #[doc = "Bits 16:20 - Delay in between the detection of squelch to the reset of high-speed RX."]
599    #[inline]
600    pub fn squelchresetcount(&mut self) -> _SQUELCHRESETCOUNTW {
601        _SQUELCHRESETCOUNTW { w: self }
602    }
603    #[doc = "Bit 24 - Set bit to allow squelch to reset high-speed receive."]
604    #[inline]
605    pub fn ensquelchreset(&mut self) -> _ENSQUELCHRESETW {
606        _ENSQUELCHRESETW { w: self }
607    }
608    #[doc = "Bits 25:28 - Duration of RESET in terms of the number of 480-MHz cycles."]
609    #[inline]
610    pub fn squelchresetlength(&mut self) -> _SQUELCHRESETLENGTHW {
611        _SQUELCHRESETLENGTHW { w: self }
612    }
613    #[doc = "Bit 29 - Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND = 1."]
614    #[inline]
615    pub fn host_resume_debug(&mut self) -> _HOST_RESUME_DEBUGW {
616        _HOST_RESUME_DEBUGW { w: self }
617    }
618    #[doc = "Bit 30 - Gate Test Clocks"]
619    #[inline]
620    pub fn clkgate(&mut self) -> _CLKGATEW {
621        _CLKGATEW { w: self }
622    }
623}
k66/usbphy/debug_clr.rs

k66/usbphy/
debug_clr.rs
