1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::GENCS {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = "Possible values of the field `EOSDMEO`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum EOSDMEOR {
48 #[doc = "Do not enable the End-of-Scan DMA transfer request only. Depending on ESOR state, either Out-of-Range or End-of-Scan can trigger a DMA transfer request and interrupt."]
49 _0,
50 #[doc = "Only the End-of-Scan event can trigger a DMA transfer request. The Out-of-Range event only and always triggers an interrupt if TSIIE is set."]
51 _1,
52}
53impl EOSDMEOR {
54 #[doc = r" Returns `true` if the bit is clear (0)"]
55 #[inline]
56 pub fn bit_is_clear(&self) -> bool {
57 !self.bit()
58 }
59 #[doc = r" Returns `true` if the bit is set (1)"]
60 #[inline]
61 pub fn bit_is_set(&self) -> bool {
62 self.bit()
63 }
64 #[doc = r" Value of the field as raw bits"]
65 #[inline]
66 pub fn bit(&self) -> bool {
67 match *self {
68 EOSDMEOR::_0 => false,
69 EOSDMEOR::_1 => true,
70 }
71 }
72 #[allow(missing_docs)]
73 #[doc(hidden)]
74 #[inline]
75 pub fn _from(value: bool) -> EOSDMEOR {
76 match value {
77 false => EOSDMEOR::_0,
78 true => EOSDMEOR::_1,
79 }
80 }
81 #[doc = "Checks if the value of the field is `_0`"]
82 #[inline]
83 pub fn is_0(&self) -> bool {
84 *self == EOSDMEOR::_0
85 }
86 #[doc = "Checks if the value of the field is `_1`"]
87 #[inline]
88 pub fn is_1(&self) -> bool {
89 *self == EOSDMEOR::_1
90 }
91}
92#[doc = "Possible values of the field `CURSW`"]
93#[derive(Clone, Copy, Debug, PartialEq)]
94pub enum CURSWR {
95 #[doc = "The current source pair are not swapped."]
96 _0,
97 #[doc = "The current source pair are swapped."]
98 _1,
99}
100impl CURSWR {
101 #[doc = r" Returns `true` if the bit is clear (0)"]
102 #[inline]
103 pub fn bit_is_clear(&self) -> bool {
104 !self.bit()
105 }
106 #[doc = r" Returns `true` if the bit is set (1)"]
107 #[inline]
108 pub fn bit_is_set(&self) -> bool {
109 self.bit()
110 }
111 #[doc = r" Value of the field as raw bits"]
112 #[inline]
113 pub fn bit(&self) -> bool {
114 match *self {
115 CURSWR::_0 => false,
116 CURSWR::_1 => true,
117 }
118 }
119 #[allow(missing_docs)]
120 #[doc(hidden)]
121 #[inline]
122 pub fn _from(value: bool) -> CURSWR {
123 match value {
124 false => CURSWR::_0,
125 true => CURSWR::_1,
126 }
127 }
128 #[doc = "Checks if the value of the field is `_0`"]
129 #[inline]
130 pub fn is_0(&self) -> bool {
131 *self == CURSWR::_0
132 }
133 #[doc = "Checks if the value of the field is `_1`"]
134 #[inline]
135 pub fn is_1(&self) -> bool {
136 *self == CURSWR::_1
137 }
138}
139#[doc = "Possible values of the field `EOSF`"]
140#[derive(Clone, Copy, Debug, PartialEq)]
141pub enum EOSFR {
142 #[doc = "Scan not complete."]
143 _0,
144 #[doc = "Scan complete."]
145 _1,
146}
147impl EOSFR {
148 #[doc = r" Returns `true` if the bit is clear (0)"]
149 #[inline]
150 pub fn bit_is_clear(&self) -> bool {
151 !self.bit()
152 }
153 #[doc = r" Returns `true` if the bit is set (1)"]
154 #[inline]
155 pub fn bit_is_set(&self) -> bool {
156 self.bit()
157 }
158 #[doc = r" Value of the field as raw bits"]
159 #[inline]
160 pub fn bit(&self) -> bool {
161 match *self {
162 EOSFR::_0 => false,
163 EOSFR::_1 => true,
164 }
165 }
166 #[allow(missing_docs)]
167 #[doc(hidden)]
168 #[inline]
169 pub fn _from(value: bool) -> EOSFR {
170 match value {
171 false => EOSFR::_0,
172 true => EOSFR::_1,
173 }
174 }
175 #[doc = "Checks if the value of the field is `_0`"]
176 #[inline]
177 pub fn is_0(&self) -> bool {
178 *self == EOSFR::_0
179 }
180 #[doc = "Checks if the value of the field is `_1`"]
181 #[inline]
182 pub fn is_1(&self) -> bool {
183 *self == EOSFR::_1
184 }
185}
186#[doc = "Possible values of the field `SCNIP`"]
187#[derive(Clone, Copy, Debug, PartialEq)]
188pub enum SCNIPR {
189 #[doc = "No scan in progress."]
190 _0,
191 #[doc = "Scan in progress."]
192 _1,
193}
194impl SCNIPR {
195 #[doc = r" Returns `true` if the bit is clear (0)"]
196 #[inline]
197 pub fn bit_is_clear(&self) -> bool {
198 !self.bit()
199 }
200 #[doc = r" Returns `true` if the bit is set (1)"]
201 #[inline]
202 pub fn bit_is_set(&self) -> bool {
203 self.bit()
204 }
205 #[doc = r" Value of the field as raw bits"]
206 #[inline]
207 pub fn bit(&self) -> bool {
208 match *self {
209 SCNIPR::_0 => false,
210 SCNIPR::_1 => true,
211 }
212 }
213 #[allow(missing_docs)]
214 #[doc(hidden)]
215 #[inline]
216 pub fn _from(value: bool) -> SCNIPR {
217 match value {
218 false => SCNIPR::_0,
219 true => SCNIPR::_1,
220 }
221 }
222 #[doc = "Checks if the value of the field is `_0`"]
223 #[inline]
224 pub fn is_0(&self) -> bool {
225 *self == SCNIPR::_0
226 }
227 #[doc = "Checks if the value of the field is `_1`"]
228 #[inline]
229 pub fn is_1(&self) -> bool {
230 *self == SCNIPR::_1
231 }
232}
233#[doc = "Possible values of the field `STM`"]
234#[derive(Clone, Copy, Debug, PartialEq)]
235pub enum STMR {
236 #[doc = "Software trigger scan."]
237 _0,
238 #[doc = "Hardware trigger scan."]
239 _1,
240}
241impl STMR {
242 #[doc = r" Returns `true` if the bit is clear (0)"]
243 #[inline]
244 pub fn bit_is_clear(&self) -> bool {
245 !self.bit()
246 }
247 #[doc = r" Returns `true` if the bit is set (1)"]
248 #[inline]
249 pub fn bit_is_set(&self) -> bool {
250 self.bit()
251 }
252 #[doc = r" Value of the field as raw bits"]
253 #[inline]
254 pub fn bit(&self) -> bool {
255 match *self {
256 STMR::_0 => false,
257 STMR::_1 => true,
258 }
259 }
260 #[allow(missing_docs)]
261 #[doc(hidden)]
262 #[inline]
263 pub fn _from(value: bool) -> STMR {
264 match value {
265 false => STMR::_0,
266 true => STMR::_1,
267 }
268 }
269 #[doc = "Checks if the value of the field is `_0`"]
270 #[inline]
271 pub fn is_0(&self) -> bool {
272 *self == STMR::_0
273 }
274 #[doc = "Checks if the value of the field is `_1`"]
275 #[inline]
276 pub fn is_1(&self) -> bool {
277 *self == STMR::_1
278 }
279}
280#[doc = "Possible values of the field `STPE`"]
281#[derive(Clone, Copy, Debug, PartialEq)]
282pub enum STPER {
283 #[doc = "TSI is disabled when MCU goes into low power mode."]
284 _0,
285 #[doc = "Allows TSI to continue running in all low power modes."]
286 _1,
287}
288impl STPER {
289 #[doc = r" Returns `true` if the bit is clear (0)"]
290 #[inline]
291 pub fn bit_is_clear(&self) -> bool {
292 !self.bit()
293 }
294 #[doc = r" Returns `true` if the bit is set (1)"]
295 #[inline]
296 pub fn bit_is_set(&self) -> bool {
297 self.bit()
298 }
299 #[doc = r" Value of the field as raw bits"]
300 #[inline]
301 pub fn bit(&self) -> bool {
302 match *self {
303 STPER::_0 => false,
304 STPER::_1 => true,
305 }
306 }
307 #[allow(missing_docs)]
308 #[doc(hidden)]
309 #[inline]
310 pub fn _from(value: bool) -> STPER {
311 match value {
312 false => STPER::_0,
313 true => STPER::_1,
314 }
315 }
316 #[doc = "Checks if the value of the field is `_0`"]
317 #[inline]
318 pub fn is_0(&self) -> bool {
319 *self == STPER::_0
320 }
321 #[doc = "Checks if the value of the field is `_1`"]
322 #[inline]
323 pub fn is_1(&self) -> bool {
324 *self == STPER::_1
325 }
326}
327#[doc = "Possible values of the field `TSIIEN`"]
328#[derive(Clone, Copy, Debug, PartialEq)]
329pub enum TSIIENR {
330 #[doc = "TSI interrupt is disabled."]
331 _0,
332 #[doc = "TSI interrupt is enabled."]
333 _1,
334}
335impl TSIIENR {
336 #[doc = r" Returns `true` if the bit is clear (0)"]
337 #[inline]
338 pub fn bit_is_clear(&self) -> bool {
339 !self.bit()
340 }
341 #[doc = r" Returns `true` if the bit is set (1)"]
342 #[inline]
343 pub fn bit_is_set(&self) -> bool {
344 self.bit()
345 }
346 #[doc = r" Value of the field as raw bits"]
347 #[inline]
348 pub fn bit(&self) -> bool {
349 match *self {
350 TSIIENR::_0 => false,
351 TSIIENR::_1 => true,
352 }
353 }
354 #[allow(missing_docs)]
355 #[doc(hidden)]
356 #[inline]
357 pub fn _from(value: bool) -> TSIIENR {
358 match value {
359 false => TSIIENR::_0,
360 true => TSIIENR::_1,
361 }
362 }
363 #[doc = "Checks if the value of the field is `_0`"]
364 #[inline]
365 pub fn is_0(&self) -> bool {
366 *self == TSIIENR::_0
367 }
368 #[doc = "Checks if the value of the field is `_1`"]
369 #[inline]
370 pub fn is_1(&self) -> bool {
371 *self == TSIIENR::_1
372 }
373}
374#[doc = "Possible values of the field `TSIEN`"]
375#[derive(Clone, Copy, Debug, PartialEq)]
376pub enum TSIENR {
377 #[doc = "TSI module disabled."]
378 _0,
379 #[doc = "TSI module enabled."]
380 _1,
381}
382impl TSIENR {
383 #[doc = r" Returns `true` if the bit is clear (0)"]
384 #[inline]
385 pub fn bit_is_clear(&self) -> bool {
386 !self.bit()
387 }
388 #[doc = r" Returns `true` if the bit is set (1)"]
389 #[inline]
390 pub fn bit_is_set(&self) -> bool {
391 self.bit()
392 }
393 #[doc = r" Value of the field as raw bits"]
394 #[inline]
395 pub fn bit(&self) -> bool {
396 match *self {
397 TSIENR::_0 => false,
398 TSIENR::_1 => true,
399 }
400 }
401 #[allow(missing_docs)]
402 #[doc(hidden)]
403 #[inline]
404 pub fn _from(value: bool) -> TSIENR {
405 match value {
406 false => TSIENR::_0,
407 true => TSIENR::_1,
408 }
409 }
410 #[doc = "Checks if the value of the field is `_0`"]
411 #[inline]
412 pub fn is_0(&self) -> bool {
413 *self == TSIENR::_0
414 }
415 #[doc = "Checks if the value of the field is `_1`"]
416 #[inline]
417 pub fn is_1(&self) -> bool {
418 *self == TSIENR::_1
419 }
420}
421#[doc = "Possible values of the field `NSCN`"]
422#[derive(Clone, Copy, Debug, PartialEq)]
423pub enum NSCNR {
424 #[doc = "Once per electrode"]
425 _00000,
426 #[doc = "Twice per electrode"]
427 _00001,
428 #[doc = "3 times per electrode"]
429 _00010,
430 #[doc = "4 times per electrode"]
431 _00011,
432 #[doc = "5 times per electrode"]
433 _00100,
434 #[doc = "6 times per electrode"]
435 _00101,
436 #[doc = "7 times per electrode"]
437 _00110,
438 #[doc = "8 times per electrode"]
439 _00111,
440 #[doc = "9 times per electrode"]
441 _01000,
442 #[doc = "10 times per electrode"]
443 _01001,
444 #[doc = "11 times per electrode"]
445 _01010,
446 #[doc = "12 times per electrode"]
447 _01011,
448 #[doc = "13 times per electrode"]
449 _01100,
450 #[doc = "14 times per electrode"]
451 _01101,
452 #[doc = "15 times per electrode"]
453 _01110,
454 #[doc = "16 times per electrode"]
455 _01111,
456 #[doc = "17 times per electrode"]
457 _10000,
458 #[doc = "18 times per electrode"]
459 _10001,
460 #[doc = "19 times per electrode"]
461 _10010,
462 #[doc = "20 times per electrode"]
463 _10011,
464 #[doc = "21 times per electrode"]
465 _10100,
466 #[doc = "22 times per electrode"]
467 _10101,
468 #[doc = "23 times per electrode"]
469 _10110,
470 #[doc = "24 times per electrode"]
471 _10111,
472 #[doc = "25 times per electrode"]
473 _11000,
474 #[doc = "26 times per electrode"]
475 _11001,
476 #[doc = "27 times per electrode"]
477 _11010,
478 #[doc = "28 times per electrode"]
479 _11011,
480 #[doc = "29 times per electrode"]
481 _11100,
482 #[doc = "30 times per electrode"]
483 _11101,
484 #[doc = "31 times per electrode"]
485 _11110,
486 #[doc = "32 times per electrode"]
487 _11111,
488}
489impl NSCNR {
490 #[doc = r" Value of the field as raw bits"]
491 #[inline]
492 pub fn bits(&self) -> u8 {
493 match *self {
494 NSCNR::_00000 => 0,
495 NSCNR::_00001 => 1,
496 NSCNR::_00010 => 2,
497 NSCNR::_00011 => 3,
498 NSCNR::_00100 => 4,
499 NSCNR::_00101 => 5,
500 NSCNR::_00110 => 6,
501 NSCNR::_00111 => 7,
502 NSCNR::_01000 => 8,
503 NSCNR::_01001 => 9,
504 NSCNR::_01010 => 10,
505 NSCNR::_01011 => 11,
506 NSCNR::_01100 => 12,
507 NSCNR::_01101 => 13,
508 NSCNR::_01110 => 14,
509 NSCNR::_01111 => 15,
510 NSCNR::_10000 => 16,
511 NSCNR::_10001 => 17,
512 NSCNR::_10010 => 18,
513 NSCNR::_10011 => 19,
514 NSCNR::_10100 => 20,
515 NSCNR::_10101 => 21,
516 NSCNR::_10110 => 22,
517 NSCNR::_10111 => 23,
518 NSCNR::_11000 => 24,
519 NSCNR::_11001 => 25,
520 NSCNR::_11010 => 26,
521 NSCNR::_11011 => 27,
522 NSCNR::_11100 => 28,
523 NSCNR::_11101 => 29,
524 NSCNR::_11110 => 30,
525 NSCNR::_11111 => 31,
526 }
527 }
528 #[allow(missing_docs)]
529 #[doc(hidden)]
530 #[inline]
531 pub fn _from(value: u8) -> NSCNR {
532 match value {
533 0 => NSCNR::_00000,
534 1 => NSCNR::_00001,
535 2 => NSCNR::_00010,
536 3 => NSCNR::_00011,
537 4 => NSCNR::_00100,
538 5 => NSCNR::_00101,
539 6 => NSCNR::_00110,
540 7 => NSCNR::_00111,
541 8 => NSCNR::_01000,
542 9 => NSCNR::_01001,
543 10 => NSCNR::_01010,
544 11 => NSCNR::_01011,
545 12 => NSCNR::_01100,
546 13 => NSCNR::_01101,
547 14 => NSCNR::_01110,
548 15 => NSCNR::_01111,
549 16 => NSCNR::_10000,
550 17 => NSCNR::_10001,
551 18 => NSCNR::_10010,
552 19 => NSCNR::_10011,
553 20 => NSCNR::_10100,
554 21 => NSCNR::_10101,
555 22 => NSCNR::_10110,
556 23 => NSCNR::_10111,
557 24 => NSCNR::_11000,
558 25 => NSCNR::_11001,
559 26 => NSCNR::_11010,
560 27 => NSCNR::_11011,
561 28 => NSCNR::_11100,
562 29 => NSCNR::_11101,
563 30 => NSCNR::_11110,
564 31 => NSCNR::_11111,
565 _ => unreachable!(),
566 }
567 }
568 #[doc = "Checks if the value of the field is `_00000`"]
569 #[inline]
570 pub fn is_00000(&self) -> bool {
571 *self == NSCNR::_00000
572 }
573 #[doc = "Checks if the value of the field is `_00001`"]
574 #[inline]
575 pub fn is_00001(&self) -> bool {
576 *self == NSCNR::_00001
577 }
578 #[doc = "Checks if the value of the field is `_00010`"]
579 #[inline]
580 pub fn is_00010(&self) -> bool {
581 *self == NSCNR::_00010
582 }
583 #[doc = "Checks if the value of the field is `_00011`"]
584 #[inline]
585 pub fn is_00011(&self) -> bool {
586 *self == NSCNR::_00011
587 }
588 #[doc = "Checks if the value of the field is `_00100`"]
589 #[inline]
590 pub fn is_00100(&self) -> bool {
591 *self == NSCNR::_00100
592 }
593 #[doc = "Checks if the value of the field is `_00101`"]
594 #[inline]
595 pub fn is_00101(&self) -> bool {
596 *self == NSCNR::_00101
597 }
598 #[doc = "Checks if the value of the field is `_00110`"]
599 #[inline]
600 pub fn is_00110(&self) -> bool {
601 *self == NSCNR::_00110
602 }
603 #[doc = "Checks if the value of the field is `_00111`"]
604 #[inline]
605 pub fn is_00111(&self) -> bool {
606 *self == NSCNR::_00111
607 }
608 #[doc = "Checks if the value of the field is `_01000`"]
609 #[inline]
610 pub fn is_01000(&self) -> bool {
611 *self == NSCNR::_01000
612 }
613 #[doc = "Checks if the value of the field is `_01001`"]
614 #[inline]
615 pub fn is_01001(&self) -> bool {
616 *self == NSCNR::_01001
617 }
618 #[doc = "Checks if the value of the field is `_01010`"]
619 #[inline]
620 pub fn is_01010(&self) -> bool {
621 *self == NSCNR::_01010
622 }
623 #[doc = "Checks if the value of the field is `_01011`"]
624 #[inline]
625 pub fn is_01011(&self) -> bool {
626 *self == NSCNR::_01011
627 }
628 #[doc = "Checks if the value of the field is `_01100`"]
629 #[inline]
630 pub fn is_01100(&self) -> bool {
631 *self == NSCNR::_01100
632 }
633 #[doc = "Checks if the value of the field is `_01101`"]
634 #[inline]
635 pub fn is_01101(&self) -> bool {
636 *self == NSCNR::_01101
637 }
638 #[doc = "Checks if the value of the field is `_01110`"]
639 #[inline]
640 pub fn is_01110(&self) -> bool {
641 *self == NSCNR::_01110
642 }
643 #[doc = "Checks if the value of the field is `_01111`"]
644 #[inline]
645 pub fn is_01111(&self) -> bool {
646 *self == NSCNR::_01111
647 }
648 #[doc = "Checks if the value of the field is `_10000`"]
649 #[inline]
650 pub fn is_10000(&self) -> bool {
651 *self == NSCNR::_10000
652 }
653 #[doc = "Checks if the value of the field is `_10001`"]
654 #[inline]
655 pub fn is_10001(&self) -> bool {
656 *self == NSCNR::_10001
657 }
658 #[doc = "Checks if the value of the field is `_10010`"]
659 #[inline]
660 pub fn is_10010(&self) -> bool {
661 *self == NSCNR::_10010
662 }
663 #[doc = "Checks if the value of the field is `_10011`"]
664 #[inline]
665 pub fn is_10011(&self) -> bool {
666 *self == NSCNR::_10011
667 }
668 #[doc = "Checks if the value of the field is `_10100`"]
669 #[inline]
670 pub fn is_10100(&self) -> bool {
671 *self == NSCNR::_10100
672 }
673 #[doc = "Checks if the value of the field is `_10101`"]
674 #[inline]
675 pub fn is_10101(&self) -> bool {
676 *self == NSCNR::_10101
677 }
678 #[doc = "Checks if the value of the field is `_10110`"]
679 #[inline]
680 pub fn is_10110(&self) -> bool {
681 *self == NSCNR::_10110
682 }
683 #[doc = "Checks if the value of the field is `_10111`"]
684 #[inline]
685 pub fn is_10111(&self) -> bool {
686 *self == NSCNR::_10111
687 }
688 #[doc = "Checks if the value of the field is `_11000`"]
689 #[inline]
690 pub fn is_11000(&self) -> bool {
691 *self == NSCNR::_11000
692 }
693 #[doc = "Checks if the value of the field is `_11001`"]
694 #[inline]
695 pub fn is_11001(&self) -> bool {
696 *self == NSCNR::_11001
697 }
698 #[doc = "Checks if the value of the field is `_11010`"]
699 #[inline]
700 pub fn is_11010(&self) -> bool {
701 *self == NSCNR::_11010
702 }
703 #[doc = "Checks if the value of the field is `_11011`"]
704 #[inline]
705 pub fn is_11011(&self) -> bool {
706 *self == NSCNR::_11011
707 }
708 #[doc = "Checks if the value of the field is `_11100`"]
709 #[inline]
710 pub fn is_11100(&self) -> bool {
711 *self == NSCNR::_11100
712 }
713 #[doc = "Checks if the value of the field is `_11101`"]
714 #[inline]
715 pub fn is_11101(&self) -> bool {
716 *self == NSCNR::_11101
717 }
718 #[doc = "Checks if the value of the field is `_11110`"]
719 #[inline]
720 pub fn is_11110(&self) -> bool {
721 *self == NSCNR::_11110
722 }
723 #[doc = "Checks if the value of the field is `_11111`"]
724 #[inline]
725 pub fn is_11111(&self) -> bool {
726 *self == NSCNR::_11111
727 }
728}
729#[doc = "Possible values of the field `PS`"]
730#[derive(Clone, Copy, Debug, PartialEq)]
731pub enum PSR {
732 #[doc = "Electrode Oscillator Frequency divided by 1"]
733 _000,
734 #[doc = "Electrode Oscillator Frequency divided by 2"]
735 _001,
736 #[doc = "Electrode Oscillator Frequency divided by 4"]
737 _010,
738 #[doc = "Electrode Oscillator Frequency divided by 8"]
739 _011,
740 #[doc = "Electrode Oscillator Frequency divided by 16"]
741 _100,
742 #[doc = "Electrode Oscillator Frequency divided by 32"]
743 _101,
744 #[doc = "Electrode Oscillator Frequency divided by 64"]
745 _110,
746 #[doc = "Electrode Oscillator Frequency divided by 128"]
747 _111,
748}
749impl PSR {
750 #[doc = r" Value of the field as raw bits"]
751 #[inline]
752 pub fn bits(&self) -> u8 {
753 match *self {
754 PSR::_000 => 0,
755 PSR::_001 => 1,
756 PSR::_010 => 2,
757 PSR::_011 => 3,
758 PSR::_100 => 4,
759 PSR::_101 => 5,
760 PSR::_110 => 6,
761 PSR::_111 => 7,
762 }
763 }
764 #[allow(missing_docs)]
765 #[doc(hidden)]
766 #[inline]
767 pub fn _from(value: u8) -> PSR {
768 match value {
769 0 => PSR::_000,
770 1 => PSR::_001,
771 2 => PSR::_010,
772 3 => PSR::_011,
773 4 => PSR::_100,
774 5 => PSR::_101,
775 6 => PSR::_110,
776 7 => PSR::_111,
777 _ => unreachable!(),
778 }
779 }
780 #[doc = "Checks if the value of the field is `_000`"]
781 #[inline]
782 pub fn is_000(&self) -> bool {
783 *self == PSR::_000
784 }
785 #[doc = "Checks if the value of the field is `_001`"]
786 #[inline]
787 pub fn is_001(&self) -> bool {
788 *self == PSR::_001
789 }
790 #[doc = "Checks if the value of the field is `_010`"]
791 #[inline]
792 pub fn is_010(&self) -> bool {
793 *self == PSR::_010
794 }
795 #[doc = "Checks if the value of the field is `_011`"]
796 #[inline]
797 pub fn is_011(&self) -> bool {
798 *self == PSR::_011
799 }
800 #[doc = "Checks if the value of the field is `_100`"]
801 #[inline]
802 pub fn is_100(&self) -> bool {
803 *self == PSR::_100
804 }
805 #[doc = "Checks if the value of the field is `_101`"]
806 #[inline]
807 pub fn is_101(&self) -> bool {
808 *self == PSR::_101
809 }
810 #[doc = "Checks if the value of the field is `_110`"]
811 #[inline]
812 pub fn is_110(&self) -> bool {
813 *self == PSR::_110
814 }
815 #[doc = "Checks if the value of the field is `_111`"]
816 #[inline]
817 pub fn is_111(&self) -> bool {
818 *self == PSR::_111
819 }
820}
821#[doc = "Possible values of the field `EXTCHRG`"]
822#[derive(Clone, Copy, Debug, PartialEq)]
823pub enum EXTCHRGR {
824 #[doc = "500 nA."]
825 _000,
826 #[doc = "1 uA."]
827 _001,
828 #[doc = "2 uA."]
829 _010,
830 #[doc = "4 uA."]
831 _011,
832 #[doc = "8 uA."]
833 _100,
834 #[doc = "16 uA."]
835 _101,
836 #[doc = "32 uA."]
837 _110,
838 #[doc = "64 uA."]
839 _111,
840}
841impl EXTCHRGR {
842 #[doc = r" Value of the field as raw bits"]
843 #[inline]
844 pub fn bits(&self) -> u8 {
845 match *self {
846 EXTCHRGR::_000 => 0,
847 EXTCHRGR::_001 => 1,
848 EXTCHRGR::_010 => 2,
849 EXTCHRGR::_011 => 3,
850 EXTCHRGR::_100 => 4,
851 EXTCHRGR::_101 => 5,
852 EXTCHRGR::_110 => 6,
853 EXTCHRGR::_111 => 7,
854 }
855 }
856 #[allow(missing_docs)]
857 #[doc(hidden)]
858 #[inline]
859 pub fn _from(value: u8) -> EXTCHRGR {
860 match value {
861 0 => EXTCHRGR::_000,
862 1 => EXTCHRGR::_001,
863 2 => EXTCHRGR::_010,
864 3 => EXTCHRGR::_011,
865 4 => EXTCHRGR::_100,
866 5 => EXTCHRGR::_101,
867 6 => EXTCHRGR::_110,
868 7 => EXTCHRGR::_111,
869 _ => unreachable!(),
870 }
871 }
872 #[doc = "Checks if the value of the field is `_000`"]
873 #[inline]
874 pub fn is_000(&self) -> bool {
875 *self == EXTCHRGR::_000
876 }
877 #[doc = "Checks if the value of the field is `_001`"]
878 #[inline]
879 pub fn is_001(&self) -> bool {
880 *self == EXTCHRGR::_001
881 }
882 #[doc = "Checks if the value of the field is `_010`"]
883 #[inline]
884 pub fn is_010(&self) -> bool {
885 *self == EXTCHRGR::_010
886 }
887 #[doc = "Checks if the value of the field is `_011`"]
888 #[inline]
889 pub fn is_011(&self) -> bool {
890 *self == EXTCHRGR::_011
891 }
892 #[doc = "Checks if the value of the field is `_100`"]
893 #[inline]
894 pub fn is_100(&self) -> bool {
895 *self == EXTCHRGR::_100
896 }
897 #[doc = "Checks if the value of the field is `_101`"]
898 #[inline]
899 pub fn is_101(&self) -> bool {
900 *self == EXTCHRGR::_101
901 }
902 #[doc = "Checks if the value of the field is `_110`"]
903 #[inline]
904 pub fn is_110(&self) -> bool {
905 *self == EXTCHRGR::_110
906 }
907 #[doc = "Checks if the value of the field is `_111`"]
908 #[inline]
909 pub fn is_111(&self) -> bool {
910 *self == EXTCHRGR::_111
911 }
912}
913#[doc = "Possible values of the field `DVOLT`"]
914#[derive(Clone, Copy, Debug, PartialEq)]
915pub enum DVOLTR {
916 #[doc = "DV = 1.026 V; VP = 1.328 V; Vm = 0.302 V."]
917 _00,
918 #[doc = "DV = 0.592 V; VP = 1.111 V; Vm = 0.519 V."]
919 _01,
920 #[doc = "DV = 0.342 V; VP = 0.986 V; Vm = 0.644 V."]
921 _10,
922 #[doc = "DV = 0.197 V; VP = 0.914 V; Vm = 0.716 V."]
923 _11,
924}
925impl DVOLTR {
926 #[doc = r" Value of the field as raw bits"]
927 #[inline]
928 pub fn bits(&self) -> u8 {
929 match *self {
930 DVOLTR::_00 => 0,
931 DVOLTR::_01 => 1,
932 DVOLTR::_10 => 2,
933 DVOLTR::_11 => 3,
934 }
935 }
936 #[allow(missing_docs)]
937 #[doc(hidden)]
938 #[inline]
939 pub fn _from(value: u8) -> DVOLTR {
940 match value {
941 0 => DVOLTR::_00,
942 1 => DVOLTR::_01,
943 2 => DVOLTR::_10,
944 3 => DVOLTR::_11,
945 _ => unreachable!(),
946 }
947 }
948 #[doc = "Checks if the value of the field is `_00`"]
949 #[inline]
950 pub fn is_00(&self) -> bool {
951 *self == DVOLTR::_00
952 }
953 #[doc = "Checks if the value of the field is `_01`"]
954 #[inline]
955 pub fn is_01(&self) -> bool {
956 *self == DVOLTR::_01
957 }
958 #[doc = "Checks if the value of the field is `_10`"]
959 #[inline]
960 pub fn is_10(&self) -> bool {
961 *self == DVOLTR::_10
962 }
963 #[doc = "Checks if the value of the field is `_11`"]
964 #[inline]
965 pub fn is_11(&self) -> bool {
966 *self == DVOLTR::_11
967 }
968}
969#[doc = "Possible values of the field `REFCHRG`"]
970#[derive(Clone, Copy, Debug, PartialEq)]
971pub enum REFCHRGR {
972 #[doc = "500 nA."]
973 _000,
974 #[doc = "1 uA."]
975 _001,
976 #[doc = "2 uA."]
977 _010,
978 #[doc = "4 uA."]
979 _011,
980 #[doc = "8 uA."]
981 _100,
982 #[doc = "16 uA."]
983 _101,
984 #[doc = "32 uA."]
985 _110,
986 #[doc = "64 uA."]
987 _111,
988}
989impl REFCHRGR {
990 #[doc = r" Value of the field as raw bits"]
991 #[inline]
992 pub fn bits(&self) -> u8 {
993 match *self {
994 REFCHRGR::_000 => 0,
995 REFCHRGR::_001 => 1,
996 REFCHRGR::_010 => 2,
997 REFCHRGR::_011 => 3,
998 REFCHRGR::_100 => 4,
999 REFCHRGR::_101 => 5,
1000 REFCHRGR::_110 => 6,
1001 REFCHRGR::_111 => 7,
1002 }
1003 }
1004 #[allow(missing_docs)]
1005 #[doc(hidden)]
1006 #[inline]
1007 pub fn _from(value: u8) -> REFCHRGR {
1008 match value {
1009 0 => REFCHRGR::_000,
1010 1 => REFCHRGR::_001,
1011 2 => REFCHRGR::_010,
1012 3 => REFCHRGR::_011,
1013 4 => REFCHRGR::_100,
1014 5 => REFCHRGR::_101,
1015 6 => REFCHRGR::_110,
1016 7 => REFCHRGR::_111,
1017 _ => unreachable!(),
1018 }
1019 }
1020 #[doc = "Checks if the value of the field is `_000`"]
1021 #[inline]
1022 pub fn is_000(&self) -> bool {
1023 *self == REFCHRGR::_000
1024 }
1025 #[doc = "Checks if the value of the field is `_001`"]
1026 #[inline]
1027 pub fn is_001(&self) -> bool {
1028 *self == REFCHRGR::_001
1029 }
1030 #[doc = "Checks if the value of the field is `_010`"]
1031 #[inline]
1032 pub fn is_010(&self) -> bool {
1033 *self == REFCHRGR::_010
1034 }
1035 #[doc = "Checks if the value of the field is `_011`"]
1036 #[inline]
1037 pub fn is_011(&self) -> bool {
1038 *self == REFCHRGR::_011
1039 }
1040 #[doc = "Checks if the value of the field is `_100`"]
1041 #[inline]
1042 pub fn is_100(&self) -> bool {
1043 *self == REFCHRGR::_100
1044 }
1045 #[doc = "Checks if the value of the field is `_101`"]
1046 #[inline]
1047 pub fn is_101(&self) -> bool {
1048 *self == REFCHRGR::_101
1049 }
1050 #[doc = "Checks if the value of the field is `_110`"]
1051 #[inline]
1052 pub fn is_110(&self) -> bool {
1053 *self == REFCHRGR::_110
1054 }
1055 #[doc = "Checks if the value of the field is `_111`"]
1056 #[inline]
1057 pub fn is_111(&self) -> bool {
1058 *self == REFCHRGR::_111
1059 }
1060}
1061#[doc = "Possible values of the field `MODE`"]
1062#[derive(Clone, Copy, Debug, PartialEq)]
1063pub enum MODER {
1064 #[doc = "Set TSI in capacitive sensing(non-noise detection) mode."]
1065 _0000,
1066 #[doc = "Set TSI analog to work in single threshold noise detection mode and the frequency limitation circuit is disabled."]
1067 _0100,
1068 #[doc = "Set TSI analog to work in single threshold noise detection mode and the frequency limitation circuit is enabled to work in higher frequencies operations."]
1069 _1000,
1070 #[doc = "Set TSI analog to work in automatic noise detection mode."]
1071 _1100,
1072 #[doc = r" Reserved"]
1073 _Reserved(u8),
1074}
1075impl MODER {
1076 #[doc = r" Value of the field as raw bits"]
1077 #[inline]
1078 pub fn bits(&self) -> u8 {
1079 match *self {
1080 MODER::_0000 => 0,
1081 MODER::_0100 => 4,
1082 MODER::_1000 => 8,
1083 MODER::_1100 => 12,
1084 MODER::_Reserved(bits) => bits,
1085 }
1086 }
1087 #[allow(missing_docs)]
1088 #[doc(hidden)]
1089 #[inline]
1090 pub fn _from(value: u8) -> MODER {
1091 match value {
1092 0 => MODER::_0000,
1093 4 => MODER::_0100,
1094 8 => MODER::_1000,
1095 12 => MODER::_1100,
1096 i => MODER::_Reserved(i),
1097 }
1098 }
1099 #[doc = "Checks if the value of the field is `_0000`"]
1100 #[inline]
1101 pub fn is_0000(&self) -> bool {
1102 *self == MODER::_0000
1103 }
1104 #[doc = "Checks if the value of the field is `_0100`"]
1105 #[inline]
1106 pub fn is_0100(&self) -> bool {
1107 *self == MODER::_0100
1108 }
1109 #[doc = "Checks if the value of the field is `_1000`"]
1110 #[inline]
1111 pub fn is_1000(&self) -> bool {
1112 *self == MODER::_1000
1113 }
1114 #[doc = "Checks if the value of the field is `_1100`"]
1115 #[inline]
1116 pub fn is_1100(&self) -> bool {
1117 *self == MODER::_1100
1118 }
1119}
1120#[doc = "Possible values of the field `ESOR`"]
1121#[derive(Clone, Copy, Debug, PartialEq)]
1122pub enum ESORR {
1123 #[doc = "Out-of-range interrupt is allowed."]
1124 _0,
1125 #[doc = "End-of-scan interrupt is allowed."]
1126 _1,
1127}
1128impl ESORR {
1129 #[doc = r" Returns `true` if the bit is clear (0)"]
1130 #[inline]
1131 pub fn bit_is_clear(&self) -> bool {
1132 !self.bit()
1133 }
1134 #[doc = r" Returns `true` if the bit is set (1)"]
1135 #[inline]
1136 pub fn bit_is_set(&self) -> bool {
1137 self.bit()
1138 }
1139 #[doc = r" Value of the field as raw bits"]
1140 #[inline]
1141 pub fn bit(&self) -> bool {
1142 match *self {
1143 ESORR::_0 => false,
1144 ESORR::_1 => true,
1145 }
1146 }
1147 #[allow(missing_docs)]
1148 #[doc(hidden)]
1149 #[inline]
1150 pub fn _from(value: bool) -> ESORR {
1151 match value {
1152 false => ESORR::_0,
1153 true => ESORR::_1,
1154 }
1155 }
1156 #[doc = "Checks if the value of the field is `_0`"]
1157 #[inline]
1158 pub fn is_0(&self) -> bool {
1159 *self == ESORR::_0
1160 }
1161 #[doc = "Checks if the value of the field is `_1`"]
1162 #[inline]
1163 pub fn is_1(&self) -> bool {
1164 *self == ESORR::_1
1165 }
1166}
1167#[doc = r" Value of the field"]
1168pub struct OUTRGFR {
1169 bits: bool,
1170}
1171impl OUTRGFR {
1172 #[doc = r" Value of the field as raw bits"]
1173 #[inline]
1174 pub fn bit(&self) -> bool {
1175 self.bits
1176 }
1177 #[doc = r" Returns `true` if the bit is clear (0)"]
1178 #[inline]
1179 pub fn bit_is_clear(&self) -> bool {
1180 !self.bit()
1181 }
1182 #[doc = r" Returns `true` if the bit is set (1)"]
1183 #[inline]
1184 pub fn bit_is_set(&self) -> bool {
1185 self.bit()
1186 }
1187}
1188#[doc = "Values that can be written to the field `EOSDMEO`"]
1189pub enum EOSDMEOW {
1190 #[doc = "Do not enable the End-of-Scan DMA transfer request only. Depending on ESOR state, either Out-of-Range or End-of-Scan can trigger a DMA transfer request and interrupt."]
1191 _0,
1192 #[doc = "Only the End-of-Scan event can trigger a DMA transfer request. The Out-of-Range event only and always triggers an interrupt if TSIIE is set."]
1193 _1,
1194}
1195impl EOSDMEOW {
1196 #[allow(missing_docs)]
1197 #[doc(hidden)]
1198 #[inline]
1199 pub fn _bits(&self) -> bool {
1200 match *self {
1201 EOSDMEOW::_0 => false,
1202 EOSDMEOW::_1 => true,
1203 }
1204 }
1205}
1206#[doc = r" Proxy"]
1207pub struct _EOSDMEOW<'a> {
1208 w: &'a mut W,
1209}
1210impl<'a> _EOSDMEOW<'a> {
1211 #[doc = r" Writes `variant` to the field"]
1212 #[inline]
1213 pub fn variant(self, variant: EOSDMEOW) -> &'a mut W {
1214 {
1215 self.bit(variant._bits())
1216 }
1217 }
1218 #[doc = "Do not enable the End-of-Scan DMA transfer request only. Depending on ESOR state, either Out-of-Range or End-of-Scan can trigger a DMA transfer request and interrupt."]
1219 #[inline]
1220 pub fn _0(self) -> &'a mut W {
1221 self.variant(EOSDMEOW::_0)
1222 }
1223 #[doc = "Only the End-of-Scan event can trigger a DMA transfer request. The Out-of-Range event only and always triggers an interrupt if TSIIE is set."]
1224 #[inline]
1225 pub fn _1(self) -> &'a mut W {
1226 self.variant(EOSDMEOW::_1)
1227 }
1228 #[doc = r" Sets the field bit"]
1229 pub fn set_bit(self) -> &'a mut W {
1230 self.bit(true)
1231 }
1232 #[doc = r" Clears the field bit"]
1233 pub fn clear_bit(self) -> &'a mut W {
1234 self.bit(false)
1235 }
1236 #[doc = r" Writes raw bits to the field"]
1237 #[inline]
1238 pub fn bit(self, value: bool) -> &'a mut W {
1239 const MASK: bool = true;
1240 const OFFSET: u8 = 0;
1241 self.w.bits &= !((MASK as u32) << OFFSET);
1242 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1243 self.w
1244 }
1245}
1246#[doc = "Values that can be written to the field `CURSW`"]
1247pub enum CURSWW {
1248 #[doc = "The current source pair are not swapped."]
1249 _0,
1250 #[doc = "The current source pair are swapped."]
1251 _1,
1252}
1253impl CURSWW {
1254 #[allow(missing_docs)]
1255 #[doc(hidden)]
1256 #[inline]
1257 pub fn _bits(&self) -> bool {
1258 match *self {
1259 CURSWW::_0 => false,
1260 CURSWW::_1 => true,
1261 }
1262 }
1263}
1264#[doc = r" Proxy"]
1265pub struct _CURSWW<'a> {
1266 w: &'a mut W,
1267}
1268impl<'a> _CURSWW<'a> {
1269 #[doc = r" Writes `variant` to the field"]
1270 #[inline]
1271 pub fn variant(self, variant: CURSWW) -> &'a mut W {
1272 {
1273 self.bit(variant._bits())
1274 }
1275 }
1276 #[doc = "The current source pair are not swapped."]
1277 #[inline]
1278 pub fn _0(self) -> &'a mut W {
1279 self.variant(CURSWW::_0)
1280 }
1281 #[doc = "The current source pair are swapped."]
1282 #[inline]
1283 pub fn _1(self) -> &'a mut W {
1284 self.variant(CURSWW::_1)
1285 }
1286 #[doc = r" Sets the field bit"]
1287 pub fn set_bit(self) -> &'a mut W {
1288 self.bit(true)
1289 }
1290 #[doc = r" Clears the field bit"]
1291 pub fn clear_bit(self) -> &'a mut W {
1292 self.bit(false)
1293 }
1294 #[doc = r" Writes raw bits to the field"]
1295 #[inline]
1296 pub fn bit(self, value: bool) -> &'a mut W {
1297 const MASK: bool = true;
1298 const OFFSET: u8 = 1;
1299 self.w.bits &= !((MASK as u32) << OFFSET);
1300 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1301 self.w
1302 }
1303}
1304#[doc = "Values that can be written to the field `EOSF`"]
1305pub enum EOSFW {
1306 #[doc = "Scan not complete."]
1307 _0,
1308 #[doc = "Scan complete."]
1309 _1,
1310}
1311impl EOSFW {
1312 #[allow(missing_docs)]
1313 #[doc(hidden)]
1314 #[inline]
1315 pub fn _bits(&self) -> bool {
1316 match *self {
1317 EOSFW::_0 => false,
1318 EOSFW::_1 => true,
1319 }
1320 }
1321}
1322#[doc = r" Proxy"]
1323pub struct _EOSFW<'a> {
1324 w: &'a mut W,
1325}
1326impl<'a> _EOSFW<'a> {
1327 #[doc = r" Writes `variant` to the field"]
1328 #[inline]
1329 pub fn variant(self, variant: EOSFW) -> &'a mut W {
1330 {
1331 self.bit(variant._bits())
1332 }
1333 }
1334 #[doc = "Scan not complete."]
1335 #[inline]
1336 pub fn _0(self) -> &'a mut W {
1337 self.variant(EOSFW::_0)
1338 }
1339 #[doc = "Scan complete."]
1340 #[inline]
1341 pub fn _1(self) -> &'a mut W {
1342 self.variant(EOSFW::_1)
1343 }
1344 #[doc = r" Sets the field bit"]
1345 pub fn set_bit(self) -> &'a mut W {
1346 self.bit(true)
1347 }
1348 #[doc = r" Clears the field bit"]
1349 pub fn clear_bit(self) -> &'a mut W {
1350 self.bit(false)
1351 }
1352 #[doc = r" Writes raw bits to the field"]
1353 #[inline]
1354 pub fn bit(self, value: bool) -> &'a mut W {
1355 const MASK: bool = true;
1356 const OFFSET: u8 = 2;
1357 self.w.bits &= !((MASK as u32) << OFFSET);
1358 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1359 self.w
1360 }
1361}
1362#[doc = "Values that can be written to the field `STM`"]
1363pub enum STMW {
1364 #[doc = "Software trigger scan."]
1365 _0,
1366 #[doc = "Hardware trigger scan."]
1367 _1,
1368}
1369impl STMW {
1370 #[allow(missing_docs)]
1371 #[doc(hidden)]
1372 #[inline]
1373 pub fn _bits(&self) -> bool {
1374 match *self {
1375 STMW::_0 => false,
1376 STMW::_1 => true,
1377 }
1378 }
1379}
1380#[doc = r" Proxy"]
1381pub struct _STMW<'a> {
1382 w: &'a mut W,
1383}
1384impl<'a> _STMW<'a> {
1385 #[doc = r" Writes `variant` to the field"]
1386 #[inline]
1387 pub fn variant(self, variant: STMW) -> &'a mut W {
1388 {
1389 self.bit(variant._bits())
1390 }
1391 }
1392 #[doc = "Software trigger scan."]
1393 #[inline]
1394 pub fn _0(self) -> &'a mut W {
1395 self.variant(STMW::_0)
1396 }
1397 #[doc = "Hardware trigger scan."]
1398 #[inline]
1399 pub fn _1(self) -> &'a mut W {
1400 self.variant(STMW::_1)
1401 }
1402 #[doc = r" Sets the field bit"]
1403 pub fn set_bit(self) -> &'a mut W {
1404 self.bit(true)
1405 }
1406 #[doc = r" Clears the field bit"]
1407 pub fn clear_bit(self) -> &'a mut W {
1408 self.bit(false)
1409 }
1410 #[doc = r" Writes raw bits to the field"]
1411 #[inline]
1412 pub fn bit(self, value: bool) -> &'a mut W {
1413 const MASK: bool = true;
1414 const OFFSET: u8 = 4;
1415 self.w.bits &= !((MASK as u32) << OFFSET);
1416 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1417 self.w
1418 }
1419}
1420#[doc = "Values that can be written to the field `STPE`"]
1421pub enum STPEW {
1422 #[doc = "TSI is disabled when MCU goes into low power mode."]
1423 _0,
1424 #[doc = "Allows TSI to continue running in all low power modes."]
1425 _1,
1426}
1427impl STPEW {
1428 #[allow(missing_docs)]
1429 #[doc(hidden)]
1430 #[inline]
1431 pub fn _bits(&self) -> bool {
1432 match *self {
1433 STPEW::_0 => false,
1434 STPEW::_1 => true,
1435 }
1436 }
1437}
1438#[doc = r" Proxy"]
1439pub struct _STPEW<'a> {
1440 w: &'a mut W,
1441}
1442impl<'a> _STPEW<'a> {
1443 #[doc = r" Writes `variant` to the field"]
1444 #[inline]
1445 pub fn variant(self, variant: STPEW) -> &'a mut W {
1446 {
1447 self.bit(variant._bits())
1448 }
1449 }
1450 #[doc = "TSI is disabled when MCU goes into low power mode."]
1451 #[inline]
1452 pub fn _0(self) -> &'a mut W {
1453 self.variant(STPEW::_0)
1454 }
1455 #[doc = "Allows TSI to continue running in all low power modes."]
1456 #[inline]
1457 pub fn _1(self) -> &'a mut W {
1458 self.variant(STPEW::_1)
1459 }
1460 #[doc = r" Sets the field bit"]
1461 pub fn set_bit(self) -> &'a mut W {
1462 self.bit(true)
1463 }
1464 #[doc = r" Clears the field bit"]
1465 pub fn clear_bit(self) -> &'a mut W {
1466 self.bit(false)
1467 }
1468 #[doc = r" Writes raw bits to the field"]
1469 #[inline]
1470 pub fn bit(self, value: bool) -> &'a mut W {
1471 const MASK: bool = true;
1472 const OFFSET: u8 = 5;
1473 self.w.bits &= !((MASK as u32) << OFFSET);
1474 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1475 self.w
1476 }
1477}
1478#[doc = "Values that can be written to the field `TSIIEN`"]
1479pub enum TSIIENW {
1480 #[doc = "TSI interrupt is disabled."]
1481 _0,
1482 #[doc = "TSI interrupt is enabled."]
1483 _1,
1484}
1485impl TSIIENW {
1486 #[allow(missing_docs)]
1487 #[doc(hidden)]
1488 #[inline]
1489 pub fn _bits(&self) -> bool {
1490 match *self {
1491 TSIIENW::_0 => false,
1492 TSIIENW::_1 => true,
1493 }
1494 }
1495}
1496#[doc = r" Proxy"]
1497pub struct _TSIIENW<'a> {
1498 w: &'a mut W,
1499}
1500impl<'a> _TSIIENW<'a> {
1501 #[doc = r" Writes `variant` to the field"]
1502 #[inline]
1503 pub fn variant(self, variant: TSIIENW) -> &'a mut W {
1504 {
1505 self.bit(variant._bits())
1506 }
1507 }
1508 #[doc = "TSI interrupt is disabled."]
1509 #[inline]
1510 pub fn _0(self) -> &'a mut W {
1511 self.variant(TSIIENW::_0)
1512 }
1513 #[doc = "TSI interrupt is enabled."]
1514 #[inline]
1515 pub fn _1(self) -> &'a mut W {
1516 self.variant(TSIIENW::_1)
1517 }
1518 #[doc = r" Sets the field bit"]
1519 pub fn set_bit(self) -> &'a mut W {
1520 self.bit(true)
1521 }
1522 #[doc = r" Clears the field bit"]
1523 pub fn clear_bit(self) -> &'a mut W {
1524 self.bit(false)
1525 }
1526 #[doc = r" Writes raw bits to the field"]
1527 #[inline]
1528 pub fn bit(self, value: bool) -> &'a mut W {
1529 const MASK: bool = true;
1530 const OFFSET: u8 = 6;
1531 self.w.bits &= !((MASK as u32) << OFFSET);
1532 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1533 self.w
1534 }
1535}
1536#[doc = "Values that can be written to the field `TSIEN`"]
1537pub enum TSIENW {
1538 #[doc = "TSI module disabled."]
1539 _0,
1540 #[doc = "TSI module enabled."]
1541 _1,
1542}
1543impl TSIENW {
1544 #[allow(missing_docs)]
1545 #[doc(hidden)]
1546 #[inline]
1547 pub fn _bits(&self) -> bool {
1548 match *self {
1549 TSIENW::_0 => false,
1550 TSIENW::_1 => true,
1551 }
1552 }
1553}
1554#[doc = r" Proxy"]
1555pub struct _TSIENW<'a> {
1556 w: &'a mut W,
1557}
1558impl<'a> _TSIENW<'a> {
1559 #[doc = r" Writes `variant` to the field"]
1560 #[inline]
1561 pub fn variant(self, variant: TSIENW) -> &'a mut W {
1562 {
1563 self.bit(variant._bits())
1564 }
1565 }
1566 #[doc = "TSI module disabled."]
1567 #[inline]
1568 pub fn _0(self) -> &'a mut W {
1569 self.variant(TSIENW::_0)
1570 }
1571 #[doc = "TSI module enabled."]
1572 #[inline]
1573 pub fn _1(self) -> &'a mut W {
1574 self.variant(TSIENW::_1)
1575 }
1576 #[doc = r" Sets the field bit"]
1577 pub fn set_bit(self) -> &'a mut W {
1578 self.bit(true)
1579 }
1580 #[doc = r" Clears the field bit"]
1581 pub fn clear_bit(self) -> &'a mut W {
1582 self.bit(false)
1583 }
1584 #[doc = r" Writes raw bits to the field"]
1585 #[inline]
1586 pub fn bit(self, value: bool) -> &'a mut W {
1587 const MASK: bool = true;
1588 const OFFSET: u8 = 7;
1589 self.w.bits &= !((MASK as u32) << OFFSET);
1590 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1591 self.w
1592 }
1593}
1594#[doc = "Values that can be written to the field `NSCN`"]
1595pub enum NSCNW {
1596 #[doc = "Once per electrode"]
1597 _00000,
1598 #[doc = "Twice per electrode"]
1599 _00001,
1600 #[doc = "3 times per electrode"]
1601 _00010,
1602 #[doc = "4 times per electrode"]
1603 _00011,
1604 #[doc = "5 times per electrode"]
1605 _00100,
1606 #[doc = "6 times per electrode"]
1607 _00101,
1608 #[doc = "7 times per electrode"]
1609 _00110,
1610 #[doc = "8 times per electrode"]
1611 _00111,
1612 #[doc = "9 times per electrode"]
1613 _01000,
1614 #[doc = "10 times per electrode"]
1615 _01001,
1616 #[doc = "11 times per electrode"]
1617 _01010,
1618 #[doc = "12 times per electrode"]
1619 _01011,
1620 #[doc = "13 times per electrode"]
1621 _01100,
1622 #[doc = "14 times per electrode"]
1623 _01101,
1624 #[doc = "15 times per electrode"]
1625 _01110,
1626 #[doc = "16 times per electrode"]
1627 _01111,
1628 #[doc = "17 times per electrode"]
1629 _10000,
1630 #[doc = "18 times per electrode"]
1631 _10001,
1632 #[doc = "19 times per electrode"]
1633 _10010,
1634 #[doc = "20 times per electrode"]
1635 _10011,
1636 #[doc = "21 times per electrode"]
1637 _10100,
1638 #[doc = "22 times per electrode"]
1639 _10101,
1640 #[doc = "23 times per electrode"]
1641 _10110,
1642 #[doc = "24 times per electrode"]
1643 _10111,
1644 #[doc = "25 times per electrode"]
1645 _11000,
1646 #[doc = "26 times per electrode"]
1647 _11001,
1648 #[doc = "27 times per electrode"]
1649 _11010,
1650 #[doc = "28 times per electrode"]
1651 _11011,
1652 #[doc = "29 times per electrode"]
1653 _11100,
1654 #[doc = "30 times per electrode"]
1655 _11101,
1656 #[doc = "31 times per electrode"]
1657 _11110,
1658 #[doc = "32 times per electrode"]
1659 _11111,
1660}
1661impl NSCNW {
1662 #[allow(missing_docs)]
1663 #[doc(hidden)]
1664 #[inline]
1665 pub fn _bits(&self) -> u8 {
1666 match *self {
1667 NSCNW::_00000 => 0,
1668 NSCNW::_00001 => 1,
1669 NSCNW::_00010 => 2,
1670 NSCNW::_00011 => 3,
1671 NSCNW::_00100 => 4,
1672 NSCNW::_00101 => 5,
1673 NSCNW::_00110 => 6,
1674 NSCNW::_00111 => 7,
1675 NSCNW::_01000 => 8,
1676 NSCNW::_01001 => 9,
1677 NSCNW::_01010 => 10,
1678 NSCNW::_01011 => 11,
1679 NSCNW::_01100 => 12,
1680 NSCNW::_01101 => 13,
1681 NSCNW::_01110 => 14,
1682 NSCNW::_01111 => 15,
1683 NSCNW::_10000 => 16,
1684 NSCNW::_10001 => 17,
1685 NSCNW::_10010 => 18,
1686 NSCNW::_10011 => 19,
1687 NSCNW::_10100 => 20,
1688 NSCNW::_10101 => 21,
1689 NSCNW::_10110 => 22,
1690 NSCNW::_10111 => 23,
1691 NSCNW::_11000 => 24,
1692 NSCNW::_11001 => 25,
1693 NSCNW::_11010 => 26,
1694 NSCNW::_11011 => 27,
1695 NSCNW::_11100 => 28,
1696 NSCNW::_11101 => 29,
1697 NSCNW::_11110 => 30,
1698 NSCNW::_11111 => 31,
1699 }
1700 }
1701}
1702#[doc = r" Proxy"]
1703pub struct _NSCNW<'a> {
1704 w: &'a mut W,
1705}
1706impl<'a> _NSCNW<'a> {
1707 #[doc = r" Writes `variant` to the field"]
1708 #[inline]
1709 pub fn variant(self, variant: NSCNW) -> &'a mut W {
1710 {
1711 self.bits(variant._bits())
1712 }
1713 }
1714 #[doc = "Once per electrode"]
1715 #[inline]
1716 pub fn _00000(self) -> &'a mut W {
1717 self.variant(NSCNW::_00000)
1718 }
1719 #[doc = "Twice per electrode"]
1720 #[inline]
1721 pub fn _00001(self) -> &'a mut W {
1722 self.variant(NSCNW::_00001)
1723 }
1724 #[doc = "3 times per electrode"]
1725 #[inline]
1726 pub fn _00010(self) -> &'a mut W {
1727 self.variant(NSCNW::_00010)
1728 }
1729 #[doc = "4 times per electrode"]
1730 #[inline]
1731 pub fn _00011(self) -> &'a mut W {
1732 self.variant(NSCNW::_00011)
1733 }
1734 #[doc = "5 times per electrode"]
1735 #[inline]
1736 pub fn _00100(self) -> &'a mut W {
1737 self.variant(NSCNW::_00100)
1738 }
1739 #[doc = "6 times per electrode"]
1740 #[inline]
1741 pub fn _00101(self) -> &'a mut W {
1742 self.variant(NSCNW::_00101)
1743 }
1744 #[doc = "7 times per electrode"]
1745 #[inline]
1746 pub fn _00110(self) -> &'a mut W {
1747 self.variant(NSCNW::_00110)
1748 }
1749 #[doc = "8 times per electrode"]
1750 #[inline]
1751 pub fn _00111(self) -> &'a mut W {
1752 self.variant(NSCNW::_00111)
1753 }
1754 #[doc = "9 times per electrode"]
1755 #[inline]
1756 pub fn _01000(self) -> &'a mut W {
1757 self.variant(NSCNW::_01000)
1758 }
1759 #[doc = "10 times per electrode"]
1760 #[inline]
1761 pub fn _01001(self) -> &'a mut W {
1762 self.variant(NSCNW::_01001)
1763 }
1764 #[doc = "11 times per electrode"]
1765 #[inline]
1766 pub fn _01010(self) -> &'a mut W {
1767 self.variant(NSCNW::_01010)
1768 }
1769 #[doc = "12 times per electrode"]
1770 #[inline]
1771 pub fn _01011(self) -> &'a mut W {
1772 self.variant(NSCNW::_01011)
1773 }
1774 #[doc = "13 times per electrode"]
1775 #[inline]
1776 pub fn _01100(self) -> &'a mut W {
1777 self.variant(NSCNW::_01100)
1778 }
1779 #[doc = "14 times per electrode"]
1780 #[inline]
1781 pub fn _01101(self) -> &'a mut W {
1782 self.variant(NSCNW::_01101)
1783 }
1784 #[doc = "15 times per electrode"]
1785 #[inline]
1786 pub fn _01110(self) -> &'a mut W {
1787 self.variant(NSCNW::_01110)
1788 }
1789 #[doc = "16 times per electrode"]
1790 #[inline]
1791 pub fn _01111(self) -> &'a mut W {
1792 self.variant(NSCNW::_01111)
1793 }
1794 #[doc = "17 times per electrode"]
1795 #[inline]
1796 pub fn _10000(self) -> &'a mut W {
1797 self.variant(NSCNW::_10000)
1798 }
1799 #[doc = "18 times per electrode"]
1800 #[inline]
1801 pub fn _10001(self) -> &'a mut W {
1802 self.variant(NSCNW::_10001)
1803 }
1804 #[doc = "19 times per electrode"]
1805 #[inline]
1806 pub fn _10010(self) -> &'a mut W {
1807 self.variant(NSCNW::_10010)
1808 }
1809 #[doc = "20 times per electrode"]
1810 #[inline]
1811 pub fn _10011(self) -> &'a mut W {
1812 self.variant(NSCNW::_10011)
1813 }
1814 #[doc = "21 times per electrode"]
1815 #[inline]
1816 pub fn _10100(self) -> &'a mut W {
1817 self.variant(NSCNW::_10100)
1818 }
1819 #[doc = "22 times per electrode"]
1820 #[inline]
1821 pub fn _10101(self) -> &'a mut W {
1822 self.variant(NSCNW::_10101)
1823 }
1824 #[doc = "23 times per electrode"]
1825 #[inline]
1826 pub fn _10110(self) -> &'a mut W {
1827 self.variant(NSCNW::_10110)
1828 }
1829 #[doc = "24 times per electrode"]
1830 #[inline]
1831 pub fn _10111(self) -> &'a mut W {
1832 self.variant(NSCNW::_10111)
1833 }
1834 #[doc = "25 times per electrode"]
1835 #[inline]
1836 pub fn _11000(self) -> &'a mut W {
1837 self.variant(NSCNW::_11000)
1838 }
1839 #[doc = "26 times per electrode"]
1840 #[inline]
1841 pub fn _11001(self) -> &'a mut W {
1842 self.variant(NSCNW::_11001)
1843 }
1844 #[doc = "27 times per electrode"]
1845 #[inline]
1846 pub fn _11010(self) -> &'a mut W {
1847 self.variant(NSCNW::_11010)
1848 }
1849 #[doc = "28 times per electrode"]
1850 #[inline]
1851 pub fn _11011(self) -> &'a mut W {
1852 self.variant(NSCNW::_11011)
1853 }
1854 #[doc = "29 times per electrode"]
1855 #[inline]
1856 pub fn _11100(self) -> &'a mut W {
1857 self.variant(NSCNW::_11100)
1858 }
1859 #[doc = "30 times per electrode"]
1860 #[inline]
1861 pub fn _11101(self) -> &'a mut W {
1862 self.variant(NSCNW::_11101)
1863 }
1864 #[doc = "31 times per electrode"]
1865 #[inline]
1866 pub fn _11110(self) -> &'a mut W {
1867 self.variant(NSCNW::_11110)
1868 }
1869 #[doc = "32 times per electrode"]
1870 #[inline]
1871 pub fn _11111(self) -> &'a mut W {
1872 self.variant(NSCNW::_11111)
1873 }
1874 #[doc = r" Writes raw bits to the field"]
1875 #[inline]
1876 pub fn bits(self, value: u8) -> &'a mut W {
1877 const MASK: u8 = 31;
1878 const OFFSET: u8 = 8;
1879 self.w.bits &= !((MASK as u32) << OFFSET);
1880 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1881 self.w
1882 }
1883}
1884#[doc = "Values that can be written to the field `PS`"]
1885pub enum PSW {
1886 #[doc = "Electrode Oscillator Frequency divided by 1"]
1887 _000,
1888 #[doc = "Electrode Oscillator Frequency divided by 2"]
1889 _001,
1890 #[doc = "Electrode Oscillator Frequency divided by 4"]
1891 _010,
1892 #[doc = "Electrode Oscillator Frequency divided by 8"]
1893 _011,
1894 #[doc = "Electrode Oscillator Frequency divided by 16"]
1895 _100,
1896 #[doc = "Electrode Oscillator Frequency divided by 32"]
1897 _101,
1898 #[doc = "Electrode Oscillator Frequency divided by 64"]
1899 _110,
1900 #[doc = "Electrode Oscillator Frequency divided by 128"]
1901 _111,
1902}
1903impl PSW {
1904 #[allow(missing_docs)]
1905 #[doc(hidden)]
1906 #[inline]
1907 pub fn _bits(&self) -> u8 {
1908 match *self {
1909 PSW::_000 => 0,
1910 PSW::_001 => 1,
1911 PSW::_010 => 2,
1912 PSW::_011 => 3,
1913 PSW::_100 => 4,
1914 PSW::_101 => 5,
1915 PSW::_110 => 6,
1916 PSW::_111 => 7,
1917 }
1918 }
1919}
1920#[doc = r" Proxy"]
1921pub struct _PSW<'a> {
1922 w: &'a mut W,
1923}
1924impl<'a> _PSW<'a> {
1925 #[doc = r" Writes `variant` to the field"]
1926 #[inline]
1927 pub fn variant(self, variant: PSW) -> &'a mut W {
1928 {
1929 self.bits(variant._bits())
1930 }
1931 }
1932 #[doc = "Electrode Oscillator Frequency divided by 1"]
1933 #[inline]
1934 pub fn _000(self) -> &'a mut W {
1935 self.variant(PSW::_000)
1936 }
1937 #[doc = "Electrode Oscillator Frequency divided by 2"]
1938 #[inline]
1939 pub fn _001(self) -> &'a mut W {
1940 self.variant(PSW::_001)
1941 }
1942 #[doc = "Electrode Oscillator Frequency divided by 4"]
1943 #[inline]
1944 pub fn _010(self) -> &'a mut W {
1945 self.variant(PSW::_010)
1946 }
1947 #[doc = "Electrode Oscillator Frequency divided by 8"]
1948 #[inline]
1949 pub fn _011(self) -> &'a mut W {
1950 self.variant(PSW::_011)
1951 }
1952 #[doc = "Electrode Oscillator Frequency divided by 16"]
1953 #[inline]
1954 pub fn _100(self) -> &'a mut W {
1955 self.variant(PSW::_100)
1956 }
1957 #[doc = "Electrode Oscillator Frequency divided by 32"]
1958 #[inline]
1959 pub fn _101(self) -> &'a mut W {
1960 self.variant(PSW::_101)
1961 }
1962 #[doc = "Electrode Oscillator Frequency divided by 64"]
1963 #[inline]
1964 pub fn _110(self) -> &'a mut W {
1965 self.variant(PSW::_110)
1966 }
1967 #[doc = "Electrode Oscillator Frequency divided by 128"]
1968 #[inline]
1969 pub fn _111(self) -> &'a mut W {
1970 self.variant(PSW::_111)
1971 }
1972 #[doc = r" Writes raw bits to the field"]
1973 #[inline]
1974 pub fn bits(self, value: u8) -> &'a mut W {
1975 const MASK: u8 = 7;
1976 const OFFSET: u8 = 13;
1977 self.w.bits &= !((MASK as u32) << OFFSET);
1978 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1979 self.w
1980 }
1981}
1982#[doc = "Values that can be written to the field `EXTCHRG`"]
1983pub enum EXTCHRGW {
1984 #[doc = "500 nA."]
1985 _000,
1986 #[doc = "1 uA."]
1987 _001,
1988 #[doc = "2 uA."]
1989 _010,
1990 #[doc = "4 uA."]
1991 _011,
1992 #[doc = "8 uA."]
1993 _100,
1994 #[doc = "16 uA."]
1995 _101,
1996 #[doc = "32 uA."]
1997 _110,
1998 #[doc = "64 uA."]
1999 _111,
2000}
2001impl EXTCHRGW {
2002 #[allow(missing_docs)]
2003 #[doc(hidden)]
2004 #[inline]
2005 pub fn _bits(&self) -> u8 {
2006 match *self {
2007 EXTCHRGW::_000 => 0,
2008 EXTCHRGW::_001 => 1,
2009 EXTCHRGW::_010 => 2,
2010 EXTCHRGW::_011 => 3,
2011 EXTCHRGW::_100 => 4,
2012 EXTCHRGW::_101 => 5,
2013 EXTCHRGW::_110 => 6,
2014 EXTCHRGW::_111 => 7,
2015 }
2016 }
2017}
2018#[doc = r" Proxy"]
2019pub struct _EXTCHRGW<'a> {
2020 w: &'a mut W,
2021}
2022impl<'a> _EXTCHRGW<'a> {
2023 #[doc = r" Writes `variant` to the field"]
2024 #[inline]
2025 pub fn variant(self, variant: EXTCHRGW) -> &'a mut W {
2026 {
2027 self.bits(variant._bits())
2028 }
2029 }
2030 #[doc = "500 nA."]
2031 #[inline]
2032 pub fn _000(self) -> &'a mut W {
2033 self.variant(EXTCHRGW::_000)
2034 }
2035 #[doc = "1 uA."]
2036 #[inline]
2037 pub fn _001(self) -> &'a mut W {
2038 self.variant(EXTCHRGW::_001)
2039 }
2040 #[doc = "2 uA."]
2041 #[inline]
2042 pub fn _010(self) -> &'a mut W {
2043 self.variant(EXTCHRGW::_010)
2044 }
2045 #[doc = "4 uA."]
2046 #[inline]
2047 pub fn _011(self) -> &'a mut W {
2048 self.variant(EXTCHRGW::_011)
2049 }
2050 #[doc = "8 uA."]
2051 #[inline]
2052 pub fn _100(self) -> &'a mut W {
2053 self.variant(EXTCHRGW::_100)
2054 }
2055 #[doc = "16 uA."]
2056 #[inline]
2057 pub fn _101(self) -> &'a mut W {
2058 self.variant(EXTCHRGW::_101)
2059 }
2060 #[doc = "32 uA."]
2061 #[inline]
2062 pub fn _110(self) -> &'a mut W {
2063 self.variant(EXTCHRGW::_110)
2064 }
2065 #[doc = "64 uA."]
2066 #[inline]
2067 pub fn _111(self) -> &'a mut W {
2068 self.variant(EXTCHRGW::_111)
2069 }
2070 #[doc = r" Writes raw bits to the field"]
2071 #[inline]
2072 pub fn bits(self, value: u8) -> &'a mut W {
2073 const MASK: u8 = 7;
2074 const OFFSET: u8 = 16;
2075 self.w.bits &= !((MASK as u32) << OFFSET);
2076 self.w.bits |= ((value & MASK) as u32) << OFFSET;
2077 self.w
2078 }
2079}
2080#[doc = "Values that can be written to the field `DVOLT`"]
2081pub enum DVOLTW {
2082 #[doc = "DV = 1.026 V; VP = 1.328 V; Vm = 0.302 V."]
2083 _00,
2084 #[doc = "DV = 0.592 V; VP = 1.111 V; Vm = 0.519 V."]
2085 _01,
2086 #[doc = "DV = 0.342 V; VP = 0.986 V; Vm = 0.644 V."]
2087 _10,
2088 #[doc = "DV = 0.197 V; VP = 0.914 V; Vm = 0.716 V."]
2089 _11,
2090}
2091impl DVOLTW {
2092 #[allow(missing_docs)]
2093 #[doc(hidden)]
2094 #[inline]
2095 pub fn _bits(&self) -> u8 {
2096 match *self {
2097 DVOLTW::_00 => 0,
2098 DVOLTW::_01 => 1,
2099 DVOLTW::_10 => 2,
2100 DVOLTW::_11 => 3,
2101 }
2102 }
2103}
2104#[doc = r" Proxy"]
2105pub struct _DVOLTW<'a> {
2106 w: &'a mut W,
2107}
2108impl<'a> _DVOLTW<'a> {
2109 #[doc = r" Writes `variant` to the field"]
2110 #[inline]
2111 pub fn variant(self, variant: DVOLTW) -> &'a mut W {
2112 {
2113 self.bits(variant._bits())
2114 }
2115 }
2116 #[doc = "DV = 1.026 V; VP = 1.328 V; Vm = 0.302 V."]
2117 #[inline]
2118 pub fn _00(self) -> &'a mut W {
2119 self.variant(DVOLTW::_00)
2120 }
2121 #[doc = "DV = 0.592 V; VP = 1.111 V; Vm = 0.519 V."]
2122 #[inline]
2123 pub fn _01(self) -> &'a mut W {
2124 self.variant(DVOLTW::_01)
2125 }
2126 #[doc = "DV = 0.342 V; VP = 0.986 V; Vm = 0.644 V."]
2127 #[inline]
2128 pub fn _10(self) -> &'a mut W {
2129 self.variant(DVOLTW::_10)
2130 }
2131 #[doc = "DV = 0.197 V; VP = 0.914 V; Vm = 0.716 V."]
2132 #[inline]
2133 pub fn _11(self) -> &'a mut W {
2134 self.variant(DVOLTW::_11)
2135 }
2136 #[doc = r" Writes raw bits to the field"]
2137 #[inline]
2138 pub fn bits(self, value: u8) -> &'a mut W {
2139 const MASK: u8 = 3;
2140 const OFFSET: u8 = 19;
2141 self.w.bits &= !((MASK as u32) << OFFSET);
2142 self.w.bits |= ((value & MASK) as u32) << OFFSET;
2143 self.w
2144 }
2145}
2146#[doc = "Values that can be written to the field `REFCHRG`"]
2147pub enum REFCHRGW {
2148 #[doc = "500 nA."]
2149 _000,
2150 #[doc = "1 uA."]
2151 _001,
2152 #[doc = "2 uA."]
2153 _010,
2154 #[doc = "4 uA."]
2155 _011,
2156 #[doc = "8 uA."]
2157 _100,
2158 #[doc = "16 uA."]
2159 _101,
2160 #[doc = "32 uA."]
2161 _110,
2162 #[doc = "64 uA."]
2163 _111,
2164}
2165impl REFCHRGW {
2166 #[allow(missing_docs)]
2167 #[doc(hidden)]
2168 #[inline]
2169 pub fn _bits(&self) -> u8 {
2170 match *self {
2171 REFCHRGW::_000 => 0,
2172 REFCHRGW::_001 => 1,
2173 REFCHRGW::_010 => 2,
2174 REFCHRGW::_011 => 3,
2175 REFCHRGW::_100 => 4,
2176 REFCHRGW::_101 => 5,
2177 REFCHRGW::_110 => 6,
2178 REFCHRGW::_111 => 7,
2179 }
2180 }
2181}
2182#[doc = r" Proxy"]
2183pub struct _REFCHRGW<'a> {
2184 w: &'a mut W,
2185}
2186impl<'a> _REFCHRGW<'a> {
2187 #[doc = r" Writes `variant` to the field"]
2188 #[inline]
2189 pub fn variant(self, variant: REFCHRGW) -> &'a mut W {
2190 {
2191 self.bits(variant._bits())
2192 }
2193 }
2194 #[doc = "500 nA."]
2195 #[inline]
2196 pub fn _000(self) -> &'a mut W {
2197 self.variant(REFCHRGW::_000)
2198 }
2199 #[doc = "1 uA."]
2200 #[inline]
2201 pub fn _001(self) -> &'a mut W {
2202 self.variant(REFCHRGW::_001)
2203 }
2204 #[doc = "2 uA."]
2205 #[inline]
2206 pub fn _010(self) -> &'a mut W {
2207 self.variant(REFCHRGW::_010)
2208 }
2209 #[doc = "4 uA."]
2210 #[inline]
2211 pub fn _011(self) -> &'a mut W {
2212 self.variant(REFCHRGW::_011)
2213 }
2214 #[doc = "8 uA."]
2215 #[inline]
2216 pub fn _100(self) -> &'a mut W {
2217 self.variant(REFCHRGW::_100)
2218 }
2219 #[doc = "16 uA."]
2220 #[inline]
2221 pub fn _101(self) -> &'a mut W {
2222 self.variant(REFCHRGW::_101)
2223 }
2224 #[doc = "32 uA."]
2225 #[inline]
2226 pub fn _110(self) -> &'a mut W {
2227 self.variant(REFCHRGW::_110)
2228 }
2229 #[doc = "64 uA."]
2230 #[inline]
2231 pub fn _111(self) -> &'a mut W {
2232 self.variant(REFCHRGW::_111)
2233 }
2234 #[doc = r" Writes raw bits to the field"]
2235 #[inline]
2236 pub fn bits(self, value: u8) -> &'a mut W {
2237 const MASK: u8 = 7;
2238 const OFFSET: u8 = 21;
2239 self.w.bits &= !((MASK as u32) << OFFSET);
2240 self.w.bits |= ((value & MASK) as u32) << OFFSET;
2241 self.w
2242 }
2243}
2244#[doc = "Values that can be written to the field `MODE`"]
2245pub enum MODEW {
2246 #[doc = "Set TSI in capacitive sensing(non-noise detection) mode."]
2247 _0000,
2248 #[doc = "Set TSI analog to work in single threshold noise detection mode and the frequency limitation circuit is disabled."]
2249 _0100,
2250 #[doc = "Set TSI analog to work in single threshold noise detection mode and the frequency limitation circuit is enabled to work in higher frequencies operations."]
2251 _1000,
2252 #[doc = "Set TSI analog to work in automatic noise detection mode."]
2253 _1100,
2254}
2255impl MODEW {
2256 #[allow(missing_docs)]
2257 #[doc(hidden)]
2258 #[inline]
2259 pub fn _bits(&self) -> u8 {
2260 match *self {
2261 MODEW::_0000 => 0,
2262 MODEW::_0100 => 4,
2263 MODEW::_1000 => 8,
2264 MODEW::_1100 => 12,
2265 }
2266 }
2267}
2268#[doc = r" Proxy"]
2269pub struct _MODEW<'a> {
2270 w: &'a mut W,
2271}
2272impl<'a> _MODEW<'a> {
2273 #[doc = r" Writes `variant` to the field"]
2274 #[inline]
2275 pub fn variant(self, variant: MODEW) -> &'a mut W {
2276 unsafe { self.bits(variant._bits()) }
2277 }
2278 #[doc = "Set TSI in capacitive sensing(non-noise detection) mode."]
2279 #[inline]
2280 pub fn _0000(self) -> &'a mut W {
2281 self.variant(MODEW::_0000)
2282 }
2283 #[doc = "Set TSI analog to work in single threshold noise detection mode and the frequency limitation circuit is disabled."]
2284 #[inline]
2285 pub fn _0100(self) -> &'a mut W {
2286 self.variant(MODEW::_0100)
2287 }
2288 #[doc = "Set TSI analog to work in single threshold noise detection mode and the frequency limitation circuit is enabled to work in higher frequencies operations."]
2289 #[inline]
2290 pub fn _1000(self) -> &'a mut W {
2291 self.variant(MODEW::_1000)
2292 }
2293 #[doc = "Set TSI analog to work in automatic noise detection mode."]
2294 #[inline]
2295 pub fn _1100(self) -> &'a mut W {
2296 self.variant(MODEW::_1100)
2297 }
2298 #[doc = r" Writes raw bits to the field"]
2299 #[inline]
2300 pub unsafe fn bits(self, value: u8) -> &'a mut W {
2301 const MASK: u8 = 15;
2302 const OFFSET: u8 = 24;
2303 self.w.bits &= !((MASK as u32) << OFFSET);
2304 self.w.bits |= ((value & MASK) as u32) << OFFSET;
2305 self.w
2306 }
2307}
2308#[doc = "Values that can be written to the field `ESOR`"]
2309pub enum ESORW {
2310 #[doc = "Out-of-range interrupt is allowed."]
2311 _0,
2312 #[doc = "End-of-scan interrupt is allowed."]
2313 _1,
2314}
2315impl ESORW {
2316 #[allow(missing_docs)]
2317 #[doc(hidden)]
2318 #[inline]
2319 pub fn _bits(&self) -> bool {
2320 match *self {
2321 ESORW::_0 => false,
2322 ESORW::_1 => true,
2323 }
2324 }
2325}
2326#[doc = r" Proxy"]
2327pub struct _ESORW<'a> {
2328 w: &'a mut W,
2329}
2330impl<'a> _ESORW<'a> {
2331 #[doc = r" Writes `variant` to the field"]
2332 #[inline]
2333 pub fn variant(self, variant: ESORW) -> &'a mut W {
2334 {
2335 self.bit(variant._bits())
2336 }
2337 }
2338 #[doc = "Out-of-range interrupt is allowed."]
2339 #[inline]
2340 pub fn _0(self) -> &'a mut W {
2341 self.variant(ESORW::_0)
2342 }
2343 #[doc = "End-of-scan interrupt is allowed."]
2344 #[inline]
2345 pub fn _1(self) -> &'a mut W {
2346 self.variant(ESORW::_1)
2347 }
2348 #[doc = r" Sets the field bit"]
2349 pub fn set_bit(self) -> &'a mut W {
2350 self.bit(true)
2351 }
2352 #[doc = r" Clears the field bit"]
2353 pub fn clear_bit(self) -> &'a mut W {
2354 self.bit(false)
2355 }
2356 #[doc = r" Writes raw bits to the field"]
2357 #[inline]
2358 pub fn bit(self, value: bool) -> &'a mut W {
2359 const MASK: bool = true;
2360 const OFFSET: u8 = 28;
2361 self.w.bits &= !((MASK as u32) << OFFSET);
2362 self.w.bits |= ((value & MASK) as u32) << OFFSET;
2363 self.w
2364 }
2365}
2366#[doc = r" Proxy"]
2367pub struct _OUTRGFW<'a> {
2368 w: &'a mut W,
2369}
2370impl<'a> _OUTRGFW<'a> {
2371 #[doc = r" Sets the field bit"]
2372 pub fn set_bit(self) -> &'a mut W {
2373 self.bit(true)
2374 }
2375 #[doc = r" Clears the field bit"]
2376 pub fn clear_bit(self) -> &'a mut W {
2377 self.bit(false)
2378 }
2379 #[doc = r" Writes raw bits to the field"]
2380 #[inline]
2381 pub fn bit(self, value: bool) -> &'a mut W {
2382 const MASK: bool = true;
2383 const OFFSET: u8 = 31;
2384 self.w.bits &= !((MASK as u32) << OFFSET);
2385 self.w.bits |= ((value & MASK) as u32) << OFFSET;
2386 self.w
2387 }
2388}
2389impl R {
2390 #[doc = r" Value of the register as raw bits"]
2391 #[inline]
2392 pub fn bits(&self) -> u32 {
2393 self.bits
2394 }
2395 #[doc = "Bit 0 - End-of-Scan DMA Transfer Request Enable Only"]
2396 #[inline]
2397 pub fn eosdmeo(&self) -> EOSDMEOR {
2398 EOSDMEOR::_from({
2399 const MASK: bool = true;
2400 const OFFSET: u8 = 0;
2401 ((self.bits >> OFFSET) & MASK as u32) != 0
2402 })
2403 }
2404 #[doc = "Bit 1 - CURSW"]
2405 #[inline]
2406 pub fn cursw(&self) -> CURSWR {
2407 CURSWR::_from({
2408 const MASK: bool = true;
2409 const OFFSET: u8 = 1;
2410 ((self.bits >> OFFSET) & MASK as u32) != 0
2411 })
2412 }
2413 #[doc = "Bit 2 - End of Scan Flag"]
2414 #[inline]
2415 pub fn eosf(&self) -> EOSFR {
2416 EOSFR::_from({
2417 const MASK: bool = true;
2418 const OFFSET: u8 = 2;
2419 ((self.bits >> OFFSET) & MASK as u32) != 0
2420 })
2421 }
2422 #[doc = "Bit 3 - Scan In Progress Status"]
2423 #[inline]
2424 pub fn scnip(&self) -> SCNIPR {
2425 SCNIPR::_from({
2426 const MASK: bool = true;
2427 const OFFSET: u8 = 3;
2428 ((self.bits >> OFFSET) & MASK as u32) != 0
2429 })
2430 }
2431 #[doc = "Bit 4 - Scan Trigger Mode"]
2432 #[inline]
2433 pub fn stm(&self) -> STMR {
2434 STMR::_from({
2435 const MASK: bool = true;
2436 const OFFSET: u8 = 4;
2437 ((self.bits >> OFFSET) & MASK as u32) != 0
2438 })
2439 }
2440 #[doc = "Bit 5 - TSI STOP Enable"]
2441 #[inline]
2442 pub fn stpe(&self) -> STPER {
2443 STPER::_from({
2444 const MASK: bool = true;
2445 const OFFSET: u8 = 5;
2446 ((self.bits >> OFFSET) & MASK as u32) != 0
2447 })
2448 }
2449 #[doc = "Bit 6 - Touch Sensing Input Interrupt Enable"]
2450 #[inline]
2451 pub fn tsiien(&self) -> TSIIENR {
2452 TSIIENR::_from({
2453 const MASK: bool = true;
2454 const OFFSET: u8 = 6;
2455 ((self.bits >> OFFSET) & MASK as u32) != 0
2456 })
2457 }
2458 #[doc = "Bit 7 - Touch Sensing Input Module Enable"]
2459 #[inline]
2460 pub fn tsien(&self) -> TSIENR {
2461 TSIENR::_from({
2462 const MASK: bool = true;
2463 const OFFSET: u8 = 7;
2464 ((self.bits >> OFFSET) & MASK as u32) != 0
2465 })
2466 }
2467 #[doc = "Bits 8:12 - NSCN"]
2468 #[inline]
2469 pub fn nscn(&self) -> NSCNR {
2470 NSCNR::_from({
2471 const MASK: u8 = 31;
2472 const OFFSET: u8 = 8;
2473 ((self.bits >> OFFSET) & MASK as u32) as u8
2474 })
2475 }
2476 #[doc = "Bits 13:15 - PS"]
2477 #[inline]
2478 pub fn ps(&self) -> PSR {
2479 PSR::_from({
2480 const MASK: u8 = 7;
2481 const OFFSET: u8 = 13;
2482 ((self.bits >> OFFSET) & MASK as u32) as u8
2483 })
2484 }
2485 #[doc = "Bits 16:18 - EXTCHRG"]
2486 #[inline]
2487 pub fn extchrg(&self) -> EXTCHRGR {
2488 EXTCHRGR::_from({
2489 const MASK: u8 = 7;
2490 const OFFSET: u8 = 16;
2491 ((self.bits >> OFFSET) & MASK as u32) as u8
2492 })
2493 }
2494 #[doc = "Bits 19:20 - DVOLT"]
2495 #[inline]
2496 pub fn dvolt(&self) -> DVOLTR {
2497 DVOLTR::_from({
2498 const MASK: u8 = 3;
2499 const OFFSET: u8 = 19;
2500 ((self.bits >> OFFSET) & MASK as u32) as u8
2501 })
2502 }
2503 #[doc = "Bits 21:23 - REFCHRG"]
2504 #[inline]
2505 pub fn refchrg(&self) -> REFCHRGR {
2506 REFCHRGR::_from({
2507 const MASK: u8 = 7;
2508 const OFFSET: u8 = 21;
2509 ((self.bits >> OFFSET) & MASK as u32) as u8
2510 })
2511 }
2512 #[doc = "Bits 24:27 - TSI analog modes setup and status bits."]
2513 #[inline]
2514 pub fn mode(&self) -> MODER {
2515 MODER::_from({
2516 const MASK: u8 = 15;
2517 const OFFSET: u8 = 24;
2518 ((self.bits >> OFFSET) & MASK as u32) as u8
2519 })
2520 }
2521 #[doc = "Bit 28 - End-of-scan or Out-of-Range Interrupt Selection"]
2522 #[inline]
2523 pub fn esor(&self) -> ESORR {
2524 ESORR::_from({
2525 const MASK: bool = true;
2526 const OFFSET: u8 = 28;
2527 ((self.bits >> OFFSET) & MASK as u32) != 0
2528 })
2529 }
2530 #[doc = "Bit 31 - Out of Range Flag."]
2531 #[inline]
2532 pub fn outrgf(&self) -> OUTRGFR {
2533 let bits = {
2534 const MASK: bool = true;
2535 const OFFSET: u8 = 31;
2536 ((self.bits >> OFFSET) & MASK as u32) != 0
2537 };
2538 OUTRGFR { bits }
2539 }
2540}
2541impl W {
2542 #[doc = r" Reset value of the register"]
2543 #[inline]
2544 pub fn reset_value() -> W {
2545 W { bits: 0 }
2546 }
2547 #[doc = r" Writes raw bits to the register"]
2548 #[inline]
2549 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
2550 self.bits = bits;
2551 self
2552 }
2553 #[doc = "Bit 0 - End-of-Scan DMA Transfer Request Enable Only"]
2554 #[inline]
2555 pub fn eosdmeo(&mut self) -> _EOSDMEOW {
2556 _EOSDMEOW { w: self }
2557 }
2558 #[doc = "Bit 1 - CURSW"]
2559 #[inline]
2560 pub fn cursw(&mut self) -> _CURSWW {
2561 _CURSWW { w: self }
2562 }
2563 #[doc = "Bit 2 - End of Scan Flag"]
2564 #[inline]
2565 pub fn eosf(&mut self) -> _EOSFW {
2566 _EOSFW { w: self }
2567 }
2568 #[doc = "Bit 4 - Scan Trigger Mode"]
2569 #[inline]
2570 pub fn stm(&mut self) -> _STMW {
2571 _STMW { w: self }
2572 }
2573 #[doc = "Bit 5 - TSI STOP Enable"]
2574 #[inline]
2575 pub fn stpe(&mut self) -> _STPEW {
2576 _STPEW { w: self }
2577 }
2578 #[doc = "Bit 6 - Touch Sensing Input Interrupt Enable"]
2579 #[inline]
2580 pub fn tsiien(&mut self) -> _TSIIENW {
2581 _TSIIENW { w: self }
2582 }
2583 #[doc = "Bit 7 - Touch Sensing Input Module Enable"]
2584 #[inline]
2585 pub fn tsien(&mut self) -> _TSIENW {
2586 _TSIENW { w: self }
2587 }
2588 #[doc = "Bits 8:12 - NSCN"]
2589 #[inline]
2590 pub fn nscn(&mut self) -> _NSCNW {
2591 _NSCNW { w: self }
2592 }
2593 #[doc = "Bits 13:15 - PS"]
2594 #[inline]
2595 pub fn ps(&mut self) -> _PSW {
2596 _PSW { w: self }
2597 }
2598 #[doc = "Bits 16:18 - EXTCHRG"]
2599 #[inline]
2600 pub fn extchrg(&mut self) -> _EXTCHRGW {
2601 _EXTCHRGW { w: self }
2602 }
2603 #[doc = "Bits 19:20 - DVOLT"]
2604 #[inline]
2605 pub fn dvolt(&mut self) -> _DVOLTW {
2606 _DVOLTW { w: self }
2607 }
2608 #[doc = "Bits 21:23 - REFCHRG"]
2609 #[inline]
2610 pub fn refchrg(&mut self) -> _REFCHRGW {
2611 _REFCHRGW { w: self }
2612 }
2613 #[doc = "Bits 24:27 - TSI analog modes setup and status bits."]
2614 #[inline]
2615 pub fn mode(&mut self) -> _MODEW {
2616 _MODEW { w: self }
2617 }
2618 #[doc = "Bit 28 - End-of-scan or Out-of-Range Interrupt Selection"]
2619 #[inline]
2620 pub fn esor(&mut self) -> _ESORW {
2621 _ESORW { w: self }
2622 }
2623 #[doc = "Bit 31 - Out of Range Flag."]
2624 #[inline]
2625 pub fn outrgf(&mut self) -> _OUTRGFW {
2626 _OUTRGFW { w: self }
2627 }
2628}