1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::PUSHR {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = r" Value of the field"]
46pub struct TXDATAR {
47 bits: u16,
48}
49impl TXDATAR {
50 #[doc = r" Value of the field as raw bits"]
51 #[inline]
52 pub fn bits(&self) -> u16 {
53 self.bits
54 }
55}
56#[doc = "Possible values of the field `PCS0`"]
57#[derive(Clone, Copy, Debug, PartialEq)]
58pub enum PCS0R {
59 #[doc = "Negate the PCS\\[x\\] signal."]
60 _0,
61 #[doc = "Assert the PCS\\[x\\] signal."]
62 _1,
63}
64impl PCS0R {
65 #[doc = r" Returns `true` if the bit is clear (0)"]
66 #[inline]
67 pub fn bit_is_clear(&self) -> bool {
68 !self.bit()
69 }
70 #[doc = r" Returns `true` if the bit is set (1)"]
71 #[inline]
72 pub fn bit_is_set(&self) -> bool {
73 self.bit()
74 }
75 #[doc = r" Value of the field as raw bits"]
76 #[inline]
77 pub fn bit(&self) -> bool {
78 match *self {
79 PCS0R::_0 => false,
80 PCS0R::_1 => true,
81 }
82 }
83 #[allow(missing_docs)]
84 #[doc(hidden)]
85 #[inline]
86 pub fn _from(value: bool) -> PCS0R {
87 match value {
88 false => PCS0R::_0,
89 true => PCS0R::_1,
90 }
91 }
92 #[doc = "Checks if the value of the field is `_0`"]
93 #[inline]
94 pub fn is_0(&self) -> bool {
95 *self == PCS0R::_0
96 }
97 #[doc = "Checks if the value of the field is `_1`"]
98 #[inline]
99 pub fn is_1(&self) -> bool {
100 *self == PCS0R::_1
101 }
102}
103#[doc = "Possible values of the field `PCS1`"]
104#[derive(Clone, Copy, Debug, PartialEq)]
105pub enum PCS1R {
106 #[doc = "Negate the PCS\\[x\\] signal."]
107 _0,
108 #[doc = "Assert the PCS\\[x\\] signal."]
109 _1,
110}
111impl PCS1R {
112 #[doc = r" Returns `true` if the bit is clear (0)"]
113 #[inline]
114 pub fn bit_is_clear(&self) -> bool {
115 !self.bit()
116 }
117 #[doc = r" Returns `true` if the bit is set (1)"]
118 #[inline]
119 pub fn bit_is_set(&self) -> bool {
120 self.bit()
121 }
122 #[doc = r" Value of the field as raw bits"]
123 #[inline]
124 pub fn bit(&self) -> bool {
125 match *self {
126 PCS1R::_0 => false,
127 PCS1R::_1 => true,
128 }
129 }
130 #[allow(missing_docs)]
131 #[doc(hidden)]
132 #[inline]
133 pub fn _from(value: bool) -> PCS1R {
134 match value {
135 false => PCS1R::_0,
136 true => PCS1R::_1,
137 }
138 }
139 #[doc = "Checks if the value of the field is `_0`"]
140 #[inline]
141 pub fn is_0(&self) -> bool {
142 *self == PCS1R::_0
143 }
144 #[doc = "Checks if the value of the field is `_1`"]
145 #[inline]
146 pub fn is_1(&self) -> bool {
147 *self == PCS1R::_1
148 }
149}
150#[doc = "Possible values of the field `PCS2`"]
151#[derive(Clone, Copy, Debug, PartialEq)]
152pub enum PCS2R {
153 #[doc = "Negate the PCS\\[x\\] signal."]
154 _0,
155 #[doc = "Assert the PCS\\[x\\] signal."]
156 _1,
157}
158impl PCS2R {
159 #[doc = r" Returns `true` if the bit is clear (0)"]
160 #[inline]
161 pub fn bit_is_clear(&self) -> bool {
162 !self.bit()
163 }
164 #[doc = r" Returns `true` if the bit is set (1)"]
165 #[inline]
166 pub fn bit_is_set(&self) -> bool {
167 self.bit()
168 }
169 #[doc = r" Value of the field as raw bits"]
170 #[inline]
171 pub fn bit(&self) -> bool {
172 match *self {
173 PCS2R::_0 => false,
174 PCS2R::_1 => true,
175 }
176 }
177 #[allow(missing_docs)]
178 #[doc(hidden)]
179 #[inline]
180 pub fn _from(value: bool) -> PCS2R {
181 match value {
182 false => PCS2R::_0,
183 true => PCS2R::_1,
184 }
185 }
186 #[doc = "Checks if the value of the field is `_0`"]
187 #[inline]
188 pub fn is_0(&self) -> bool {
189 *self == PCS2R::_0
190 }
191 #[doc = "Checks if the value of the field is `_1`"]
192 #[inline]
193 pub fn is_1(&self) -> bool {
194 *self == PCS2R::_1
195 }
196}
197#[doc = "Possible values of the field `PCS3`"]
198#[derive(Clone, Copy, Debug, PartialEq)]
199pub enum PCS3R {
200 #[doc = "Negate the PCS\\[x\\] signal."]
201 _0,
202 #[doc = "Assert the PCS\\[x\\] signal."]
203 _1,
204}
205impl PCS3R {
206 #[doc = r" Returns `true` if the bit is clear (0)"]
207 #[inline]
208 pub fn bit_is_clear(&self) -> bool {
209 !self.bit()
210 }
211 #[doc = r" Returns `true` if the bit is set (1)"]
212 #[inline]
213 pub fn bit_is_set(&self) -> bool {
214 self.bit()
215 }
216 #[doc = r" Value of the field as raw bits"]
217 #[inline]
218 pub fn bit(&self) -> bool {
219 match *self {
220 PCS3R::_0 => false,
221 PCS3R::_1 => true,
222 }
223 }
224 #[allow(missing_docs)]
225 #[doc(hidden)]
226 #[inline]
227 pub fn _from(value: bool) -> PCS3R {
228 match value {
229 false => PCS3R::_0,
230 true => PCS3R::_1,
231 }
232 }
233 #[doc = "Checks if the value of the field is `_0`"]
234 #[inline]
235 pub fn is_0(&self) -> bool {
236 *self == PCS3R::_0
237 }
238 #[doc = "Checks if the value of the field is `_1`"]
239 #[inline]
240 pub fn is_1(&self) -> bool {
241 *self == PCS3R::_1
242 }
243}
244#[doc = "Possible values of the field `PCS4`"]
245#[derive(Clone, Copy, Debug, PartialEq)]
246pub enum PCS4R {
247 #[doc = "Negate the PCS\\[x\\] signal."]
248 _0,
249 #[doc = "Assert the PCS\\[x\\] signal."]
250 _1,
251}
252impl PCS4R {
253 #[doc = r" Returns `true` if the bit is clear (0)"]
254 #[inline]
255 pub fn bit_is_clear(&self) -> bool {
256 !self.bit()
257 }
258 #[doc = r" Returns `true` if the bit is set (1)"]
259 #[inline]
260 pub fn bit_is_set(&self) -> bool {
261 self.bit()
262 }
263 #[doc = r" Value of the field as raw bits"]
264 #[inline]
265 pub fn bit(&self) -> bool {
266 match *self {
267 PCS4R::_0 => false,
268 PCS4R::_1 => true,
269 }
270 }
271 #[allow(missing_docs)]
272 #[doc(hidden)]
273 #[inline]
274 pub fn _from(value: bool) -> PCS4R {
275 match value {
276 false => PCS4R::_0,
277 true => PCS4R::_1,
278 }
279 }
280 #[doc = "Checks if the value of the field is `_0`"]
281 #[inline]
282 pub fn is_0(&self) -> bool {
283 *self == PCS4R::_0
284 }
285 #[doc = "Checks if the value of the field is `_1`"]
286 #[inline]
287 pub fn is_1(&self) -> bool {
288 *self == PCS4R::_1
289 }
290}
291#[doc = "Possible values of the field `PCS5`"]
292#[derive(Clone, Copy, Debug, PartialEq)]
293pub enum PCS5R {
294 #[doc = "Negate the PCS\\[x\\] signal."]
295 _0,
296 #[doc = "Assert the PCS\\[x\\] signal."]
297 _1,
298}
299impl PCS5R {
300 #[doc = r" Returns `true` if the bit is clear (0)"]
301 #[inline]
302 pub fn bit_is_clear(&self) -> bool {
303 !self.bit()
304 }
305 #[doc = r" Returns `true` if the bit is set (1)"]
306 #[inline]
307 pub fn bit_is_set(&self) -> bool {
308 self.bit()
309 }
310 #[doc = r" Value of the field as raw bits"]
311 #[inline]
312 pub fn bit(&self) -> bool {
313 match *self {
314 PCS5R::_0 => false,
315 PCS5R::_1 => true,
316 }
317 }
318 #[allow(missing_docs)]
319 #[doc(hidden)]
320 #[inline]
321 pub fn _from(value: bool) -> PCS5R {
322 match value {
323 false => PCS5R::_0,
324 true => PCS5R::_1,
325 }
326 }
327 #[doc = "Checks if the value of the field is `_0`"]
328 #[inline]
329 pub fn is_0(&self) -> bool {
330 *self == PCS5R::_0
331 }
332 #[doc = "Checks if the value of the field is `_1`"]
333 #[inline]
334 pub fn is_1(&self) -> bool {
335 *self == PCS5R::_1
336 }
337}
338#[doc = "Possible values of the field `CTCNT`"]
339#[derive(Clone, Copy, Debug, PartialEq)]
340pub enum CTCNTR {
341 #[doc = "Do not clear the TCR\\[TCNT\\] field."]
342 _0,
343 #[doc = "Clear the TCR\\[TCNT\\] field."]
344 _1,
345}
346impl CTCNTR {
347 #[doc = r" Returns `true` if the bit is clear (0)"]
348 #[inline]
349 pub fn bit_is_clear(&self) -> bool {
350 !self.bit()
351 }
352 #[doc = r" Returns `true` if the bit is set (1)"]
353 #[inline]
354 pub fn bit_is_set(&self) -> bool {
355 self.bit()
356 }
357 #[doc = r" Value of the field as raw bits"]
358 #[inline]
359 pub fn bit(&self) -> bool {
360 match *self {
361 CTCNTR::_0 => false,
362 CTCNTR::_1 => true,
363 }
364 }
365 #[allow(missing_docs)]
366 #[doc(hidden)]
367 #[inline]
368 pub fn _from(value: bool) -> CTCNTR {
369 match value {
370 false => CTCNTR::_0,
371 true => CTCNTR::_1,
372 }
373 }
374 #[doc = "Checks if the value of the field is `_0`"]
375 #[inline]
376 pub fn is_0(&self) -> bool {
377 *self == CTCNTR::_0
378 }
379 #[doc = "Checks if the value of the field is `_1`"]
380 #[inline]
381 pub fn is_1(&self) -> bool {
382 *self == CTCNTR::_1
383 }
384}
385#[doc = "Possible values of the field `EOQ`"]
386#[derive(Clone, Copy, Debug, PartialEq)]
387pub enum EOQR {
388 #[doc = "The SPI data is not the last data to transfer."]
389 _0,
390 #[doc = "The SPI data is the last data to transfer."]
391 _1,
392}
393impl EOQR {
394 #[doc = r" Returns `true` if the bit is clear (0)"]
395 #[inline]
396 pub fn bit_is_clear(&self) -> bool {
397 !self.bit()
398 }
399 #[doc = r" Returns `true` if the bit is set (1)"]
400 #[inline]
401 pub fn bit_is_set(&self) -> bool {
402 self.bit()
403 }
404 #[doc = r" Value of the field as raw bits"]
405 #[inline]
406 pub fn bit(&self) -> bool {
407 match *self {
408 EOQR::_0 => false,
409 EOQR::_1 => true,
410 }
411 }
412 #[allow(missing_docs)]
413 #[doc(hidden)]
414 #[inline]
415 pub fn _from(value: bool) -> EOQR {
416 match value {
417 false => EOQR::_0,
418 true => EOQR::_1,
419 }
420 }
421 #[doc = "Checks if the value of the field is `_0`"]
422 #[inline]
423 pub fn is_0(&self) -> bool {
424 *self == EOQR::_0
425 }
426 #[doc = "Checks if the value of the field is `_1`"]
427 #[inline]
428 pub fn is_1(&self) -> bool {
429 *self == EOQR::_1
430 }
431}
432#[doc = "Possible values of the field `CTAS`"]
433#[derive(Clone, Copy, Debug, PartialEq)]
434pub enum CTASR {
435 #[doc = "CTAR0"]
436 _000,
437 #[doc = "CTAR1"]
438 _001,
439 #[doc = r" Reserved"]
440 _Reserved(u8),
441}
442impl CTASR {
443 #[doc = r" Value of the field as raw bits"]
444 #[inline]
445 pub fn bits(&self) -> u8 {
446 match *self {
447 CTASR::_000 => 0,
448 CTASR::_001 => 1,
449 CTASR::_Reserved(bits) => bits,
450 }
451 }
452 #[allow(missing_docs)]
453 #[doc(hidden)]
454 #[inline]
455 pub fn _from(value: u8) -> CTASR {
456 match value {
457 0 => CTASR::_000,
458 1 => CTASR::_001,
459 i => CTASR::_Reserved(i),
460 }
461 }
462 #[doc = "Checks if the value of the field is `_000`"]
463 #[inline]
464 pub fn is_000(&self) -> bool {
465 *self == CTASR::_000
466 }
467 #[doc = "Checks if the value of the field is `_001`"]
468 #[inline]
469 pub fn is_001(&self) -> bool {
470 *self == CTASR::_001
471 }
472}
473#[doc = "Possible values of the field `CONT`"]
474#[derive(Clone, Copy, Debug, PartialEq)]
475pub enum CONTR {
476 #[doc = "Return PCSn signals to their inactive state between transfers."]
477 _0,
478 #[doc = "Keep PCSn signals asserted between transfers."]
479 _1,
480}
481impl CONTR {
482 #[doc = r" Returns `true` if the bit is clear (0)"]
483 #[inline]
484 pub fn bit_is_clear(&self) -> bool {
485 !self.bit()
486 }
487 #[doc = r" Returns `true` if the bit is set (1)"]
488 #[inline]
489 pub fn bit_is_set(&self) -> bool {
490 self.bit()
491 }
492 #[doc = r" Value of the field as raw bits"]
493 #[inline]
494 pub fn bit(&self) -> bool {
495 match *self {
496 CONTR::_0 => false,
497 CONTR::_1 => true,
498 }
499 }
500 #[allow(missing_docs)]
501 #[doc(hidden)]
502 #[inline]
503 pub fn _from(value: bool) -> CONTR {
504 match value {
505 false => CONTR::_0,
506 true => CONTR::_1,
507 }
508 }
509 #[doc = "Checks if the value of the field is `_0`"]
510 #[inline]
511 pub fn is_0(&self) -> bool {
512 *self == CONTR::_0
513 }
514 #[doc = "Checks if the value of the field is `_1`"]
515 #[inline]
516 pub fn is_1(&self) -> bool {
517 *self == CONTR::_1
518 }
519}
520#[doc = r" Proxy"]
521pub struct _TXDATAW<'a> {
522 w: &'a mut W,
523}
524impl<'a> _TXDATAW<'a> {
525 #[doc = r" Writes raw bits to the field"]
526 #[inline]
527 pub unsafe fn bits(self, value: u16) -> &'a mut W {
528 const MASK: u16 = 65535;
529 const OFFSET: u8 = 0;
530 self.w.bits &= !((MASK as u32) << OFFSET);
531 self.w.bits |= ((value & MASK) as u32) << OFFSET;
532 self.w
533 }
534}
535#[doc = "Values that can be written to the field `PCS0`"]
536pub enum PCS0W {
537 #[doc = "Negate the PCS\\[x\\] signal."]
538 _0,
539 #[doc = "Assert the PCS\\[x\\] signal."]
540 _1,
541}
542impl PCS0W {
543 #[allow(missing_docs)]
544 #[doc(hidden)]
545 #[inline]
546 pub fn _bits(&self) -> bool {
547 match *self {
548 PCS0W::_0 => false,
549 PCS0W::_1 => true,
550 }
551 }
552}
553#[doc = r" Proxy"]
554pub struct _PCS0W<'a> {
555 w: &'a mut W,
556}
557impl<'a> _PCS0W<'a> {
558 #[doc = r" Writes `variant` to the field"]
559 #[inline]
560 pub fn variant(self, variant: PCS0W) -> &'a mut W {
561 {
562 self.bit(variant._bits())
563 }
564 }
565 #[doc = "Negate the PCS\\[x\\] signal."]
566 #[inline]
567 pub fn _0(self) -> &'a mut W {
568 self.variant(PCS0W::_0)
569 }
570 #[doc = "Assert the PCS\\[x\\] signal."]
571 #[inline]
572 pub fn _1(self) -> &'a mut W {
573 self.variant(PCS0W::_1)
574 }
575 #[doc = r" Sets the field bit"]
576 pub fn set_bit(self) -> &'a mut W {
577 self.bit(true)
578 }
579 #[doc = r" Clears the field bit"]
580 pub fn clear_bit(self) -> &'a mut W {
581 self.bit(false)
582 }
583 #[doc = r" Writes raw bits to the field"]
584 #[inline]
585 pub fn bit(self, value: bool) -> &'a mut W {
586 const MASK: bool = true;
587 const OFFSET: u8 = 16;
588 self.w.bits &= !((MASK as u32) << OFFSET);
589 self.w.bits |= ((value & MASK) as u32) << OFFSET;
590 self.w
591 }
592}
593#[doc = "Values that can be written to the field `PCS1`"]
594pub enum PCS1W {
595 #[doc = "Negate the PCS\\[x\\] signal."]
596 _0,
597 #[doc = "Assert the PCS\\[x\\] signal."]
598 _1,
599}
600impl PCS1W {
601 #[allow(missing_docs)]
602 #[doc(hidden)]
603 #[inline]
604 pub fn _bits(&self) -> bool {
605 match *self {
606 PCS1W::_0 => false,
607 PCS1W::_1 => true,
608 }
609 }
610}
611#[doc = r" Proxy"]
612pub struct _PCS1W<'a> {
613 w: &'a mut W,
614}
615impl<'a> _PCS1W<'a> {
616 #[doc = r" Writes `variant` to the field"]
617 #[inline]
618 pub fn variant(self, variant: PCS1W) -> &'a mut W {
619 {
620 self.bit(variant._bits())
621 }
622 }
623 #[doc = "Negate the PCS\\[x\\] signal."]
624 #[inline]
625 pub fn _0(self) -> &'a mut W {
626 self.variant(PCS1W::_0)
627 }
628 #[doc = "Assert the PCS\\[x\\] signal."]
629 #[inline]
630 pub fn _1(self) -> &'a mut W {
631 self.variant(PCS1W::_1)
632 }
633 #[doc = r" Sets the field bit"]
634 pub fn set_bit(self) -> &'a mut W {
635 self.bit(true)
636 }
637 #[doc = r" Clears the field bit"]
638 pub fn clear_bit(self) -> &'a mut W {
639 self.bit(false)
640 }
641 #[doc = r" Writes raw bits to the field"]
642 #[inline]
643 pub fn bit(self, value: bool) -> &'a mut W {
644 const MASK: bool = true;
645 const OFFSET: u8 = 17;
646 self.w.bits &= !((MASK as u32) << OFFSET);
647 self.w.bits |= ((value & MASK) as u32) << OFFSET;
648 self.w
649 }
650}
651#[doc = "Values that can be written to the field `PCS2`"]
652pub enum PCS2W {
653 #[doc = "Negate the PCS\\[x\\] signal."]
654 _0,
655 #[doc = "Assert the PCS\\[x\\] signal."]
656 _1,
657}
658impl PCS2W {
659 #[allow(missing_docs)]
660 #[doc(hidden)]
661 #[inline]
662 pub fn _bits(&self) -> bool {
663 match *self {
664 PCS2W::_0 => false,
665 PCS2W::_1 => true,
666 }
667 }
668}
669#[doc = r" Proxy"]
670pub struct _PCS2W<'a> {
671 w: &'a mut W,
672}
673impl<'a> _PCS2W<'a> {
674 #[doc = r" Writes `variant` to the field"]
675 #[inline]
676 pub fn variant(self, variant: PCS2W) -> &'a mut W {
677 {
678 self.bit(variant._bits())
679 }
680 }
681 #[doc = "Negate the PCS\\[x\\] signal."]
682 #[inline]
683 pub fn _0(self) -> &'a mut W {
684 self.variant(PCS2W::_0)
685 }
686 #[doc = "Assert the PCS\\[x\\] signal."]
687 #[inline]
688 pub fn _1(self) -> &'a mut W {
689 self.variant(PCS2W::_1)
690 }
691 #[doc = r" Sets the field bit"]
692 pub fn set_bit(self) -> &'a mut W {
693 self.bit(true)
694 }
695 #[doc = r" Clears the field bit"]
696 pub fn clear_bit(self) -> &'a mut W {
697 self.bit(false)
698 }
699 #[doc = r" Writes raw bits to the field"]
700 #[inline]
701 pub fn bit(self, value: bool) -> &'a mut W {
702 const MASK: bool = true;
703 const OFFSET: u8 = 18;
704 self.w.bits &= !((MASK as u32) << OFFSET);
705 self.w.bits |= ((value & MASK) as u32) << OFFSET;
706 self.w
707 }
708}
709#[doc = "Values that can be written to the field `PCS3`"]
710pub enum PCS3W {
711 #[doc = "Negate the PCS\\[x\\] signal."]
712 _0,
713 #[doc = "Assert the PCS\\[x\\] signal."]
714 _1,
715}
716impl PCS3W {
717 #[allow(missing_docs)]
718 #[doc(hidden)]
719 #[inline]
720 pub fn _bits(&self) -> bool {
721 match *self {
722 PCS3W::_0 => false,
723 PCS3W::_1 => true,
724 }
725 }
726}
727#[doc = r" Proxy"]
728pub struct _PCS3W<'a> {
729 w: &'a mut W,
730}
731impl<'a> _PCS3W<'a> {
732 #[doc = r" Writes `variant` to the field"]
733 #[inline]
734 pub fn variant(self, variant: PCS3W) -> &'a mut W {
735 {
736 self.bit(variant._bits())
737 }
738 }
739 #[doc = "Negate the PCS\\[x\\] signal."]
740 #[inline]
741 pub fn _0(self) -> &'a mut W {
742 self.variant(PCS3W::_0)
743 }
744 #[doc = "Assert the PCS\\[x\\] signal."]
745 #[inline]
746 pub fn _1(self) -> &'a mut W {
747 self.variant(PCS3W::_1)
748 }
749 #[doc = r" Sets the field bit"]
750 pub fn set_bit(self) -> &'a mut W {
751 self.bit(true)
752 }
753 #[doc = r" Clears the field bit"]
754 pub fn clear_bit(self) -> &'a mut W {
755 self.bit(false)
756 }
757 #[doc = r" Writes raw bits to the field"]
758 #[inline]
759 pub fn bit(self, value: bool) -> &'a mut W {
760 const MASK: bool = true;
761 const OFFSET: u8 = 19;
762 self.w.bits &= !((MASK as u32) << OFFSET);
763 self.w.bits |= ((value & MASK) as u32) << OFFSET;
764 self.w
765 }
766}
767#[doc = "Values that can be written to the field `PCS4`"]
768pub enum PCS4W {
769 #[doc = "Negate the PCS\\[x\\] signal."]
770 _0,
771 #[doc = "Assert the PCS\\[x\\] signal."]
772 _1,
773}
774impl PCS4W {
775 #[allow(missing_docs)]
776 #[doc(hidden)]
777 #[inline]
778 pub fn _bits(&self) -> bool {
779 match *self {
780 PCS4W::_0 => false,
781 PCS4W::_1 => true,
782 }
783 }
784}
785#[doc = r" Proxy"]
786pub struct _PCS4W<'a> {
787 w: &'a mut W,
788}
789impl<'a> _PCS4W<'a> {
790 #[doc = r" Writes `variant` to the field"]
791 #[inline]
792 pub fn variant(self, variant: PCS4W) -> &'a mut W {
793 {
794 self.bit(variant._bits())
795 }
796 }
797 #[doc = "Negate the PCS\\[x\\] signal."]
798 #[inline]
799 pub fn _0(self) -> &'a mut W {
800 self.variant(PCS4W::_0)
801 }
802 #[doc = "Assert the PCS\\[x\\] signal."]
803 #[inline]
804 pub fn _1(self) -> &'a mut W {
805 self.variant(PCS4W::_1)
806 }
807 #[doc = r" Sets the field bit"]
808 pub fn set_bit(self) -> &'a mut W {
809 self.bit(true)
810 }
811 #[doc = r" Clears the field bit"]
812 pub fn clear_bit(self) -> &'a mut W {
813 self.bit(false)
814 }
815 #[doc = r" Writes raw bits to the field"]
816 #[inline]
817 pub fn bit(self, value: bool) -> &'a mut W {
818 const MASK: bool = true;
819 const OFFSET: u8 = 20;
820 self.w.bits &= !((MASK as u32) << OFFSET);
821 self.w.bits |= ((value & MASK) as u32) << OFFSET;
822 self.w
823 }
824}
825#[doc = "Values that can be written to the field `PCS5`"]
826pub enum PCS5W {
827 #[doc = "Negate the PCS\\[x\\] signal."]
828 _0,
829 #[doc = "Assert the PCS\\[x\\] signal."]
830 _1,
831}
832impl PCS5W {
833 #[allow(missing_docs)]
834 #[doc(hidden)]
835 #[inline]
836 pub fn _bits(&self) -> bool {
837 match *self {
838 PCS5W::_0 => false,
839 PCS5W::_1 => true,
840 }
841 }
842}
843#[doc = r" Proxy"]
844pub struct _PCS5W<'a> {
845 w: &'a mut W,
846}
847impl<'a> _PCS5W<'a> {
848 #[doc = r" Writes `variant` to the field"]
849 #[inline]
850 pub fn variant(self, variant: PCS5W) -> &'a mut W {
851 {
852 self.bit(variant._bits())
853 }
854 }
855 #[doc = "Negate the PCS\\[x\\] signal."]
856 #[inline]
857 pub fn _0(self) -> &'a mut W {
858 self.variant(PCS5W::_0)
859 }
860 #[doc = "Assert the PCS\\[x\\] signal."]
861 #[inline]
862 pub fn _1(self) -> &'a mut W {
863 self.variant(PCS5W::_1)
864 }
865 #[doc = r" Sets the field bit"]
866 pub fn set_bit(self) -> &'a mut W {
867 self.bit(true)
868 }
869 #[doc = r" Clears the field bit"]
870 pub fn clear_bit(self) -> &'a mut W {
871 self.bit(false)
872 }
873 #[doc = r" Writes raw bits to the field"]
874 #[inline]
875 pub fn bit(self, value: bool) -> &'a mut W {
876 const MASK: bool = true;
877 const OFFSET: u8 = 21;
878 self.w.bits &= !((MASK as u32) << OFFSET);
879 self.w.bits |= ((value & MASK) as u32) << OFFSET;
880 self.w
881 }
882}
883#[doc = "Values that can be written to the field `CTCNT`"]
884pub enum CTCNTW {
885 #[doc = "Do not clear the TCR\\[TCNT\\] field."]
886 _0,
887 #[doc = "Clear the TCR\\[TCNT\\] field."]
888 _1,
889}
890impl CTCNTW {
891 #[allow(missing_docs)]
892 #[doc(hidden)]
893 #[inline]
894 pub fn _bits(&self) -> bool {
895 match *self {
896 CTCNTW::_0 => false,
897 CTCNTW::_1 => true,
898 }
899 }
900}
901#[doc = r" Proxy"]
902pub struct _CTCNTW<'a> {
903 w: &'a mut W,
904}
905impl<'a> _CTCNTW<'a> {
906 #[doc = r" Writes `variant` to the field"]
907 #[inline]
908 pub fn variant(self, variant: CTCNTW) -> &'a mut W {
909 {
910 self.bit(variant._bits())
911 }
912 }
913 #[doc = "Do not clear the TCR\\[TCNT\\] field."]
914 #[inline]
915 pub fn _0(self) -> &'a mut W {
916 self.variant(CTCNTW::_0)
917 }
918 #[doc = "Clear the TCR\\[TCNT\\] field."]
919 #[inline]
920 pub fn _1(self) -> &'a mut W {
921 self.variant(CTCNTW::_1)
922 }
923 #[doc = r" Sets the field bit"]
924 pub fn set_bit(self) -> &'a mut W {
925 self.bit(true)
926 }
927 #[doc = r" Clears the field bit"]
928 pub fn clear_bit(self) -> &'a mut W {
929 self.bit(false)
930 }
931 #[doc = r" Writes raw bits to the field"]
932 #[inline]
933 pub fn bit(self, value: bool) -> &'a mut W {
934 const MASK: bool = true;
935 const OFFSET: u8 = 26;
936 self.w.bits &= !((MASK as u32) << OFFSET);
937 self.w.bits |= ((value & MASK) as u32) << OFFSET;
938 self.w
939 }
940}
941#[doc = "Values that can be written to the field `EOQ`"]
942pub enum EOQW {
943 #[doc = "The SPI data is not the last data to transfer."]
944 _0,
945 #[doc = "The SPI data is the last data to transfer."]
946 _1,
947}
948impl EOQW {
949 #[allow(missing_docs)]
950 #[doc(hidden)]
951 #[inline]
952 pub fn _bits(&self) -> bool {
953 match *self {
954 EOQW::_0 => false,
955 EOQW::_1 => true,
956 }
957 }
958}
959#[doc = r" Proxy"]
960pub struct _EOQW<'a> {
961 w: &'a mut W,
962}
963impl<'a> _EOQW<'a> {
964 #[doc = r" Writes `variant` to the field"]
965 #[inline]
966 pub fn variant(self, variant: EOQW) -> &'a mut W {
967 {
968 self.bit(variant._bits())
969 }
970 }
971 #[doc = "The SPI data is not the last data to transfer."]
972 #[inline]
973 pub fn _0(self) -> &'a mut W {
974 self.variant(EOQW::_0)
975 }
976 #[doc = "The SPI data is the last data to transfer."]
977 #[inline]
978 pub fn _1(self) -> &'a mut W {
979 self.variant(EOQW::_1)
980 }
981 #[doc = r" Sets the field bit"]
982 pub fn set_bit(self) -> &'a mut W {
983 self.bit(true)
984 }
985 #[doc = r" Clears the field bit"]
986 pub fn clear_bit(self) -> &'a mut W {
987 self.bit(false)
988 }
989 #[doc = r" Writes raw bits to the field"]
990 #[inline]
991 pub fn bit(self, value: bool) -> &'a mut W {
992 const MASK: bool = true;
993 const OFFSET: u8 = 27;
994 self.w.bits &= !((MASK as u32) << OFFSET);
995 self.w.bits |= ((value & MASK) as u32) << OFFSET;
996 self.w
997 }
998}
999#[doc = "Values that can be written to the field `CTAS`"]
1000pub enum CTASW {
1001 #[doc = "CTAR0"]
1002 _000,
1003 #[doc = "CTAR1"]
1004 _001,
1005}
1006impl CTASW {
1007 #[allow(missing_docs)]
1008 #[doc(hidden)]
1009 #[inline]
1010 pub fn _bits(&self) -> u8 {
1011 match *self {
1012 CTASW::_000 => 0,
1013 CTASW::_001 => 1,
1014 }
1015 }
1016}
1017#[doc = r" Proxy"]
1018pub struct _CTASW<'a> {
1019 w: &'a mut W,
1020}
1021impl<'a> _CTASW<'a> {
1022 #[doc = r" Writes `variant` to the field"]
1023 #[inline]
1024 pub fn variant(self, variant: CTASW) -> &'a mut W {
1025 unsafe { self.bits(variant._bits()) }
1026 }
1027 #[doc = "CTAR0"]
1028 #[inline]
1029 pub fn _000(self) -> &'a mut W {
1030 self.variant(CTASW::_000)
1031 }
1032 #[doc = "CTAR1"]
1033 #[inline]
1034 pub fn _001(self) -> &'a mut W {
1035 self.variant(CTASW::_001)
1036 }
1037 #[doc = r" Writes raw bits to the field"]
1038 #[inline]
1039 pub unsafe fn bits(self, value: u8) -> &'a mut W {
1040 const MASK: u8 = 7;
1041 const OFFSET: u8 = 28;
1042 self.w.bits &= !((MASK as u32) << OFFSET);
1043 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1044 self.w
1045 }
1046}
1047#[doc = "Values that can be written to the field `CONT`"]
1048pub enum CONTW {
1049 #[doc = "Return PCSn signals to their inactive state between transfers."]
1050 _0,
1051 #[doc = "Keep PCSn signals asserted between transfers."]
1052 _1,
1053}
1054impl CONTW {
1055 #[allow(missing_docs)]
1056 #[doc(hidden)]
1057 #[inline]
1058 pub fn _bits(&self) -> bool {
1059 match *self {
1060 CONTW::_0 => false,
1061 CONTW::_1 => true,
1062 }
1063 }
1064}
1065#[doc = r" Proxy"]
1066pub struct _CONTW<'a> {
1067 w: &'a mut W,
1068}
1069impl<'a> _CONTW<'a> {
1070 #[doc = r" Writes `variant` to the field"]
1071 #[inline]
1072 pub fn variant(self, variant: CONTW) -> &'a mut W {
1073 {
1074 self.bit(variant._bits())
1075 }
1076 }
1077 #[doc = "Return PCSn signals to their inactive state between transfers."]
1078 #[inline]
1079 pub fn _0(self) -> &'a mut W {
1080 self.variant(CONTW::_0)
1081 }
1082 #[doc = "Keep PCSn signals asserted between transfers."]
1083 #[inline]
1084 pub fn _1(self) -> &'a mut W {
1085 self.variant(CONTW::_1)
1086 }
1087 #[doc = r" Sets the field bit"]
1088 pub fn set_bit(self) -> &'a mut W {
1089 self.bit(true)
1090 }
1091 #[doc = r" Clears the field bit"]
1092 pub fn clear_bit(self) -> &'a mut W {
1093 self.bit(false)
1094 }
1095 #[doc = r" Writes raw bits to the field"]
1096 #[inline]
1097 pub fn bit(self, value: bool) -> &'a mut W {
1098 const MASK: bool = true;
1099 const OFFSET: u8 = 31;
1100 self.w.bits &= !((MASK as u32) << OFFSET);
1101 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1102 self.w
1103 }
1104}
1105impl R {
1106 #[doc = r" Value of the register as raw bits"]
1107 #[inline]
1108 pub fn bits(&self) -> u32 {
1109 self.bits
1110 }
1111 #[doc = "Bits 0:15 - Transmit Data"]
1112 #[inline]
1113 pub fn txdata(&self) -> TXDATAR {
1114 let bits = {
1115 const MASK: u16 = 65535;
1116 const OFFSET: u8 = 0;
1117 ((self.bits >> OFFSET) & MASK as u32) as u16
1118 };
1119 TXDATAR { bits }
1120 }
1121 #[doc = "Bit 16 - Select which PCS signals are to be asserted for the transfer"]
1122 #[inline]
1123 pub fn pcs0(&self) -> PCS0R {
1124 PCS0R::_from({
1125 const MASK: bool = true;
1126 const OFFSET: u8 = 16;
1127 ((self.bits >> OFFSET) & MASK as u32) != 0
1128 })
1129 }
1130 #[doc = "Bit 17 - Select which PCS signals are to be asserted for the transfer"]
1131 #[inline]
1132 pub fn pcs1(&self) -> PCS1R {
1133 PCS1R::_from({
1134 const MASK: bool = true;
1135 const OFFSET: u8 = 17;
1136 ((self.bits >> OFFSET) & MASK as u32) != 0
1137 })
1138 }
1139 #[doc = "Bit 18 - Select which PCS signals are to be asserted for the transfer"]
1140 #[inline]
1141 pub fn pcs2(&self) -> PCS2R {
1142 PCS2R::_from({
1143 const MASK: bool = true;
1144 const OFFSET: u8 = 18;
1145 ((self.bits >> OFFSET) & MASK as u32) != 0
1146 })
1147 }
1148 #[doc = "Bit 19 - Select which PCS signals are to be asserted for the transfer"]
1149 #[inline]
1150 pub fn pcs3(&self) -> PCS3R {
1151 PCS3R::_from({
1152 const MASK: bool = true;
1153 const OFFSET: u8 = 19;
1154 ((self.bits >> OFFSET) & MASK as u32) != 0
1155 })
1156 }
1157 #[doc = "Bit 20 - Select which PCS signals are to be asserted for the transfer"]
1158 #[inline]
1159 pub fn pcs4(&self) -> PCS4R {
1160 PCS4R::_from({
1161 const MASK: bool = true;
1162 const OFFSET: u8 = 20;
1163 ((self.bits >> OFFSET) & MASK as u32) != 0
1164 })
1165 }
1166 #[doc = "Bit 21 - Select which PCS signals are to be asserted for the transfer"]
1167 #[inline]
1168 pub fn pcs5(&self) -> PCS5R {
1169 PCS5R::_from({
1170 const MASK: bool = true;
1171 const OFFSET: u8 = 21;
1172 ((self.bits >> OFFSET) & MASK as u32) != 0
1173 })
1174 }
1175 #[doc = "Bit 26 - Clear Transfer Counter"]
1176 #[inline]
1177 pub fn ctcnt(&self) -> CTCNTR {
1178 CTCNTR::_from({
1179 const MASK: bool = true;
1180 const OFFSET: u8 = 26;
1181 ((self.bits >> OFFSET) & MASK as u32) != 0
1182 })
1183 }
1184 #[doc = "Bit 27 - End Of Queue"]
1185 #[inline]
1186 pub fn eoq(&self) -> EOQR {
1187 EOQR::_from({
1188 const MASK: bool = true;
1189 const OFFSET: u8 = 27;
1190 ((self.bits >> OFFSET) & MASK as u32) != 0
1191 })
1192 }
1193 #[doc = "Bits 28:30 - Clock and Transfer Attributes Select"]
1194 #[inline]
1195 pub fn ctas(&self) -> CTASR {
1196 CTASR::_from({
1197 const MASK: u8 = 7;
1198 const OFFSET: u8 = 28;
1199 ((self.bits >> OFFSET) & MASK as u32) as u8
1200 })
1201 }
1202 #[doc = "Bit 31 - Continuous Peripheral Chip Select Enable"]
1203 #[inline]
1204 pub fn cont(&self) -> CONTR {
1205 CONTR::_from({
1206 const MASK: bool = true;
1207 const OFFSET: u8 = 31;
1208 ((self.bits >> OFFSET) & MASK as u32) != 0
1209 })
1210 }
1211}
1212impl W {
1213 #[doc = r" Reset value of the register"]
1214 #[inline]
1215 pub fn reset_value() -> W {
1216 W { bits: 0 }
1217 }
1218 #[doc = r" Writes raw bits to the register"]
1219 #[inline]
1220 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1221 self.bits = bits;
1222 self
1223 }
1224 #[doc = "Bits 0:15 - Transmit Data"]
1225 #[inline]
1226 pub fn txdata(&mut self) -> _TXDATAW {
1227 _TXDATAW { w: self }
1228 }
1229 #[doc = "Bit 16 - Select which PCS signals are to be asserted for the transfer"]
1230 #[inline]
1231 pub fn pcs0(&mut self) -> _PCS0W {
1232 _PCS0W { w: self }
1233 }
1234 #[doc = "Bit 17 - Select which PCS signals are to be asserted for the transfer"]
1235 #[inline]
1236 pub fn pcs1(&mut self) -> _PCS1W {
1237 _PCS1W { w: self }
1238 }
1239 #[doc = "Bit 18 - Select which PCS signals are to be asserted for the transfer"]
1240 #[inline]
1241 pub fn pcs2(&mut self) -> _PCS2W {
1242 _PCS2W { w: self }
1243 }
1244 #[doc = "Bit 19 - Select which PCS signals are to be asserted for the transfer"]
1245 #[inline]
1246 pub fn pcs3(&mut self) -> _PCS3W {
1247 _PCS3W { w: self }
1248 }
1249 #[doc = "Bit 20 - Select which PCS signals are to be asserted for the transfer"]
1250 #[inline]
1251 pub fn pcs4(&mut self) -> _PCS4W {
1252 _PCS4W { w: self }
1253 }
1254 #[doc = "Bit 21 - Select which PCS signals are to be asserted for the transfer"]
1255 #[inline]
1256 pub fn pcs5(&mut self) -> _PCS5W {
1257 _PCS5W { w: self }
1258 }
1259 #[doc = "Bit 26 - Clear Transfer Counter"]
1260 #[inline]
1261 pub fn ctcnt(&mut self) -> _CTCNTW {
1262 _CTCNTW { w: self }
1263 }
1264 #[doc = "Bit 27 - End Of Queue"]
1265 #[inline]
1266 pub fn eoq(&mut self) -> _EOQW {
1267 _EOQW { w: self }
1268 }
1269 #[doc = "Bits 28:30 - Clock and Transfer Attributes Select"]
1270 #[inline]
1271 pub fn ctas(&mut self) -> _CTASW {
1272 _CTASW { w: self }
1273 }
1274 #[doc = "Bit 31 - Continuous Peripheral Chip Select Enable"]
1275 #[inline]
1276 pub fn cont(&mut self) -> _CONTW {
1277 _CONTW { w: self }
1278 }
1279}