1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::CTRL1 {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = r" Value of the field"]
46pub struct PROPSEGR {
47 bits: u8,
48}
49impl PROPSEGR {
50 #[doc = r" Value of the field as raw bits"]
51 #[inline]
52 pub fn bits(&self) -> u8 {
53 self.bits
54 }
55}
56#[doc = "Possible values of the field `LOM`"]
57#[derive(Clone, Copy, Debug, PartialEq)]
58pub enum LOMR {
59 #[doc = "Listen-Only mode is deactivated."]
60 _0,
61 #[doc = "FlexCAN module operates in Listen-Only mode."]
62 _1,
63}
64impl LOMR {
65 #[doc = r" Returns `true` if the bit is clear (0)"]
66 #[inline]
67 pub fn bit_is_clear(&self) -> bool {
68 !self.bit()
69 }
70 #[doc = r" Returns `true` if the bit is set (1)"]
71 #[inline]
72 pub fn bit_is_set(&self) -> bool {
73 self.bit()
74 }
75 #[doc = r" Value of the field as raw bits"]
76 #[inline]
77 pub fn bit(&self) -> bool {
78 match *self {
79 LOMR::_0 => false,
80 LOMR::_1 => true,
81 }
82 }
83 #[allow(missing_docs)]
84 #[doc(hidden)]
85 #[inline]
86 pub fn _from(value: bool) -> LOMR {
87 match value {
88 false => LOMR::_0,
89 true => LOMR::_1,
90 }
91 }
92 #[doc = "Checks if the value of the field is `_0`"]
93 #[inline]
94 pub fn is_0(&self) -> bool {
95 *self == LOMR::_0
96 }
97 #[doc = "Checks if the value of the field is `_1`"]
98 #[inline]
99 pub fn is_1(&self) -> bool {
100 *self == LOMR::_1
101 }
102}
103#[doc = "Possible values of the field `LBUF`"]
104#[derive(Clone, Copy, Debug, PartialEq)]
105pub enum LBUFR {
106 #[doc = "Buffer with highest priority is transmitted first."]
107 _0,
108 #[doc = "Lowest number buffer is transmitted first."]
109 _1,
110}
111impl LBUFR {
112 #[doc = r" Returns `true` if the bit is clear (0)"]
113 #[inline]
114 pub fn bit_is_clear(&self) -> bool {
115 !self.bit()
116 }
117 #[doc = r" Returns `true` if the bit is set (1)"]
118 #[inline]
119 pub fn bit_is_set(&self) -> bool {
120 self.bit()
121 }
122 #[doc = r" Value of the field as raw bits"]
123 #[inline]
124 pub fn bit(&self) -> bool {
125 match *self {
126 LBUFR::_0 => false,
127 LBUFR::_1 => true,
128 }
129 }
130 #[allow(missing_docs)]
131 #[doc(hidden)]
132 #[inline]
133 pub fn _from(value: bool) -> LBUFR {
134 match value {
135 false => LBUFR::_0,
136 true => LBUFR::_1,
137 }
138 }
139 #[doc = "Checks if the value of the field is `_0`"]
140 #[inline]
141 pub fn is_0(&self) -> bool {
142 *self == LBUFR::_0
143 }
144 #[doc = "Checks if the value of the field is `_1`"]
145 #[inline]
146 pub fn is_1(&self) -> bool {
147 *self == LBUFR::_1
148 }
149}
150#[doc = "Possible values of the field `TSYN`"]
151#[derive(Clone, Copy, Debug, PartialEq)]
152pub enum TSYNR {
153 #[doc = "Timer Sync feature disabled"]
154 _0,
155 #[doc = "Timer Sync feature enabled"]
156 _1,
157}
158impl TSYNR {
159 #[doc = r" Returns `true` if the bit is clear (0)"]
160 #[inline]
161 pub fn bit_is_clear(&self) -> bool {
162 !self.bit()
163 }
164 #[doc = r" Returns `true` if the bit is set (1)"]
165 #[inline]
166 pub fn bit_is_set(&self) -> bool {
167 self.bit()
168 }
169 #[doc = r" Value of the field as raw bits"]
170 #[inline]
171 pub fn bit(&self) -> bool {
172 match *self {
173 TSYNR::_0 => false,
174 TSYNR::_1 => true,
175 }
176 }
177 #[allow(missing_docs)]
178 #[doc(hidden)]
179 #[inline]
180 pub fn _from(value: bool) -> TSYNR {
181 match value {
182 false => TSYNR::_0,
183 true => TSYNR::_1,
184 }
185 }
186 #[doc = "Checks if the value of the field is `_0`"]
187 #[inline]
188 pub fn is_0(&self) -> bool {
189 *self == TSYNR::_0
190 }
191 #[doc = "Checks if the value of the field is `_1`"]
192 #[inline]
193 pub fn is_1(&self) -> bool {
194 *self == TSYNR::_1
195 }
196}
197#[doc = "Possible values of the field `BOFFREC`"]
198#[derive(Clone, Copy, Debug, PartialEq)]
199pub enum BOFFRECR {
200 #[doc = "Automatic recovering from Bus Off state enabled, according to CAN Spec 2.0 part B."]
201 _0,
202 #[doc = "Automatic recovering from Bus Off state disabled."]
203 _1,
204}
205impl BOFFRECR {
206 #[doc = r" Returns `true` if the bit is clear (0)"]
207 #[inline]
208 pub fn bit_is_clear(&self) -> bool {
209 !self.bit()
210 }
211 #[doc = r" Returns `true` if the bit is set (1)"]
212 #[inline]
213 pub fn bit_is_set(&self) -> bool {
214 self.bit()
215 }
216 #[doc = r" Value of the field as raw bits"]
217 #[inline]
218 pub fn bit(&self) -> bool {
219 match *self {
220 BOFFRECR::_0 => false,
221 BOFFRECR::_1 => true,
222 }
223 }
224 #[allow(missing_docs)]
225 #[doc(hidden)]
226 #[inline]
227 pub fn _from(value: bool) -> BOFFRECR {
228 match value {
229 false => BOFFRECR::_0,
230 true => BOFFRECR::_1,
231 }
232 }
233 #[doc = "Checks if the value of the field is `_0`"]
234 #[inline]
235 pub fn is_0(&self) -> bool {
236 *self == BOFFRECR::_0
237 }
238 #[doc = "Checks if the value of the field is `_1`"]
239 #[inline]
240 pub fn is_1(&self) -> bool {
241 *self == BOFFRECR::_1
242 }
243}
244#[doc = "Possible values of the field `SMP`"]
245#[derive(Clone, Copy, Debug, PartialEq)]
246pub enum SMPR {
247 #[doc = "Just one sample is used to determine the bit value."]
248 _0,
249 #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
250 _1,
251}
252impl SMPR {
253 #[doc = r" Returns `true` if the bit is clear (0)"]
254 #[inline]
255 pub fn bit_is_clear(&self) -> bool {
256 !self.bit()
257 }
258 #[doc = r" Returns `true` if the bit is set (1)"]
259 #[inline]
260 pub fn bit_is_set(&self) -> bool {
261 self.bit()
262 }
263 #[doc = r" Value of the field as raw bits"]
264 #[inline]
265 pub fn bit(&self) -> bool {
266 match *self {
267 SMPR::_0 => false,
268 SMPR::_1 => true,
269 }
270 }
271 #[allow(missing_docs)]
272 #[doc(hidden)]
273 #[inline]
274 pub fn _from(value: bool) -> SMPR {
275 match value {
276 false => SMPR::_0,
277 true => SMPR::_1,
278 }
279 }
280 #[doc = "Checks if the value of the field is `_0`"]
281 #[inline]
282 pub fn is_0(&self) -> bool {
283 *self == SMPR::_0
284 }
285 #[doc = "Checks if the value of the field is `_1`"]
286 #[inline]
287 pub fn is_1(&self) -> bool {
288 *self == SMPR::_1
289 }
290}
291#[doc = "Possible values of the field `RWRNMSK`"]
292#[derive(Clone, Copy, Debug, PartialEq)]
293pub enum RWRNMSKR {
294 #[doc = "Rx Warning Interrupt disabled."]
295 _0,
296 #[doc = "Rx Warning Interrupt enabled."]
297 _1,
298}
299impl RWRNMSKR {
300 #[doc = r" Returns `true` if the bit is clear (0)"]
301 #[inline]
302 pub fn bit_is_clear(&self) -> bool {
303 !self.bit()
304 }
305 #[doc = r" Returns `true` if the bit is set (1)"]
306 #[inline]
307 pub fn bit_is_set(&self) -> bool {
308 self.bit()
309 }
310 #[doc = r" Value of the field as raw bits"]
311 #[inline]
312 pub fn bit(&self) -> bool {
313 match *self {
314 RWRNMSKR::_0 => false,
315 RWRNMSKR::_1 => true,
316 }
317 }
318 #[allow(missing_docs)]
319 #[doc(hidden)]
320 #[inline]
321 pub fn _from(value: bool) -> RWRNMSKR {
322 match value {
323 false => RWRNMSKR::_0,
324 true => RWRNMSKR::_1,
325 }
326 }
327 #[doc = "Checks if the value of the field is `_0`"]
328 #[inline]
329 pub fn is_0(&self) -> bool {
330 *self == RWRNMSKR::_0
331 }
332 #[doc = "Checks if the value of the field is `_1`"]
333 #[inline]
334 pub fn is_1(&self) -> bool {
335 *self == RWRNMSKR::_1
336 }
337}
338#[doc = "Possible values of the field `TWRNMSK`"]
339#[derive(Clone, Copy, Debug, PartialEq)]
340pub enum TWRNMSKR {
341 #[doc = "Tx Warning Interrupt disabled."]
342 _0,
343 #[doc = "Tx Warning Interrupt enabled."]
344 _1,
345}
346impl TWRNMSKR {
347 #[doc = r" Returns `true` if the bit is clear (0)"]
348 #[inline]
349 pub fn bit_is_clear(&self) -> bool {
350 !self.bit()
351 }
352 #[doc = r" Returns `true` if the bit is set (1)"]
353 #[inline]
354 pub fn bit_is_set(&self) -> bool {
355 self.bit()
356 }
357 #[doc = r" Value of the field as raw bits"]
358 #[inline]
359 pub fn bit(&self) -> bool {
360 match *self {
361 TWRNMSKR::_0 => false,
362 TWRNMSKR::_1 => true,
363 }
364 }
365 #[allow(missing_docs)]
366 #[doc(hidden)]
367 #[inline]
368 pub fn _from(value: bool) -> TWRNMSKR {
369 match value {
370 false => TWRNMSKR::_0,
371 true => TWRNMSKR::_1,
372 }
373 }
374 #[doc = "Checks if the value of the field is `_0`"]
375 #[inline]
376 pub fn is_0(&self) -> bool {
377 *self == TWRNMSKR::_0
378 }
379 #[doc = "Checks if the value of the field is `_1`"]
380 #[inline]
381 pub fn is_1(&self) -> bool {
382 *self == TWRNMSKR::_1
383 }
384}
385#[doc = "Possible values of the field `LPB`"]
386#[derive(Clone, Copy, Debug, PartialEq)]
387pub enum LPBR {
388 #[doc = "Loop Back disabled."]
389 _0,
390 #[doc = "Loop Back enabled."]
391 _1,
392}
393impl LPBR {
394 #[doc = r" Returns `true` if the bit is clear (0)"]
395 #[inline]
396 pub fn bit_is_clear(&self) -> bool {
397 !self.bit()
398 }
399 #[doc = r" Returns `true` if the bit is set (1)"]
400 #[inline]
401 pub fn bit_is_set(&self) -> bool {
402 self.bit()
403 }
404 #[doc = r" Value of the field as raw bits"]
405 #[inline]
406 pub fn bit(&self) -> bool {
407 match *self {
408 LPBR::_0 => false,
409 LPBR::_1 => true,
410 }
411 }
412 #[allow(missing_docs)]
413 #[doc(hidden)]
414 #[inline]
415 pub fn _from(value: bool) -> LPBR {
416 match value {
417 false => LPBR::_0,
418 true => LPBR::_1,
419 }
420 }
421 #[doc = "Checks if the value of the field is `_0`"]
422 #[inline]
423 pub fn is_0(&self) -> bool {
424 *self == LPBR::_0
425 }
426 #[doc = "Checks if the value of the field is `_1`"]
427 #[inline]
428 pub fn is_1(&self) -> bool {
429 *self == LPBR::_1
430 }
431}
432#[doc = "Possible values of the field `CLKSRC`"]
433#[derive(Clone, Copy, Debug, PartialEq)]
434pub enum CLKSRCR {
435 #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
436 _0,
437 #[doc = "The CAN engine clock source is the peripheral clock."]
438 _1,
439}
440impl CLKSRCR {
441 #[doc = r" Returns `true` if the bit is clear (0)"]
442 #[inline]
443 pub fn bit_is_clear(&self) -> bool {
444 !self.bit()
445 }
446 #[doc = r" Returns `true` if the bit is set (1)"]
447 #[inline]
448 pub fn bit_is_set(&self) -> bool {
449 self.bit()
450 }
451 #[doc = r" Value of the field as raw bits"]
452 #[inline]
453 pub fn bit(&self) -> bool {
454 match *self {
455 CLKSRCR::_0 => false,
456 CLKSRCR::_1 => true,
457 }
458 }
459 #[allow(missing_docs)]
460 #[doc(hidden)]
461 #[inline]
462 pub fn _from(value: bool) -> CLKSRCR {
463 match value {
464 false => CLKSRCR::_0,
465 true => CLKSRCR::_1,
466 }
467 }
468 #[doc = "Checks if the value of the field is `_0`"]
469 #[inline]
470 pub fn is_0(&self) -> bool {
471 *self == CLKSRCR::_0
472 }
473 #[doc = "Checks if the value of the field is `_1`"]
474 #[inline]
475 pub fn is_1(&self) -> bool {
476 *self == CLKSRCR::_1
477 }
478}
479#[doc = "Possible values of the field `ERRMSK`"]
480#[derive(Clone, Copy, Debug, PartialEq)]
481pub enum ERRMSKR {
482 #[doc = "Error interrupt disabled."]
483 _0,
484 #[doc = "Error interrupt enabled."]
485 _1,
486}
487impl ERRMSKR {
488 #[doc = r" Returns `true` if the bit is clear (0)"]
489 #[inline]
490 pub fn bit_is_clear(&self) -> bool {
491 !self.bit()
492 }
493 #[doc = r" Returns `true` if the bit is set (1)"]
494 #[inline]
495 pub fn bit_is_set(&self) -> bool {
496 self.bit()
497 }
498 #[doc = r" Value of the field as raw bits"]
499 #[inline]
500 pub fn bit(&self) -> bool {
501 match *self {
502 ERRMSKR::_0 => false,
503 ERRMSKR::_1 => true,
504 }
505 }
506 #[allow(missing_docs)]
507 #[doc(hidden)]
508 #[inline]
509 pub fn _from(value: bool) -> ERRMSKR {
510 match value {
511 false => ERRMSKR::_0,
512 true => ERRMSKR::_1,
513 }
514 }
515 #[doc = "Checks if the value of the field is `_0`"]
516 #[inline]
517 pub fn is_0(&self) -> bool {
518 *self == ERRMSKR::_0
519 }
520 #[doc = "Checks if the value of the field is `_1`"]
521 #[inline]
522 pub fn is_1(&self) -> bool {
523 *self == ERRMSKR::_1
524 }
525}
526#[doc = "Possible values of the field `BOFFMSK`"]
527#[derive(Clone, Copy, Debug, PartialEq)]
528pub enum BOFFMSKR {
529 #[doc = "Bus Off interrupt disabled."]
530 _0,
531 #[doc = "Bus Off interrupt enabled."]
532 _1,
533}
534impl BOFFMSKR {
535 #[doc = r" Returns `true` if the bit is clear (0)"]
536 #[inline]
537 pub fn bit_is_clear(&self) -> bool {
538 !self.bit()
539 }
540 #[doc = r" Returns `true` if the bit is set (1)"]
541 #[inline]
542 pub fn bit_is_set(&self) -> bool {
543 self.bit()
544 }
545 #[doc = r" Value of the field as raw bits"]
546 #[inline]
547 pub fn bit(&self) -> bool {
548 match *self {
549 BOFFMSKR::_0 => false,
550 BOFFMSKR::_1 => true,
551 }
552 }
553 #[allow(missing_docs)]
554 #[doc(hidden)]
555 #[inline]
556 pub fn _from(value: bool) -> BOFFMSKR {
557 match value {
558 false => BOFFMSKR::_0,
559 true => BOFFMSKR::_1,
560 }
561 }
562 #[doc = "Checks if the value of the field is `_0`"]
563 #[inline]
564 pub fn is_0(&self) -> bool {
565 *self == BOFFMSKR::_0
566 }
567 #[doc = "Checks if the value of the field is `_1`"]
568 #[inline]
569 pub fn is_1(&self) -> bool {
570 *self == BOFFMSKR::_1
571 }
572}
573#[doc = r" Value of the field"]
574pub struct PSEG2R {
575 bits: u8,
576}
577impl PSEG2R {
578 #[doc = r" Value of the field as raw bits"]
579 #[inline]
580 pub fn bits(&self) -> u8 {
581 self.bits
582 }
583}
584#[doc = r" Value of the field"]
585pub struct PSEG1R {
586 bits: u8,
587}
588impl PSEG1R {
589 #[doc = r" Value of the field as raw bits"]
590 #[inline]
591 pub fn bits(&self) -> u8 {
592 self.bits
593 }
594}
595#[doc = r" Value of the field"]
596pub struct RJWR {
597 bits: u8,
598}
599impl RJWR {
600 #[doc = r" Value of the field as raw bits"]
601 #[inline]
602 pub fn bits(&self) -> u8 {
603 self.bits
604 }
605}
606#[doc = r" Value of the field"]
607pub struct PRESDIVR {
608 bits: u8,
609}
610impl PRESDIVR {
611 #[doc = r" Value of the field as raw bits"]
612 #[inline]
613 pub fn bits(&self) -> u8 {
614 self.bits
615 }
616}
617#[doc = r" Proxy"]
618pub struct _PROPSEGW<'a> {
619 w: &'a mut W,
620}
621impl<'a> _PROPSEGW<'a> {
622 #[doc = r" Writes raw bits to the field"]
623 #[inline]
624 pub unsafe fn bits(self, value: u8) -> &'a mut W {
625 const MASK: u8 = 7;
626 const OFFSET: u8 = 0;
627 self.w.bits &= !((MASK as u32) << OFFSET);
628 self.w.bits |= ((value & MASK) as u32) << OFFSET;
629 self.w
630 }
631}
632#[doc = "Values that can be written to the field `LOM`"]
633pub enum LOMW {
634 #[doc = "Listen-Only mode is deactivated."]
635 _0,
636 #[doc = "FlexCAN module operates in Listen-Only mode."]
637 _1,
638}
639impl LOMW {
640 #[allow(missing_docs)]
641 #[doc(hidden)]
642 #[inline]
643 pub fn _bits(&self) -> bool {
644 match *self {
645 LOMW::_0 => false,
646 LOMW::_1 => true,
647 }
648 }
649}
650#[doc = r" Proxy"]
651pub struct _LOMW<'a> {
652 w: &'a mut W,
653}
654impl<'a> _LOMW<'a> {
655 #[doc = r" Writes `variant` to the field"]
656 #[inline]
657 pub fn variant(self, variant: LOMW) -> &'a mut W {
658 {
659 self.bit(variant._bits())
660 }
661 }
662 #[doc = "Listen-Only mode is deactivated."]
663 #[inline]
664 pub fn _0(self) -> &'a mut W {
665 self.variant(LOMW::_0)
666 }
667 #[doc = "FlexCAN module operates in Listen-Only mode."]
668 #[inline]
669 pub fn _1(self) -> &'a mut W {
670 self.variant(LOMW::_1)
671 }
672 #[doc = r" Sets the field bit"]
673 pub fn set_bit(self) -> &'a mut W {
674 self.bit(true)
675 }
676 #[doc = r" Clears the field bit"]
677 pub fn clear_bit(self) -> &'a mut W {
678 self.bit(false)
679 }
680 #[doc = r" Writes raw bits to the field"]
681 #[inline]
682 pub fn bit(self, value: bool) -> &'a mut W {
683 const MASK: bool = true;
684 const OFFSET: u8 = 3;
685 self.w.bits &= !((MASK as u32) << OFFSET);
686 self.w.bits |= ((value & MASK) as u32) << OFFSET;
687 self.w
688 }
689}
690#[doc = "Values that can be written to the field `LBUF`"]
691pub enum LBUFW {
692 #[doc = "Buffer with highest priority is transmitted first."]
693 _0,
694 #[doc = "Lowest number buffer is transmitted first."]
695 _1,
696}
697impl LBUFW {
698 #[allow(missing_docs)]
699 #[doc(hidden)]
700 #[inline]
701 pub fn _bits(&self) -> bool {
702 match *self {
703 LBUFW::_0 => false,
704 LBUFW::_1 => true,
705 }
706 }
707}
708#[doc = r" Proxy"]
709pub struct _LBUFW<'a> {
710 w: &'a mut W,
711}
712impl<'a> _LBUFW<'a> {
713 #[doc = r" Writes `variant` to the field"]
714 #[inline]
715 pub fn variant(self, variant: LBUFW) -> &'a mut W {
716 {
717 self.bit(variant._bits())
718 }
719 }
720 #[doc = "Buffer with highest priority is transmitted first."]
721 #[inline]
722 pub fn _0(self) -> &'a mut W {
723 self.variant(LBUFW::_0)
724 }
725 #[doc = "Lowest number buffer is transmitted first."]
726 #[inline]
727 pub fn _1(self) -> &'a mut W {
728 self.variant(LBUFW::_1)
729 }
730 #[doc = r" Sets the field bit"]
731 pub fn set_bit(self) -> &'a mut W {
732 self.bit(true)
733 }
734 #[doc = r" Clears the field bit"]
735 pub fn clear_bit(self) -> &'a mut W {
736 self.bit(false)
737 }
738 #[doc = r" Writes raw bits to the field"]
739 #[inline]
740 pub fn bit(self, value: bool) -> &'a mut W {
741 const MASK: bool = true;
742 const OFFSET: u8 = 4;
743 self.w.bits &= !((MASK as u32) << OFFSET);
744 self.w.bits |= ((value & MASK) as u32) << OFFSET;
745 self.w
746 }
747}
748#[doc = "Values that can be written to the field `TSYN`"]
749pub enum TSYNW {
750 #[doc = "Timer Sync feature disabled"]
751 _0,
752 #[doc = "Timer Sync feature enabled"]
753 _1,
754}
755impl TSYNW {
756 #[allow(missing_docs)]
757 #[doc(hidden)]
758 #[inline]
759 pub fn _bits(&self) -> bool {
760 match *self {
761 TSYNW::_0 => false,
762 TSYNW::_1 => true,
763 }
764 }
765}
766#[doc = r" Proxy"]
767pub struct _TSYNW<'a> {
768 w: &'a mut W,
769}
770impl<'a> _TSYNW<'a> {
771 #[doc = r" Writes `variant` to the field"]
772 #[inline]
773 pub fn variant(self, variant: TSYNW) -> &'a mut W {
774 {
775 self.bit(variant._bits())
776 }
777 }
778 #[doc = "Timer Sync feature disabled"]
779 #[inline]
780 pub fn _0(self) -> &'a mut W {
781 self.variant(TSYNW::_0)
782 }
783 #[doc = "Timer Sync feature enabled"]
784 #[inline]
785 pub fn _1(self) -> &'a mut W {
786 self.variant(TSYNW::_1)
787 }
788 #[doc = r" Sets the field bit"]
789 pub fn set_bit(self) -> &'a mut W {
790 self.bit(true)
791 }
792 #[doc = r" Clears the field bit"]
793 pub fn clear_bit(self) -> &'a mut W {
794 self.bit(false)
795 }
796 #[doc = r" Writes raw bits to the field"]
797 #[inline]
798 pub fn bit(self, value: bool) -> &'a mut W {
799 const MASK: bool = true;
800 const OFFSET: u8 = 5;
801 self.w.bits &= !((MASK as u32) << OFFSET);
802 self.w.bits |= ((value & MASK) as u32) << OFFSET;
803 self.w
804 }
805}
806#[doc = "Values that can be written to the field `BOFFREC`"]
807pub enum BOFFRECW {
808 #[doc = "Automatic recovering from Bus Off state enabled, according to CAN Spec 2.0 part B."]
809 _0,
810 #[doc = "Automatic recovering from Bus Off state disabled."]
811 _1,
812}
813impl BOFFRECW {
814 #[allow(missing_docs)]
815 #[doc(hidden)]
816 #[inline]
817 pub fn _bits(&self) -> bool {
818 match *self {
819 BOFFRECW::_0 => false,
820 BOFFRECW::_1 => true,
821 }
822 }
823}
824#[doc = r" Proxy"]
825pub struct _BOFFRECW<'a> {
826 w: &'a mut W,
827}
828impl<'a> _BOFFRECW<'a> {
829 #[doc = r" Writes `variant` to the field"]
830 #[inline]
831 pub fn variant(self, variant: BOFFRECW) -> &'a mut W {
832 {
833 self.bit(variant._bits())
834 }
835 }
836 #[doc = "Automatic recovering from Bus Off state enabled, according to CAN Spec 2.0 part B."]
837 #[inline]
838 pub fn _0(self) -> &'a mut W {
839 self.variant(BOFFRECW::_0)
840 }
841 #[doc = "Automatic recovering from Bus Off state disabled."]
842 #[inline]
843 pub fn _1(self) -> &'a mut W {
844 self.variant(BOFFRECW::_1)
845 }
846 #[doc = r" Sets the field bit"]
847 pub fn set_bit(self) -> &'a mut W {
848 self.bit(true)
849 }
850 #[doc = r" Clears the field bit"]
851 pub fn clear_bit(self) -> &'a mut W {
852 self.bit(false)
853 }
854 #[doc = r" Writes raw bits to the field"]
855 #[inline]
856 pub fn bit(self, value: bool) -> &'a mut W {
857 const MASK: bool = true;
858 const OFFSET: u8 = 6;
859 self.w.bits &= !((MASK as u32) << OFFSET);
860 self.w.bits |= ((value & MASK) as u32) << OFFSET;
861 self.w
862 }
863}
864#[doc = "Values that can be written to the field `SMP`"]
865pub enum SMPW {
866 #[doc = "Just one sample is used to determine the bit value."]
867 _0,
868 #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
869 _1,
870}
871impl SMPW {
872 #[allow(missing_docs)]
873 #[doc(hidden)]
874 #[inline]
875 pub fn _bits(&self) -> bool {
876 match *self {
877 SMPW::_0 => false,
878 SMPW::_1 => true,
879 }
880 }
881}
882#[doc = r" Proxy"]
883pub struct _SMPW<'a> {
884 w: &'a mut W,
885}
886impl<'a> _SMPW<'a> {
887 #[doc = r" Writes `variant` to the field"]
888 #[inline]
889 pub fn variant(self, variant: SMPW) -> &'a mut W {
890 {
891 self.bit(variant._bits())
892 }
893 }
894 #[doc = "Just one sample is used to determine the bit value."]
895 #[inline]
896 pub fn _0(self) -> &'a mut W {
897 self.variant(SMPW::_0)
898 }
899 #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
900 #[inline]
901 pub fn _1(self) -> &'a mut W {
902 self.variant(SMPW::_1)
903 }
904 #[doc = r" Sets the field bit"]
905 pub fn set_bit(self) -> &'a mut W {
906 self.bit(true)
907 }
908 #[doc = r" Clears the field bit"]
909 pub fn clear_bit(self) -> &'a mut W {
910 self.bit(false)
911 }
912 #[doc = r" Writes raw bits to the field"]
913 #[inline]
914 pub fn bit(self, value: bool) -> &'a mut W {
915 const MASK: bool = true;
916 const OFFSET: u8 = 7;
917 self.w.bits &= !((MASK as u32) << OFFSET);
918 self.w.bits |= ((value & MASK) as u32) << OFFSET;
919 self.w
920 }
921}
922#[doc = "Values that can be written to the field `RWRNMSK`"]
923pub enum RWRNMSKW {
924 #[doc = "Rx Warning Interrupt disabled."]
925 _0,
926 #[doc = "Rx Warning Interrupt enabled."]
927 _1,
928}
929impl RWRNMSKW {
930 #[allow(missing_docs)]
931 #[doc(hidden)]
932 #[inline]
933 pub fn _bits(&self) -> bool {
934 match *self {
935 RWRNMSKW::_0 => false,
936 RWRNMSKW::_1 => true,
937 }
938 }
939}
940#[doc = r" Proxy"]
941pub struct _RWRNMSKW<'a> {
942 w: &'a mut W,
943}
944impl<'a> _RWRNMSKW<'a> {
945 #[doc = r" Writes `variant` to the field"]
946 #[inline]
947 pub fn variant(self, variant: RWRNMSKW) -> &'a mut W {
948 {
949 self.bit(variant._bits())
950 }
951 }
952 #[doc = "Rx Warning Interrupt disabled."]
953 #[inline]
954 pub fn _0(self) -> &'a mut W {
955 self.variant(RWRNMSKW::_0)
956 }
957 #[doc = "Rx Warning Interrupt enabled."]
958 #[inline]
959 pub fn _1(self) -> &'a mut W {
960 self.variant(RWRNMSKW::_1)
961 }
962 #[doc = r" Sets the field bit"]
963 pub fn set_bit(self) -> &'a mut W {
964 self.bit(true)
965 }
966 #[doc = r" Clears the field bit"]
967 pub fn clear_bit(self) -> &'a mut W {
968 self.bit(false)
969 }
970 #[doc = r" Writes raw bits to the field"]
971 #[inline]
972 pub fn bit(self, value: bool) -> &'a mut W {
973 const MASK: bool = true;
974 const OFFSET: u8 = 10;
975 self.w.bits &= !((MASK as u32) << OFFSET);
976 self.w.bits |= ((value & MASK) as u32) << OFFSET;
977 self.w
978 }
979}
980#[doc = "Values that can be written to the field `TWRNMSK`"]
981pub enum TWRNMSKW {
982 #[doc = "Tx Warning Interrupt disabled."]
983 _0,
984 #[doc = "Tx Warning Interrupt enabled."]
985 _1,
986}
987impl TWRNMSKW {
988 #[allow(missing_docs)]
989 #[doc(hidden)]
990 #[inline]
991 pub fn _bits(&self) -> bool {
992 match *self {
993 TWRNMSKW::_0 => false,
994 TWRNMSKW::_1 => true,
995 }
996 }
997}
998#[doc = r" Proxy"]
999pub struct _TWRNMSKW<'a> {
1000 w: &'a mut W,
1001}
1002impl<'a> _TWRNMSKW<'a> {
1003 #[doc = r" Writes `variant` to the field"]
1004 #[inline]
1005 pub fn variant(self, variant: TWRNMSKW) -> &'a mut W {
1006 {
1007 self.bit(variant._bits())
1008 }
1009 }
1010 #[doc = "Tx Warning Interrupt disabled."]
1011 #[inline]
1012 pub fn _0(self) -> &'a mut W {
1013 self.variant(TWRNMSKW::_0)
1014 }
1015 #[doc = "Tx Warning Interrupt enabled."]
1016 #[inline]
1017 pub fn _1(self) -> &'a mut W {
1018 self.variant(TWRNMSKW::_1)
1019 }
1020 #[doc = r" Sets the field bit"]
1021 pub fn set_bit(self) -> &'a mut W {
1022 self.bit(true)
1023 }
1024 #[doc = r" Clears the field bit"]
1025 pub fn clear_bit(self) -> &'a mut W {
1026 self.bit(false)
1027 }
1028 #[doc = r" Writes raw bits to the field"]
1029 #[inline]
1030 pub fn bit(self, value: bool) -> &'a mut W {
1031 const MASK: bool = true;
1032 const OFFSET: u8 = 11;
1033 self.w.bits &= !((MASK as u32) << OFFSET);
1034 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1035 self.w
1036 }
1037}
1038#[doc = "Values that can be written to the field `LPB`"]
1039pub enum LPBW {
1040 #[doc = "Loop Back disabled."]
1041 _0,
1042 #[doc = "Loop Back enabled."]
1043 _1,
1044}
1045impl LPBW {
1046 #[allow(missing_docs)]
1047 #[doc(hidden)]
1048 #[inline]
1049 pub fn _bits(&self) -> bool {
1050 match *self {
1051 LPBW::_0 => false,
1052 LPBW::_1 => true,
1053 }
1054 }
1055}
1056#[doc = r" Proxy"]
1057pub struct _LPBW<'a> {
1058 w: &'a mut W,
1059}
1060impl<'a> _LPBW<'a> {
1061 #[doc = r" Writes `variant` to the field"]
1062 #[inline]
1063 pub fn variant(self, variant: LPBW) -> &'a mut W {
1064 {
1065 self.bit(variant._bits())
1066 }
1067 }
1068 #[doc = "Loop Back disabled."]
1069 #[inline]
1070 pub fn _0(self) -> &'a mut W {
1071 self.variant(LPBW::_0)
1072 }
1073 #[doc = "Loop Back enabled."]
1074 #[inline]
1075 pub fn _1(self) -> &'a mut W {
1076 self.variant(LPBW::_1)
1077 }
1078 #[doc = r" Sets the field bit"]
1079 pub fn set_bit(self) -> &'a mut W {
1080 self.bit(true)
1081 }
1082 #[doc = r" Clears the field bit"]
1083 pub fn clear_bit(self) -> &'a mut W {
1084 self.bit(false)
1085 }
1086 #[doc = r" Writes raw bits to the field"]
1087 #[inline]
1088 pub fn bit(self, value: bool) -> &'a mut W {
1089 const MASK: bool = true;
1090 const OFFSET: u8 = 12;
1091 self.w.bits &= !((MASK as u32) << OFFSET);
1092 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1093 self.w
1094 }
1095}
1096#[doc = "Values that can be written to the field `CLKSRC`"]
1097pub enum CLKSRCW {
1098 #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
1099 _0,
1100 #[doc = "The CAN engine clock source is the peripheral clock."]
1101 _1,
1102}
1103impl CLKSRCW {
1104 #[allow(missing_docs)]
1105 #[doc(hidden)]
1106 #[inline]
1107 pub fn _bits(&self) -> bool {
1108 match *self {
1109 CLKSRCW::_0 => false,
1110 CLKSRCW::_1 => true,
1111 }
1112 }
1113}
1114#[doc = r" Proxy"]
1115pub struct _CLKSRCW<'a> {
1116 w: &'a mut W,
1117}
1118impl<'a> _CLKSRCW<'a> {
1119 #[doc = r" Writes `variant` to the field"]
1120 #[inline]
1121 pub fn variant(self, variant: CLKSRCW) -> &'a mut W {
1122 {
1123 self.bit(variant._bits())
1124 }
1125 }
1126 #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
1127 #[inline]
1128 pub fn _0(self) -> &'a mut W {
1129 self.variant(CLKSRCW::_0)
1130 }
1131 #[doc = "The CAN engine clock source is the peripheral clock."]
1132 #[inline]
1133 pub fn _1(self) -> &'a mut W {
1134 self.variant(CLKSRCW::_1)
1135 }
1136 #[doc = r" Sets the field bit"]
1137 pub fn set_bit(self) -> &'a mut W {
1138 self.bit(true)
1139 }
1140 #[doc = r" Clears the field bit"]
1141 pub fn clear_bit(self) -> &'a mut W {
1142 self.bit(false)
1143 }
1144 #[doc = r" Writes raw bits to the field"]
1145 #[inline]
1146 pub fn bit(self, value: bool) -> &'a mut W {
1147 const MASK: bool = true;
1148 const OFFSET: u8 = 13;
1149 self.w.bits &= !((MASK as u32) << OFFSET);
1150 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1151 self.w
1152 }
1153}
1154#[doc = "Values that can be written to the field `ERRMSK`"]
1155pub enum ERRMSKW {
1156 #[doc = "Error interrupt disabled."]
1157 _0,
1158 #[doc = "Error interrupt enabled."]
1159 _1,
1160}
1161impl ERRMSKW {
1162 #[allow(missing_docs)]
1163 #[doc(hidden)]
1164 #[inline]
1165 pub fn _bits(&self) -> bool {
1166 match *self {
1167 ERRMSKW::_0 => false,
1168 ERRMSKW::_1 => true,
1169 }
1170 }
1171}
1172#[doc = r" Proxy"]
1173pub struct _ERRMSKW<'a> {
1174 w: &'a mut W,
1175}
1176impl<'a> _ERRMSKW<'a> {
1177 #[doc = r" Writes `variant` to the field"]
1178 #[inline]
1179 pub fn variant(self, variant: ERRMSKW) -> &'a mut W {
1180 {
1181 self.bit(variant._bits())
1182 }
1183 }
1184 #[doc = "Error interrupt disabled."]
1185 #[inline]
1186 pub fn _0(self) -> &'a mut W {
1187 self.variant(ERRMSKW::_0)
1188 }
1189 #[doc = "Error interrupt enabled."]
1190 #[inline]
1191 pub fn _1(self) -> &'a mut W {
1192 self.variant(ERRMSKW::_1)
1193 }
1194 #[doc = r" Sets the field bit"]
1195 pub fn set_bit(self) -> &'a mut W {
1196 self.bit(true)
1197 }
1198 #[doc = r" Clears the field bit"]
1199 pub fn clear_bit(self) -> &'a mut W {
1200 self.bit(false)
1201 }
1202 #[doc = r" Writes raw bits to the field"]
1203 #[inline]
1204 pub fn bit(self, value: bool) -> &'a mut W {
1205 const MASK: bool = true;
1206 const OFFSET: u8 = 14;
1207 self.w.bits &= !((MASK as u32) << OFFSET);
1208 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1209 self.w
1210 }
1211}
1212#[doc = "Values that can be written to the field `BOFFMSK`"]
1213pub enum BOFFMSKW {
1214 #[doc = "Bus Off interrupt disabled."]
1215 _0,
1216 #[doc = "Bus Off interrupt enabled."]
1217 _1,
1218}
1219impl BOFFMSKW {
1220 #[allow(missing_docs)]
1221 #[doc(hidden)]
1222 #[inline]
1223 pub fn _bits(&self) -> bool {
1224 match *self {
1225 BOFFMSKW::_0 => false,
1226 BOFFMSKW::_1 => true,
1227 }
1228 }
1229}
1230#[doc = r" Proxy"]
1231pub struct _BOFFMSKW<'a> {
1232 w: &'a mut W,
1233}
1234impl<'a> _BOFFMSKW<'a> {
1235 #[doc = r" Writes `variant` to the field"]
1236 #[inline]
1237 pub fn variant(self, variant: BOFFMSKW) -> &'a mut W {
1238 {
1239 self.bit(variant._bits())
1240 }
1241 }
1242 #[doc = "Bus Off interrupt disabled."]
1243 #[inline]
1244 pub fn _0(self) -> &'a mut W {
1245 self.variant(BOFFMSKW::_0)
1246 }
1247 #[doc = "Bus Off interrupt enabled."]
1248 #[inline]
1249 pub fn _1(self) -> &'a mut W {
1250 self.variant(BOFFMSKW::_1)
1251 }
1252 #[doc = r" Sets the field bit"]
1253 pub fn set_bit(self) -> &'a mut W {
1254 self.bit(true)
1255 }
1256 #[doc = r" Clears the field bit"]
1257 pub fn clear_bit(self) -> &'a mut W {
1258 self.bit(false)
1259 }
1260 #[doc = r" Writes raw bits to the field"]
1261 #[inline]
1262 pub fn bit(self, value: bool) -> &'a mut W {
1263 const MASK: bool = true;
1264 const OFFSET: u8 = 15;
1265 self.w.bits &= !((MASK as u32) << OFFSET);
1266 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1267 self.w
1268 }
1269}
1270#[doc = r" Proxy"]
1271pub struct _PSEG2W<'a> {
1272 w: &'a mut W,
1273}
1274impl<'a> _PSEG2W<'a> {
1275 #[doc = r" Writes raw bits to the field"]
1276 #[inline]
1277 pub unsafe fn bits(self, value: u8) -> &'a mut W {
1278 const MASK: u8 = 7;
1279 const OFFSET: u8 = 16;
1280 self.w.bits &= !((MASK as u32) << OFFSET);
1281 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1282 self.w
1283 }
1284}
1285#[doc = r" Proxy"]
1286pub struct _PSEG1W<'a> {
1287 w: &'a mut W,
1288}
1289impl<'a> _PSEG1W<'a> {
1290 #[doc = r" Writes raw bits to the field"]
1291 #[inline]
1292 pub unsafe fn bits(self, value: u8) -> &'a mut W {
1293 const MASK: u8 = 7;
1294 const OFFSET: u8 = 19;
1295 self.w.bits &= !((MASK as u32) << OFFSET);
1296 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1297 self.w
1298 }
1299}
1300#[doc = r" Proxy"]
1301pub struct _RJWW<'a> {
1302 w: &'a mut W,
1303}
1304impl<'a> _RJWW<'a> {
1305 #[doc = r" Writes raw bits to the field"]
1306 #[inline]
1307 pub unsafe fn bits(self, value: u8) -> &'a mut W {
1308 const MASK: u8 = 3;
1309 const OFFSET: u8 = 22;
1310 self.w.bits &= !((MASK as u32) << OFFSET);
1311 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1312 self.w
1313 }
1314}
1315#[doc = r" Proxy"]
1316pub struct _PRESDIVW<'a> {
1317 w: &'a mut W,
1318}
1319impl<'a> _PRESDIVW<'a> {
1320 #[doc = r" Writes raw bits to the field"]
1321 #[inline]
1322 pub unsafe fn bits(self, value: u8) -> &'a mut W {
1323 const MASK: u8 = 255;
1324 const OFFSET: u8 = 24;
1325 self.w.bits &= !((MASK as u32) << OFFSET);
1326 self.w.bits |= ((value & MASK) as u32) << OFFSET;
1327 self.w
1328 }
1329}
1330impl R {
1331 #[doc = r" Value of the register as raw bits"]
1332 #[inline]
1333 pub fn bits(&self) -> u32 {
1334 self.bits
1335 }
1336 #[doc = "Bits 0:2 - Propagation Segment"]
1337 #[inline]
1338 pub fn propseg(&self) -> PROPSEGR {
1339 let bits = {
1340 const MASK: u8 = 7;
1341 const OFFSET: u8 = 0;
1342 ((self.bits >> OFFSET) & MASK as u32) as u8
1343 };
1344 PROPSEGR { bits }
1345 }
1346 #[doc = "Bit 3 - Listen-Only Mode"]
1347 #[inline]
1348 pub fn lom(&self) -> LOMR {
1349 LOMR::_from({
1350 const MASK: bool = true;
1351 const OFFSET: u8 = 3;
1352 ((self.bits >> OFFSET) & MASK as u32) != 0
1353 })
1354 }
1355 #[doc = "Bit 4 - Lowest Buffer Transmitted First"]
1356 #[inline]
1357 pub fn lbuf(&self) -> LBUFR {
1358 LBUFR::_from({
1359 const MASK: bool = true;
1360 const OFFSET: u8 = 4;
1361 ((self.bits >> OFFSET) & MASK as u32) != 0
1362 })
1363 }
1364 #[doc = "Bit 5 - Timer Sync"]
1365 #[inline]
1366 pub fn tsyn(&self) -> TSYNR {
1367 TSYNR::_from({
1368 const MASK: bool = true;
1369 const OFFSET: u8 = 5;
1370 ((self.bits >> OFFSET) & MASK as u32) != 0
1371 })
1372 }
1373 #[doc = "Bit 6 - Bus Off Recovery"]
1374 #[inline]
1375 pub fn boffrec(&self) -> BOFFRECR {
1376 BOFFRECR::_from({
1377 const MASK: bool = true;
1378 const OFFSET: u8 = 6;
1379 ((self.bits >> OFFSET) & MASK as u32) != 0
1380 })
1381 }
1382 #[doc = "Bit 7 - CAN Bit Sampling"]
1383 #[inline]
1384 pub fn smp(&self) -> SMPR {
1385 SMPR::_from({
1386 const MASK: bool = true;
1387 const OFFSET: u8 = 7;
1388 ((self.bits >> OFFSET) & MASK as u32) != 0
1389 })
1390 }
1391 #[doc = "Bit 10 - Rx Warning Interrupt Mask"]
1392 #[inline]
1393 pub fn rwrnmsk(&self) -> RWRNMSKR {
1394 RWRNMSKR::_from({
1395 const MASK: bool = true;
1396 const OFFSET: u8 = 10;
1397 ((self.bits >> OFFSET) & MASK as u32) != 0
1398 })
1399 }
1400 #[doc = "Bit 11 - Tx Warning Interrupt Mask"]
1401 #[inline]
1402 pub fn twrnmsk(&self) -> TWRNMSKR {
1403 TWRNMSKR::_from({
1404 const MASK: bool = true;
1405 const OFFSET: u8 = 11;
1406 ((self.bits >> OFFSET) & MASK as u32) != 0
1407 })
1408 }
1409 #[doc = "Bit 12 - Loop Back Mode"]
1410 #[inline]
1411 pub fn lpb(&self) -> LPBR {
1412 LPBR::_from({
1413 const MASK: bool = true;
1414 const OFFSET: u8 = 12;
1415 ((self.bits >> OFFSET) & MASK as u32) != 0
1416 })
1417 }
1418 #[doc = "Bit 13 - CAN Engine Clock Source"]
1419 #[inline]
1420 pub fn clksrc(&self) -> CLKSRCR {
1421 CLKSRCR::_from({
1422 const MASK: bool = true;
1423 const OFFSET: u8 = 13;
1424 ((self.bits >> OFFSET) & MASK as u32) != 0
1425 })
1426 }
1427 #[doc = "Bit 14 - Error Mask"]
1428 #[inline]
1429 pub fn errmsk(&self) -> ERRMSKR {
1430 ERRMSKR::_from({
1431 const MASK: bool = true;
1432 const OFFSET: u8 = 14;
1433 ((self.bits >> OFFSET) & MASK as u32) != 0
1434 })
1435 }
1436 #[doc = "Bit 15 - Bus Off Mask"]
1437 #[inline]
1438 pub fn boffmsk(&self) -> BOFFMSKR {
1439 BOFFMSKR::_from({
1440 const MASK: bool = true;
1441 const OFFSET: u8 = 15;
1442 ((self.bits >> OFFSET) & MASK as u32) != 0
1443 })
1444 }
1445 #[doc = "Bits 16:18 - Phase Segment 2"]
1446 #[inline]
1447 pub fn pseg2(&self) -> PSEG2R {
1448 let bits = {
1449 const MASK: u8 = 7;
1450 const OFFSET: u8 = 16;
1451 ((self.bits >> OFFSET) & MASK as u32) as u8
1452 };
1453 PSEG2R { bits }
1454 }
1455 #[doc = "Bits 19:21 - Phase Segment 1"]
1456 #[inline]
1457 pub fn pseg1(&self) -> PSEG1R {
1458 let bits = {
1459 const MASK: u8 = 7;
1460 const OFFSET: u8 = 19;
1461 ((self.bits >> OFFSET) & MASK as u32) as u8
1462 };
1463 PSEG1R { bits }
1464 }
1465 #[doc = "Bits 22:23 - Resync Jump Width"]
1466 #[inline]
1467 pub fn rjw(&self) -> RJWR {
1468 let bits = {
1469 const MASK: u8 = 3;
1470 const OFFSET: u8 = 22;
1471 ((self.bits >> OFFSET) & MASK as u32) as u8
1472 };
1473 RJWR { bits }
1474 }
1475 #[doc = "Bits 24:31 - Prescaler Division Factor"]
1476 #[inline]
1477 pub fn presdiv(&self) -> PRESDIVR {
1478 let bits = {
1479 const MASK: u8 = 255;
1480 const OFFSET: u8 = 24;
1481 ((self.bits >> OFFSET) & MASK as u32) as u8
1482 };
1483 PRESDIVR { bits }
1484 }
1485}
1486impl W {
1487 #[doc = r" Reset value of the register"]
1488 #[inline]
1489 pub fn reset_value() -> W {
1490 W { bits: 0 }
1491 }
1492 #[doc = r" Writes raw bits to the register"]
1493 #[inline]
1494 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1495 self.bits = bits;
1496 self
1497 }
1498 #[doc = "Bits 0:2 - Propagation Segment"]
1499 #[inline]
1500 pub fn propseg(&mut self) -> _PROPSEGW {
1501 _PROPSEGW { w: self }
1502 }
1503 #[doc = "Bit 3 - Listen-Only Mode"]
1504 #[inline]
1505 pub fn lom(&mut self) -> _LOMW {
1506 _LOMW { w: self }
1507 }
1508 #[doc = "Bit 4 - Lowest Buffer Transmitted First"]
1509 #[inline]
1510 pub fn lbuf(&mut self) -> _LBUFW {
1511 _LBUFW { w: self }
1512 }
1513 #[doc = "Bit 5 - Timer Sync"]
1514 #[inline]
1515 pub fn tsyn(&mut self) -> _TSYNW {
1516 _TSYNW { w: self }
1517 }
1518 #[doc = "Bit 6 - Bus Off Recovery"]
1519 #[inline]
1520 pub fn boffrec(&mut self) -> _BOFFRECW {
1521 _BOFFRECW { w: self }
1522 }
1523 #[doc = "Bit 7 - CAN Bit Sampling"]
1524 #[inline]
1525 pub fn smp(&mut self) -> _SMPW {
1526 _SMPW { w: self }
1527 }
1528 #[doc = "Bit 10 - Rx Warning Interrupt Mask"]
1529 #[inline]
1530 pub fn rwrnmsk(&mut self) -> _RWRNMSKW {
1531 _RWRNMSKW { w: self }
1532 }
1533 #[doc = "Bit 11 - Tx Warning Interrupt Mask"]
1534 #[inline]
1535 pub fn twrnmsk(&mut self) -> _TWRNMSKW {
1536 _TWRNMSKW { w: self }
1537 }
1538 #[doc = "Bit 12 - Loop Back Mode"]
1539 #[inline]
1540 pub fn lpb(&mut self) -> _LPBW {
1541 _LPBW { w: self }
1542 }
1543 #[doc = "Bit 13 - CAN Engine Clock Source"]
1544 #[inline]
1545 pub fn clksrc(&mut self) -> _CLKSRCW {
1546 _CLKSRCW { w: self }
1547 }
1548 #[doc = "Bit 14 - Error Mask"]
1549 #[inline]
1550 pub fn errmsk(&mut self) -> _ERRMSKW {
1551 _ERRMSKW { w: self }
1552 }
1553 #[doc = "Bit 15 - Bus Off Mask"]
1554 #[inline]
1555 pub fn boffmsk(&mut self) -> _BOFFMSKW {
1556 _BOFFMSKW { w: self }
1557 }
1558 #[doc = "Bits 16:18 - Phase Segment 2"]
1559 #[inline]
1560 pub fn pseg2(&mut self) -> _PSEG2W {
1561 _PSEG2W { w: self }
1562 }
1563 #[doc = "Bits 19:21 - Phase Segment 1"]
1564 #[inline]
1565 pub fn pseg1(&mut self) -> _PSEG1W {
1566 _PSEG1W { w: self }
1567 }
1568 #[doc = "Bits 22:23 - Resync Jump Width"]
1569 #[inline]
1570 pub fn rjw(&mut self) -> _RJWW {
1571 _RJWW { w: self }
1572 }
1573 #[doc = "Bits 24:31 - Prescaler Division Factor"]
1574 #[inline]
1575 pub fn presdiv(&mut self) -> _PRESDIVW {
1576 _PRESDIVW { w: self }
1577 }
1578}