1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176
#[doc = r" Register block"] #[repr(C)] pub struct RegisterBlock { _reserved0: [u8; 8usize], #[doc = "0x08 - Auxiliary Control Register,"] pub actlr: ACTLR, _reserved1: [u8; 3316usize], #[doc = "0xd00 - CPUID Base Register"] pub cpuid: CPUID, #[doc = "0xd04 - Interrupt Control and State Register"] pub icsr: ICSR, #[doc = "0xd08 - Vector Table Offset Register"] pub vtor: VTOR, #[doc = "0xd0c - Application Interrupt and Reset Control Register"] pub aircr: AIRCR, #[doc = "0xd10 - System Control Register"] pub scr: SCR, #[doc = "0xd14 - Configuration and Control Register"] pub ccr: CCR, #[doc = "0xd18 - System Handler Priority Register 1"] pub shpr1: SHPR1, #[doc = "0xd1c - System Handler Priority Register 2"] pub shpr2: SHPR2, #[doc = "0xd20 - System Handler Priority Register 3"] pub shpr3: SHPR3, #[doc = "0xd24 - System Handler Control and State Register"] pub shcsr: SHCSR, #[doc = "0xd28 - Configurable Fault Status Registers"] pub cfsr: CFSR, #[doc = "0xd2c - HardFault Status register"] pub hfsr: HFSR, #[doc = "0xd30 - Debug Fault Status Register"] pub dfsr: DFSR, #[doc = "0xd34 - MemManage Address Register"] pub mmfar: MMFAR, #[doc = "0xd38 - BusFault Address Register"] pub bfar: BFAR, #[doc = "0xd3c - Auxiliary Fault Status Register"] pub afsr: AFSR, _reserved2: [u8; 72usize], #[doc = "0xd88 - Coprocessor Access Control Register"] pub cpacr: CPACR, _reserved3: [u8; 424usize], #[doc = "0xf34 - Floating-point Context Control Register"] pub fpccr: FPCCR, #[doc = "0xf38 - Floating-point Context Address Register"] pub fpcar: FPCAR, #[doc = "0xf3c - Floating-point Default Status Control Register"] pub fpdscr: FPDSCR, } #[doc = "Auxiliary Control Register,"] pub struct ACTLR { register: ::vcell::VolatileCell<u32>, } #[doc = "Auxiliary Control Register,"] pub mod actlr; #[doc = "CPUID Base Register"] pub struct CPUID { register: ::vcell::VolatileCell<u32>, } #[doc = "CPUID Base Register"] pub mod cpuid; #[doc = "Interrupt Control and State Register"] pub struct ICSR { register: ::vcell::VolatileCell<u32>, } #[doc = "Interrupt Control and State Register"] pub mod icsr; #[doc = "Vector Table Offset Register"] pub struct VTOR { register: ::vcell::VolatileCell<u32>, } #[doc = "Vector Table Offset Register"] pub mod vtor; #[doc = "Application Interrupt and Reset Control Register"] pub struct AIRCR { register: ::vcell::VolatileCell<u32>, } #[doc = "Application Interrupt and Reset Control Register"] pub mod aircr; #[doc = "System Control Register"] pub struct SCR { register: ::vcell::VolatileCell<u32>, } #[doc = "System Control Register"] pub mod scr; #[doc = "Configuration and Control Register"] pub struct CCR { register: ::vcell::VolatileCell<u32>, } #[doc = "Configuration and Control Register"] pub mod ccr; #[doc = "System Handler Priority Register 1"] pub struct SHPR1 { register: ::vcell::VolatileCell<u32>, } #[doc = "System Handler Priority Register 1"] pub mod shpr1; #[doc = "System Handler Priority Register 2"] pub struct SHPR2 { register: ::vcell::VolatileCell<u32>, } #[doc = "System Handler Priority Register 2"] pub mod shpr2; #[doc = "System Handler Priority Register 3"] pub struct SHPR3 { register: ::vcell::VolatileCell<u32>, } #[doc = "System Handler Priority Register 3"] pub mod shpr3; #[doc = "System Handler Control and State Register"] pub struct SHCSR { register: ::vcell::VolatileCell<u32>, } #[doc = "System Handler Control and State Register"] pub mod shcsr; #[doc = "Configurable Fault Status Registers"] pub struct CFSR { register: ::vcell::VolatileCell<u32>, } #[doc = "Configurable Fault Status Registers"] pub mod cfsr; #[doc = "HardFault Status register"] pub struct HFSR { register: ::vcell::VolatileCell<u32>, } #[doc = "HardFault Status register"] pub mod hfsr; #[doc = "Debug Fault Status Register"] pub struct DFSR { register: ::vcell::VolatileCell<u32>, } #[doc = "Debug Fault Status Register"] pub mod dfsr; #[doc = "MemManage Address Register"] pub struct MMFAR { register: ::vcell::VolatileCell<u32>, } #[doc = "MemManage Address Register"] pub mod mmfar; #[doc = "BusFault Address Register"] pub struct BFAR { register: ::vcell::VolatileCell<u32>, } #[doc = "BusFault Address Register"] pub mod bfar; #[doc = "Auxiliary Fault Status Register"] pub struct AFSR { register: ::vcell::VolatileCell<u32>, } #[doc = "Auxiliary Fault Status Register"] pub mod afsr; #[doc = "Coprocessor Access Control Register"] pub struct CPACR { register: ::vcell::VolatileCell<u32>, } #[doc = "Coprocessor Access Control Register"] pub mod cpacr; #[doc = "Floating-point Context Control Register"] pub struct FPCCR { register: ::vcell::VolatileCell<u32>, } #[doc = "Floating-point Context Control Register"] pub mod fpccr; #[doc = "Floating-point Context Address Register"] pub struct FPCAR { register: ::vcell::VolatileCell<u32>, } #[doc = "Floating-point Context Address Register"] pub mod fpcar; #[doc = "Floating-point Default Status Control Register"] pub struct FPDSCR { register: ::vcell::VolatileCell<u32>, } #[doc = "Floating-point Default Status Control Register"] pub mod fpdscr;