1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u8,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u8,
8}
9impl super::PFIFO {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = "Possible values of the field `RXFIFOSIZE`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum RXFIFOSIZER {
48 #[doc = "Receive FIFO/Buffer depth = 1 dataword."]
49 _000,
50 #[doc = "Receive FIFO/Buffer depth = 4 datawords."]
51 _001,
52 #[doc = "Receive FIFO/Buffer depth = 8 datawords."]
53 _010,
54 #[doc = "Receive FIFO/Buffer depth = 16 datawords."]
55 _011,
56 #[doc = "Receive FIFO/Buffer depth = 32 datawords."]
57 _100,
58 #[doc = "Receive FIFO/Buffer depth = 64 datawords."]
59 _101,
60 #[doc = "Receive FIFO/Buffer depth = 128 datawords."]
61 _110,
62 #[doc = r" Reserved"]
63 _Reserved(u8),
64}
65impl RXFIFOSIZER {
66 #[doc = r" Value of the field as raw bits"]
67 #[inline]
68 pub fn bits(&self) -> u8 {
69 match *self {
70 RXFIFOSIZER::_000 => 0,
71 RXFIFOSIZER::_001 => 1,
72 RXFIFOSIZER::_010 => 2,
73 RXFIFOSIZER::_011 => 3,
74 RXFIFOSIZER::_100 => 4,
75 RXFIFOSIZER::_101 => 5,
76 RXFIFOSIZER::_110 => 6,
77 RXFIFOSIZER::_Reserved(bits) => bits,
78 }
79 }
80 #[allow(missing_docs)]
81 #[doc(hidden)]
82 #[inline]
83 pub fn _from(value: u8) -> RXFIFOSIZER {
84 match value {
85 0 => RXFIFOSIZER::_000,
86 1 => RXFIFOSIZER::_001,
87 2 => RXFIFOSIZER::_010,
88 3 => RXFIFOSIZER::_011,
89 4 => RXFIFOSIZER::_100,
90 5 => RXFIFOSIZER::_101,
91 6 => RXFIFOSIZER::_110,
92 i => RXFIFOSIZER::_Reserved(i),
93 }
94 }
95 #[doc = "Checks if the value of the field is `_000`"]
96 #[inline]
97 pub fn is_000(&self) -> bool {
98 *self == RXFIFOSIZER::_000
99 }
100 #[doc = "Checks if the value of the field is `_001`"]
101 #[inline]
102 pub fn is_001(&self) -> bool {
103 *self == RXFIFOSIZER::_001
104 }
105 #[doc = "Checks if the value of the field is `_010`"]
106 #[inline]
107 pub fn is_010(&self) -> bool {
108 *self == RXFIFOSIZER::_010
109 }
110 #[doc = "Checks if the value of the field is `_011`"]
111 #[inline]
112 pub fn is_011(&self) -> bool {
113 *self == RXFIFOSIZER::_011
114 }
115 #[doc = "Checks if the value of the field is `_100`"]
116 #[inline]
117 pub fn is_100(&self) -> bool {
118 *self == RXFIFOSIZER::_100
119 }
120 #[doc = "Checks if the value of the field is `_101`"]
121 #[inline]
122 pub fn is_101(&self) -> bool {
123 *self == RXFIFOSIZER::_101
124 }
125 #[doc = "Checks if the value of the field is `_110`"]
126 #[inline]
127 pub fn is_110(&self) -> bool {
128 *self == RXFIFOSIZER::_110
129 }
130}
131#[doc = "Possible values of the field `RXFE`"]
132#[derive(Clone, Copy, Debug, PartialEq)]
133pub enum RXFER {
134 #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"]
135 _0,
136 #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."]
137 _1,
138}
139impl RXFER {
140 #[doc = r" Returns `true` if the bit is clear (0)"]
141 #[inline]
142 pub fn bit_is_clear(&self) -> bool {
143 !self.bit()
144 }
145 #[doc = r" Returns `true` if the bit is set (1)"]
146 #[inline]
147 pub fn bit_is_set(&self) -> bool {
148 self.bit()
149 }
150 #[doc = r" Value of the field as raw bits"]
151 #[inline]
152 pub fn bit(&self) -> bool {
153 match *self {
154 RXFER::_0 => false,
155 RXFER::_1 => true,
156 }
157 }
158 #[allow(missing_docs)]
159 #[doc(hidden)]
160 #[inline]
161 pub fn _from(value: bool) -> RXFER {
162 match value {
163 false => RXFER::_0,
164 true => RXFER::_1,
165 }
166 }
167 #[doc = "Checks if the value of the field is `_0`"]
168 #[inline]
169 pub fn is_0(&self) -> bool {
170 *self == RXFER::_0
171 }
172 #[doc = "Checks if the value of the field is `_1`"]
173 #[inline]
174 pub fn is_1(&self) -> bool {
175 *self == RXFER::_1
176 }
177}
178#[doc = "Possible values of the field `TXFIFOSIZE`"]
179#[derive(Clone, Copy, Debug, PartialEq)]
180pub enum TXFIFOSIZER {
181 #[doc = "Transmit FIFO/Buffer depth = 1 dataword."]
182 _000,
183 #[doc = "Transmit FIFO/Buffer depth = 4 datawords."]
184 _001,
185 #[doc = "Transmit FIFO/Buffer depth = 8 datawords."]
186 _010,
187 #[doc = "Transmit FIFO/Buffer depth = 16 datawords."]
188 _011,
189 #[doc = "Transmit FIFO/Buffer depth = 32 datawords."]
190 _100,
191 #[doc = "Transmit FIFO/Buffer depth = 64 datawords."]
192 _101,
193 #[doc = "Transmit FIFO/Buffer depth = 128 datawords."]
194 _110,
195 #[doc = r" Reserved"]
196 _Reserved(u8),
197}
198impl TXFIFOSIZER {
199 #[doc = r" Value of the field as raw bits"]
200 #[inline]
201 pub fn bits(&self) -> u8 {
202 match *self {
203 TXFIFOSIZER::_000 => 0,
204 TXFIFOSIZER::_001 => 1,
205 TXFIFOSIZER::_010 => 2,
206 TXFIFOSIZER::_011 => 3,
207 TXFIFOSIZER::_100 => 4,
208 TXFIFOSIZER::_101 => 5,
209 TXFIFOSIZER::_110 => 6,
210 TXFIFOSIZER::_Reserved(bits) => bits,
211 }
212 }
213 #[allow(missing_docs)]
214 #[doc(hidden)]
215 #[inline]
216 pub fn _from(value: u8) -> TXFIFOSIZER {
217 match value {
218 0 => TXFIFOSIZER::_000,
219 1 => TXFIFOSIZER::_001,
220 2 => TXFIFOSIZER::_010,
221 3 => TXFIFOSIZER::_011,
222 4 => TXFIFOSIZER::_100,
223 5 => TXFIFOSIZER::_101,
224 6 => TXFIFOSIZER::_110,
225 i => TXFIFOSIZER::_Reserved(i),
226 }
227 }
228 #[doc = "Checks if the value of the field is `_000`"]
229 #[inline]
230 pub fn is_000(&self) -> bool {
231 *self == TXFIFOSIZER::_000
232 }
233 #[doc = "Checks if the value of the field is `_001`"]
234 #[inline]
235 pub fn is_001(&self) -> bool {
236 *self == TXFIFOSIZER::_001
237 }
238 #[doc = "Checks if the value of the field is `_010`"]
239 #[inline]
240 pub fn is_010(&self) -> bool {
241 *self == TXFIFOSIZER::_010
242 }
243 #[doc = "Checks if the value of the field is `_011`"]
244 #[inline]
245 pub fn is_011(&self) -> bool {
246 *self == TXFIFOSIZER::_011
247 }
248 #[doc = "Checks if the value of the field is `_100`"]
249 #[inline]
250 pub fn is_100(&self) -> bool {
251 *self == TXFIFOSIZER::_100
252 }
253 #[doc = "Checks if the value of the field is `_101`"]
254 #[inline]
255 pub fn is_101(&self) -> bool {
256 *self == TXFIFOSIZER::_101
257 }
258 #[doc = "Checks if the value of the field is `_110`"]
259 #[inline]
260 pub fn is_110(&self) -> bool {
261 *self == TXFIFOSIZER::_110
262 }
263}
264#[doc = "Possible values of the field `TXFE`"]
265#[derive(Clone, Copy, Debug, PartialEq)]
266pub enum TXFER {
267 #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."]
268 _0,
269 #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."]
270 _1,
271}
272impl TXFER {
273 #[doc = r" Returns `true` if the bit is clear (0)"]
274 #[inline]
275 pub fn bit_is_clear(&self) -> bool {
276 !self.bit()
277 }
278 #[doc = r" Returns `true` if the bit is set (1)"]
279 #[inline]
280 pub fn bit_is_set(&self) -> bool {
281 self.bit()
282 }
283 #[doc = r" Value of the field as raw bits"]
284 #[inline]
285 pub fn bit(&self) -> bool {
286 match *self {
287 TXFER::_0 => false,
288 TXFER::_1 => true,
289 }
290 }
291 #[allow(missing_docs)]
292 #[doc(hidden)]
293 #[inline]
294 pub fn _from(value: bool) -> TXFER {
295 match value {
296 false => TXFER::_0,
297 true => TXFER::_1,
298 }
299 }
300 #[doc = "Checks if the value of the field is `_0`"]
301 #[inline]
302 pub fn is_0(&self) -> bool {
303 *self == TXFER::_0
304 }
305 #[doc = "Checks if the value of the field is `_1`"]
306 #[inline]
307 pub fn is_1(&self) -> bool {
308 *self == TXFER::_1
309 }
310}
311#[doc = "Values that can be written to the field `RXFE`"]
312pub enum RXFEW {
313 #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"]
314 _0,
315 #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."]
316 _1,
317}
318impl RXFEW {
319 #[allow(missing_docs)]
320 #[doc(hidden)]
321 #[inline]
322 pub fn _bits(&self) -> bool {
323 match *self {
324 RXFEW::_0 => false,
325 RXFEW::_1 => true,
326 }
327 }
328}
329#[doc = r" Proxy"]
330pub struct _RXFEW<'a> {
331 w: &'a mut W,
332}
333impl<'a> _RXFEW<'a> {
334 #[doc = r" Writes `variant` to the field"]
335 #[inline]
336 pub fn variant(self, variant: RXFEW) -> &'a mut W {
337 {
338 self.bit(variant._bits())
339 }
340 }
341 #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"]
342 #[inline]
343 pub fn _0(self) -> &'a mut W {
344 self.variant(RXFEW::_0)
345 }
346 #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."]
347 #[inline]
348 pub fn _1(self) -> &'a mut W {
349 self.variant(RXFEW::_1)
350 }
351 #[doc = r" Sets the field bit"]
352 pub fn set_bit(self) -> &'a mut W {
353 self.bit(true)
354 }
355 #[doc = r" Clears the field bit"]
356 pub fn clear_bit(self) -> &'a mut W {
357 self.bit(false)
358 }
359 #[doc = r" Writes raw bits to the field"]
360 #[inline]
361 pub fn bit(self, value: bool) -> &'a mut W {
362 const MASK: bool = true;
363 const OFFSET: u8 = 3;
364 self.w.bits &= !((MASK as u8) << OFFSET);
365 self.w.bits |= ((value & MASK) as u8) << OFFSET;
366 self.w
367 }
368}
369#[doc = "Values that can be written to the field `TXFE`"]
370pub enum TXFEW {
371 #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."]
372 _0,
373 #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."]
374 _1,
375}
376impl TXFEW {
377 #[allow(missing_docs)]
378 #[doc(hidden)]
379 #[inline]
380 pub fn _bits(&self) -> bool {
381 match *self {
382 TXFEW::_0 => false,
383 TXFEW::_1 => true,
384 }
385 }
386}
387#[doc = r" Proxy"]
388pub struct _TXFEW<'a> {
389 w: &'a mut W,
390}
391impl<'a> _TXFEW<'a> {
392 #[doc = r" Writes `variant` to the field"]
393 #[inline]
394 pub fn variant(self, variant: TXFEW) -> &'a mut W {
395 {
396 self.bit(variant._bits())
397 }
398 }
399 #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."]
400 #[inline]
401 pub fn _0(self) -> &'a mut W {
402 self.variant(TXFEW::_0)
403 }
404 #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."]
405 #[inline]
406 pub fn _1(self) -> &'a mut W {
407 self.variant(TXFEW::_1)
408 }
409 #[doc = r" Sets the field bit"]
410 pub fn set_bit(self) -> &'a mut W {
411 self.bit(true)
412 }
413 #[doc = r" Clears the field bit"]
414 pub fn clear_bit(self) -> &'a mut W {
415 self.bit(false)
416 }
417 #[doc = r" Writes raw bits to the field"]
418 #[inline]
419 pub fn bit(self, value: bool) -> &'a mut W {
420 const MASK: bool = true;
421 const OFFSET: u8 = 7;
422 self.w.bits &= !((MASK as u8) << OFFSET);
423 self.w.bits |= ((value & MASK) as u8) << OFFSET;
424 self.w
425 }
426}
427impl R {
428 #[doc = r" Value of the register as raw bits"]
429 #[inline]
430 pub fn bits(&self) -> u8 {
431 self.bits
432 }
433 #[doc = "Bits 0:2 - Receive FIFO. Buffer Depth"]
434 #[inline]
435 pub fn rxfifosize(&self) -> RXFIFOSIZER {
436 RXFIFOSIZER::_from({
437 const MASK: u8 = 7;
438 const OFFSET: u8 = 0;
439 ((self.bits >> OFFSET) & MASK as u8) as u8
440 })
441 }
442 #[doc = "Bit 3 - Receive FIFO Enable"]
443 #[inline]
444 pub fn rxfe(&self) -> RXFER {
445 RXFER::_from({
446 const MASK: bool = true;
447 const OFFSET: u8 = 3;
448 ((self.bits >> OFFSET) & MASK as u8) != 0
449 })
450 }
451 #[doc = "Bits 4:6 - Transmit FIFO. Buffer Depth"]
452 #[inline]
453 pub fn txfifosize(&self) -> TXFIFOSIZER {
454 TXFIFOSIZER::_from({
455 const MASK: u8 = 7;
456 const OFFSET: u8 = 4;
457 ((self.bits >> OFFSET) & MASK as u8) as u8
458 })
459 }
460 #[doc = "Bit 7 - Transmit FIFO Enable"]
461 #[inline]
462 pub fn txfe(&self) -> TXFER {
463 TXFER::_from({
464 const MASK: bool = true;
465 const OFFSET: u8 = 7;
466 ((self.bits >> OFFSET) & MASK as u8) != 0
467 })
468 }
469}
470impl W {
471 #[doc = r" Reset value of the register"]
472 #[inline]
473 pub fn reset_value() -> W {
474 W { bits: 0 }
475 }
476 #[doc = r" Writes raw bits to the register"]
477 #[inline]
478 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
479 self.bits = bits;
480 self
481 }
482 #[doc = "Bit 3 - Receive FIFO Enable"]
483 #[inline]
484 pub fn rxfe(&mut self) -> _RXFEW {
485 _RXFEW { w: self }
486 }
487 #[doc = "Bit 7 - Transmit FIFO Enable"]
488 #[inline]
489 pub fn txfe(&mut self) -> _TXFEW {
490 _TXFEW { w: self }
491 }
492}