1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u8,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u8,
8}
9impl super::C5 {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = "Possible values of the field `LBKDDMAS`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum LBKDDMASR {
48 #[doc = "If BDH\\[LBKDIE\\] and S2\\[LBKDIF\\] are set, the LBKDIF interrupt signal is asserted to request an interrupt service."]
49 _0,
50 #[doc = "If BDH\\[LBKDIE\\] and S2\\[LBKDIF\\] are set, the LBKDIF DMA request signal is asserted to request a DMA transfer."]
51 _1,
52}
53impl LBKDDMASR {
54 #[doc = r" Returns `true` if the bit is clear (0)"]
55 #[inline]
56 pub fn bit_is_clear(&self) -> bool {
57 !self.bit()
58 }
59 #[doc = r" Returns `true` if the bit is set (1)"]
60 #[inline]
61 pub fn bit_is_set(&self) -> bool {
62 self.bit()
63 }
64 #[doc = r" Value of the field as raw bits"]
65 #[inline]
66 pub fn bit(&self) -> bool {
67 match *self {
68 LBKDDMASR::_0 => false,
69 LBKDDMASR::_1 => true,
70 }
71 }
72 #[allow(missing_docs)]
73 #[doc(hidden)]
74 #[inline]
75 pub fn _from(value: bool) -> LBKDDMASR {
76 match value {
77 false => LBKDDMASR::_0,
78 true => LBKDDMASR::_1,
79 }
80 }
81 #[doc = "Checks if the value of the field is `_0`"]
82 #[inline]
83 pub fn is_0(&self) -> bool {
84 *self == LBKDDMASR::_0
85 }
86 #[doc = "Checks if the value of the field is `_1`"]
87 #[inline]
88 pub fn is_1(&self) -> bool {
89 *self == LBKDDMASR::_1
90 }
91}
92#[doc = "Possible values of the field `ILDMAS`"]
93#[derive(Clone, Copy, Debug, PartialEq)]
94pub enum ILDMASR {
95 #[doc = "If C2\\[ILIE\\] and S1\\[IDLE\\] are set, the IDLE interrupt request signal is asserted to request an interrupt service."]
96 _0,
97 #[doc = "If C2\\[ILIE\\] and S1\\[IDLE\\] are set, the IDLE DMA request signal is asserted to request a DMA transfer."]
98 _1,
99}
100impl ILDMASR {
101 #[doc = r" Returns `true` if the bit is clear (0)"]
102 #[inline]
103 pub fn bit_is_clear(&self) -> bool {
104 !self.bit()
105 }
106 #[doc = r" Returns `true` if the bit is set (1)"]
107 #[inline]
108 pub fn bit_is_set(&self) -> bool {
109 self.bit()
110 }
111 #[doc = r" Value of the field as raw bits"]
112 #[inline]
113 pub fn bit(&self) -> bool {
114 match *self {
115 ILDMASR::_0 => false,
116 ILDMASR::_1 => true,
117 }
118 }
119 #[allow(missing_docs)]
120 #[doc(hidden)]
121 #[inline]
122 pub fn _from(value: bool) -> ILDMASR {
123 match value {
124 false => ILDMASR::_0,
125 true => ILDMASR::_1,
126 }
127 }
128 #[doc = "Checks if the value of the field is `_0`"]
129 #[inline]
130 pub fn is_0(&self) -> bool {
131 *self == ILDMASR::_0
132 }
133 #[doc = "Checks if the value of the field is `_1`"]
134 #[inline]
135 pub fn is_1(&self) -> bool {
136 *self == ILDMASR::_1
137 }
138}
139#[doc = "Possible values of the field `RDMAS`"]
140#[derive(Clone, Copy, Debug, PartialEq)]
141pub enum RDMASR {
142 #[doc = "If C2\\[RIE\\] and S1\\[RDRF\\] are set, the RDFR interrupt request signal is asserted to request an interrupt service."]
143 _0,
144 #[doc = "If C2\\[RIE\\] and S1\\[RDRF\\] are set, the RDRF DMA request signal is asserted to request a DMA transfer."]
145 _1,
146}
147impl RDMASR {
148 #[doc = r" Returns `true` if the bit is clear (0)"]
149 #[inline]
150 pub fn bit_is_clear(&self) -> bool {
151 !self.bit()
152 }
153 #[doc = r" Returns `true` if the bit is set (1)"]
154 #[inline]
155 pub fn bit_is_set(&self) -> bool {
156 self.bit()
157 }
158 #[doc = r" Value of the field as raw bits"]
159 #[inline]
160 pub fn bit(&self) -> bool {
161 match *self {
162 RDMASR::_0 => false,
163 RDMASR::_1 => true,
164 }
165 }
166 #[allow(missing_docs)]
167 #[doc(hidden)]
168 #[inline]
169 pub fn _from(value: bool) -> RDMASR {
170 match value {
171 false => RDMASR::_0,
172 true => RDMASR::_1,
173 }
174 }
175 #[doc = "Checks if the value of the field is `_0`"]
176 #[inline]
177 pub fn is_0(&self) -> bool {
178 *self == RDMASR::_0
179 }
180 #[doc = "Checks if the value of the field is `_1`"]
181 #[inline]
182 pub fn is_1(&self) -> bool {
183 *self == RDMASR::_1
184 }
185}
186#[doc = "Possible values of the field `TCDMAS`"]
187#[derive(Clone, Copy, Debug, PartialEq)]
188pub enum TCDMASR {
189 #[doc = "If C2\\[TCIE\\] is set and the S1\\[TC\\] flag is set, the TC interrupt request signal is asserted to request an interrupt service."]
190 _0,
191 #[doc = "If C2\\[TCIE\\] is set and the S1\\[TC\\] flag is set, the TC DMA request signal is asserted to request a DMA transfer."]
192 _1,
193}
194impl TCDMASR {
195 #[doc = r" Returns `true` if the bit is clear (0)"]
196 #[inline]
197 pub fn bit_is_clear(&self) -> bool {
198 !self.bit()
199 }
200 #[doc = r" Returns `true` if the bit is set (1)"]
201 #[inline]
202 pub fn bit_is_set(&self) -> bool {
203 self.bit()
204 }
205 #[doc = r" Value of the field as raw bits"]
206 #[inline]
207 pub fn bit(&self) -> bool {
208 match *self {
209 TCDMASR::_0 => false,
210 TCDMASR::_1 => true,
211 }
212 }
213 #[allow(missing_docs)]
214 #[doc(hidden)]
215 #[inline]
216 pub fn _from(value: bool) -> TCDMASR {
217 match value {
218 false => TCDMASR::_0,
219 true => TCDMASR::_1,
220 }
221 }
222 #[doc = "Checks if the value of the field is `_0`"]
223 #[inline]
224 pub fn is_0(&self) -> bool {
225 *self == TCDMASR::_0
226 }
227 #[doc = "Checks if the value of the field is `_1`"]
228 #[inline]
229 pub fn is_1(&self) -> bool {
230 *self == TCDMASR::_1
231 }
232}
233#[doc = "Possible values of the field `TDMAS`"]
234#[derive(Clone, Copy, Debug, PartialEq)]
235pub enum TDMASR {
236 #[doc = "If C2\\[TIE\\] is set and the S1\\[TDRE\\] flag is set, the TDRE interrupt request signal is asserted to request interrupt service."]
237 _0,
238 #[doc = "If C2\\[TIE\\] is set and the S1\\[TDRE\\] flag is set, the TDRE DMA request signal is asserted to request a DMA transfer."]
239 _1,
240}
241impl TDMASR {
242 #[doc = r" Returns `true` if the bit is clear (0)"]
243 #[inline]
244 pub fn bit_is_clear(&self) -> bool {
245 !self.bit()
246 }
247 #[doc = r" Returns `true` if the bit is set (1)"]
248 #[inline]
249 pub fn bit_is_set(&self) -> bool {
250 self.bit()
251 }
252 #[doc = r" Value of the field as raw bits"]
253 #[inline]
254 pub fn bit(&self) -> bool {
255 match *self {
256 TDMASR::_0 => false,
257 TDMASR::_1 => true,
258 }
259 }
260 #[allow(missing_docs)]
261 #[doc(hidden)]
262 #[inline]
263 pub fn _from(value: bool) -> TDMASR {
264 match value {
265 false => TDMASR::_0,
266 true => TDMASR::_1,
267 }
268 }
269 #[doc = "Checks if the value of the field is `_0`"]
270 #[inline]
271 pub fn is_0(&self) -> bool {
272 *self == TDMASR::_0
273 }
274 #[doc = "Checks if the value of the field is `_1`"]
275 #[inline]
276 pub fn is_1(&self) -> bool {
277 *self == TDMASR::_1
278 }
279}
280#[doc = "Values that can be written to the field `LBKDDMAS`"]
281pub enum LBKDDMASW {
282 #[doc = "If BDH\\[LBKDIE\\] and S2\\[LBKDIF\\] are set, the LBKDIF interrupt signal is asserted to request an interrupt service."]
283 _0,
284 #[doc = "If BDH\\[LBKDIE\\] and S2\\[LBKDIF\\] are set, the LBKDIF DMA request signal is asserted to request a DMA transfer."]
285 _1,
286}
287impl LBKDDMASW {
288 #[allow(missing_docs)]
289 #[doc(hidden)]
290 #[inline]
291 pub fn _bits(&self) -> bool {
292 match *self {
293 LBKDDMASW::_0 => false,
294 LBKDDMASW::_1 => true,
295 }
296 }
297}
298#[doc = r" Proxy"]
299pub struct _LBKDDMASW<'a> {
300 w: &'a mut W,
301}
302impl<'a> _LBKDDMASW<'a> {
303 #[doc = r" Writes `variant` to the field"]
304 #[inline]
305 pub fn variant(self, variant: LBKDDMASW) -> &'a mut W {
306 {
307 self.bit(variant._bits())
308 }
309 }
310 #[doc = "If BDH\\[LBKDIE\\] and S2\\[LBKDIF\\] are set, the LBKDIF interrupt signal is asserted to request an interrupt service."]
311 #[inline]
312 pub fn _0(self) -> &'a mut W {
313 self.variant(LBKDDMASW::_0)
314 }
315 #[doc = "If BDH\\[LBKDIE\\] and S2\\[LBKDIF\\] are set, the LBKDIF DMA request signal is asserted to request a DMA transfer."]
316 #[inline]
317 pub fn _1(self) -> &'a mut W {
318 self.variant(LBKDDMASW::_1)
319 }
320 #[doc = r" Sets the field bit"]
321 pub fn set_bit(self) -> &'a mut W {
322 self.bit(true)
323 }
324 #[doc = r" Clears the field bit"]
325 pub fn clear_bit(self) -> &'a mut W {
326 self.bit(false)
327 }
328 #[doc = r" Writes raw bits to the field"]
329 #[inline]
330 pub fn bit(self, value: bool) -> &'a mut W {
331 const MASK: bool = true;
332 const OFFSET: u8 = 3;
333 self.w.bits &= !((MASK as u8) << OFFSET);
334 self.w.bits |= ((value & MASK) as u8) << OFFSET;
335 self.w
336 }
337}
338#[doc = "Values that can be written to the field `ILDMAS`"]
339pub enum ILDMASW {
340 #[doc = "If C2\\[ILIE\\] and S1\\[IDLE\\] are set, the IDLE interrupt request signal is asserted to request an interrupt service."]
341 _0,
342 #[doc = "If C2\\[ILIE\\] and S1\\[IDLE\\] are set, the IDLE DMA request signal is asserted to request a DMA transfer."]
343 _1,
344}
345impl ILDMASW {
346 #[allow(missing_docs)]
347 #[doc(hidden)]
348 #[inline]
349 pub fn _bits(&self) -> bool {
350 match *self {
351 ILDMASW::_0 => false,
352 ILDMASW::_1 => true,
353 }
354 }
355}
356#[doc = r" Proxy"]
357pub struct _ILDMASW<'a> {
358 w: &'a mut W,
359}
360impl<'a> _ILDMASW<'a> {
361 #[doc = r" Writes `variant` to the field"]
362 #[inline]
363 pub fn variant(self, variant: ILDMASW) -> &'a mut W {
364 {
365 self.bit(variant._bits())
366 }
367 }
368 #[doc = "If C2\\[ILIE\\] and S1\\[IDLE\\] are set, the IDLE interrupt request signal is asserted to request an interrupt service."]
369 #[inline]
370 pub fn _0(self) -> &'a mut W {
371 self.variant(ILDMASW::_0)
372 }
373 #[doc = "If C2\\[ILIE\\] and S1\\[IDLE\\] are set, the IDLE DMA request signal is asserted to request a DMA transfer."]
374 #[inline]
375 pub fn _1(self) -> &'a mut W {
376 self.variant(ILDMASW::_1)
377 }
378 #[doc = r" Sets the field bit"]
379 pub fn set_bit(self) -> &'a mut W {
380 self.bit(true)
381 }
382 #[doc = r" Clears the field bit"]
383 pub fn clear_bit(self) -> &'a mut W {
384 self.bit(false)
385 }
386 #[doc = r" Writes raw bits to the field"]
387 #[inline]
388 pub fn bit(self, value: bool) -> &'a mut W {
389 const MASK: bool = true;
390 const OFFSET: u8 = 4;
391 self.w.bits &= !((MASK as u8) << OFFSET);
392 self.w.bits |= ((value & MASK) as u8) << OFFSET;
393 self.w
394 }
395}
396#[doc = "Values that can be written to the field `RDMAS`"]
397pub enum RDMASW {
398 #[doc = "If C2\\[RIE\\] and S1\\[RDRF\\] are set, the RDFR interrupt request signal is asserted to request an interrupt service."]
399 _0,
400 #[doc = "If C2\\[RIE\\] and S1\\[RDRF\\] are set, the RDRF DMA request signal is asserted to request a DMA transfer."]
401 _1,
402}
403impl RDMASW {
404 #[allow(missing_docs)]
405 #[doc(hidden)]
406 #[inline]
407 pub fn _bits(&self) -> bool {
408 match *self {
409 RDMASW::_0 => false,
410 RDMASW::_1 => true,
411 }
412 }
413}
414#[doc = r" Proxy"]
415pub struct _RDMASW<'a> {
416 w: &'a mut W,
417}
418impl<'a> _RDMASW<'a> {
419 #[doc = r" Writes `variant` to the field"]
420 #[inline]
421 pub fn variant(self, variant: RDMASW) -> &'a mut W {
422 {
423 self.bit(variant._bits())
424 }
425 }
426 #[doc = "If C2\\[RIE\\] and S1\\[RDRF\\] are set, the RDFR interrupt request signal is asserted to request an interrupt service."]
427 #[inline]
428 pub fn _0(self) -> &'a mut W {
429 self.variant(RDMASW::_0)
430 }
431 #[doc = "If C2\\[RIE\\] and S1\\[RDRF\\] are set, the RDRF DMA request signal is asserted to request a DMA transfer."]
432 #[inline]
433 pub fn _1(self) -> &'a mut W {
434 self.variant(RDMASW::_1)
435 }
436 #[doc = r" Sets the field bit"]
437 pub fn set_bit(self) -> &'a mut W {
438 self.bit(true)
439 }
440 #[doc = r" Clears the field bit"]
441 pub fn clear_bit(self) -> &'a mut W {
442 self.bit(false)
443 }
444 #[doc = r" Writes raw bits to the field"]
445 #[inline]
446 pub fn bit(self, value: bool) -> &'a mut W {
447 const MASK: bool = true;
448 const OFFSET: u8 = 5;
449 self.w.bits &= !((MASK as u8) << OFFSET);
450 self.w.bits |= ((value & MASK) as u8) << OFFSET;
451 self.w
452 }
453}
454#[doc = "Values that can be written to the field `TCDMAS`"]
455pub enum TCDMASW {
456 #[doc = "If C2\\[TCIE\\] is set and the S1\\[TC\\] flag is set, the TC interrupt request signal is asserted to request an interrupt service."]
457 _0,
458 #[doc = "If C2\\[TCIE\\] is set and the S1\\[TC\\] flag is set, the TC DMA request signal is asserted to request a DMA transfer."]
459 _1,
460}
461impl TCDMASW {
462 #[allow(missing_docs)]
463 #[doc(hidden)]
464 #[inline]
465 pub fn _bits(&self) -> bool {
466 match *self {
467 TCDMASW::_0 => false,
468 TCDMASW::_1 => true,
469 }
470 }
471}
472#[doc = r" Proxy"]
473pub struct _TCDMASW<'a> {
474 w: &'a mut W,
475}
476impl<'a> _TCDMASW<'a> {
477 #[doc = r" Writes `variant` to the field"]
478 #[inline]
479 pub fn variant(self, variant: TCDMASW) -> &'a mut W {
480 {
481 self.bit(variant._bits())
482 }
483 }
484 #[doc = "If C2\\[TCIE\\] is set and the S1\\[TC\\] flag is set, the TC interrupt request signal is asserted to request an interrupt service."]
485 #[inline]
486 pub fn _0(self) -> &'a mut W {
487 self.variant(TCDMASW::_0)
488 }
489 #[doc = "If C2\\[TCIE\\] is set and the S1\\[TC\\] flag is set, the TC DMA request signal is asserted to request a DMA transfer."]
490 #[inline]
491 pub fn _1(self) -> &'a mut W {
492 self.variant(TCDMASW::_1)
493 }
494 #[doc = r" Sets the field bit"]
495 pub fn set_bit(self) -> &'a mut W {
496 self.bit(true)
497 }
498 #[doc = r" Clears the field bit"]
499 pub fn clear_bit(self) -> &'a mut W {
500 self.bit(false)
501 }
502 #[doc = r" Writes raw bits to the field"]
503 #[inline]
504 pub fn bit(self, value: bool) -> &'a mut W {
505 const MASK: bool = true;
506 const OFFSET: u8 = 6;
507 self.w.bits &= !((MASK as u8) << OFFSET);
508 self.w.bits |= ((value & MASK) as u8) << OFFSET;
509 self.w
510 }
511}
512#[doc = "Values that can be written to the field `TDMAS`"]
513pub enum TDMASW {
514 #[doc = "If C2\\[TIE\\] is set and the S1\\[TDRE\\] flag is set, the TDRE interrupt request signal is asserted to request interrupt service."]
515 _0,
516 #[doc = "If C2\\[TIE\\] is set and the S1\\[TDRE\\] flag is set, the TDRE DMA request signal is asserted to request a DMA transfer."]
517 _1,
518}
519impl TDMASW {
520 #[allow(missing_docs)]
521 #[doc(hidden)]
522 #[inline]
523 pub fn _bits(&self) -> bool {
524 match *self {
525 TDMASW::_0 => false,
526 TDMASW::_1 => true,
527 }
528 }
529}
530#[doc = r" Proxy"]
531pub struct _TDMASW<'a> {
532 w: &'a mut W,
533}
534impl<'a> _TDMASW<'a> {
535 #[doc = r" Writes `variant` to the field"]
536 #[inline]
537 pub fn variant(self, variant: TDMASW) -> &'a mut W {
538 {
539 self.bit(variant._bits())
540 }
541 }
542 #[doc = "If C2\\[TIE\\] is set and the S1\\[TDRE\\] flag is set, the TDRE interrupt request signal is asserted to request interrupt service."]
543 #[inline]
544 pub fn _0(self) -> &'a mut W {
545 self.variant(TDMASW::_0)
546 }
547 #[doc = "If C2\\[TIE\\] is set and the S1\\[TDRE\\] flag is set, the TDRE DMA request signal is asserted to request a DMA transfer."]
548 #[inline]
549 pub fn _1(self) -> &'a mut W {
550 self.variant(TDMASW::_1)
551 }
552 #[doc = r" Sets the field bit"]
553 pub fn set_bit(self) -> &'a mut W {
554 self.bit(true)
555 }
556 #[doc = r" Clears the field bit"]
557 pub fn clear_bit(self) -> &'a mut W {
558 self.bit(false)
559 }
560 #[doc = r" Writes raw bits to the field"]
561 #[inline]
562 pub fn bit(self, value: bool) -> &'a mut W {
563 const MASK: bool = true;
564 const OFFSET: u8 = 7;
565 self.w.bits &= !((MASK as u8) << OFFSET);
566 self.w.bits |= ((value & MASK) as u8) << OFFSET;
567 self.w
568 }
569}
570impl R {
571 #[doc = r" Value of the register as raw bits"]
572 #[inline]
573 pub fn bits(&self) -> u8 {
574 self.bits
575 }
576 #[doc = "Bit 3 - LIN Break Detect DMA Select Bit"]
577 #[inline]
578 pub fn lbkddmas(&self) -> LBKDDMASR {
579 LBKDDMASR::_from({
580 const MASK: bool = true;
581 const OFFSET: u8 = 3;
582 ((self.bits >> OFFSET) & MASK as u8) != 0
583 })
584 }
585 #[doc = "Bit 4 - Idle Line DMA Select"]
586 #[inline]
587 pub fn ildmas(&self) -> ILDMASR {
588 ILDMASR::_from({
589 const MASK: bool = true;
590 const OFFSET: u8 = 4;
591 ((self.bits >> OFFSET) & MASK as u8) != 0
592 })
593 }
594 #[doc = "Bit 5 - Receiver Full DMA Select"]
595 #[inline]
596 pub fn rdmas(&self) -> RDMASR {
597 RDMASR::_from({
598 const MASK: bool = true;
599 const OFFSET: u8 = 5;
600 ((self.bits >> OFFSET) & MASK as u8) != 0
601 })
602 }
603 #[doc = "Bit 6 - Transmission Complete DMA Select"]
604 #[inline]
605 pub fn tcdmas(&self) -> TCDMASR {
606 TCDMASR::_from({
607 const MASK: bool = true;
608 const OFFSET: u8 = 6;
609 ((self.bits >> OFFSET) & MASK as u8) != 0
610 })
611 }
612 #[doc = "Bit 7 - Transmitter DMA Select"]
613 #[inline]
614 pub fn tdmas(&self) -> TDMASR {
615 TDMASR::_from({
616 const MASK: bool = true;
617 const OFFSET: u8 = 7;
618 ((self.bits >> OFFSET) & MASK as u8) != 0
619 })
620 }
621}
622impl W {
623 #[doc = r" Reset value of the register"]
624 #[inline]
625 pub fn reset_value() -> W {
626 W { bits: 0 }
627 }
628 #[doc = r" Writes raw bits to the register"]
629 #[inline]
630 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
631 self.bits = bits;
632 self
633 }
634 #[doc = "Bit 3 - LIN Break Detect DMA Select Bit"]
635 #[inline]
636 pub fn lbkddmas(&mut self) -> _LBKDDMASW {
637 _LBKDDMASW { w: self }
638 }
639 #[doc = "Bit 4 - Idle Line DMA Select"]
640 #[inline]
641 pub fn ildmas(&mut self) -> _ILDMASW {
642 _ILDMASW { w: self }
643 }
644 #[doc = "Bit 5 - Receiver Full DMA Select"]
645 #[inline]
646 pub fn rdmas(&mut self) -> _RDMASW {
647 _RDMASW { w: self }
648 }
649 #[doc = "Bit 6 - Transmission Complete DMA Select"]
650 #[inline]
651 pub fn tcdmas(&mut self) -> _TCDMASW {
652 _TCDMASW { w: self }
653 }
654 #[doc = "Bit 7 - Transmitter DMA Select"]
655 #[inline]
656 pub fn tdmas(&mut self) -> _TDMASW {
657 _TDMASW { w: self }
658 }
659}