1#[doc = "Reader of register PCR0"]
2pub type R = crate::R<u32, super::PCR0>;
3#[doc = "Writer for register PCR0"]
4pub type W = crate::W<u32, super::PCR0>;
5#[doc = "Register PCR0 `reset()`'s with value 0"]
6impl crate::ResetValue for super::PCR0 {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Pull Select\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum PS_A {
16 #[doc = "0: Internal pulldown resistor is enabled on the corresponding pin, if the corresponding Port Pull Enable field is set."]
17 _0 = 0,
18 #[doc = "1: Internal pullup resistor is enabled on the corresponding pin, if the corresponding Port Pull Enable field is set."]
19 _1 = 1,
20}
21impl From<PS_A> for bool {
22 #[inline(always)]
23 fn from(variant: PS_A) -> Self {
24 variant as u8 != 0
25 }
26}
27#[doc = "Reader of field `PS`"]
28pub type PS_R = crate::R<bool, PS_A>;
29impl PS_R {
30 #[doc = r"Get enumerated values variant"]
31 #[inline(always)]
32 pub fn variant(&self) -> PS_A {
33 match self.bits {
34 false => PS_A::_0,
35 true => PS_A::_1,
36 }
37 }
38 #[doc = "Checks if the value of the field is `_0`"]
39 #[inline(always)]
40 pub fn is_0(&self) -> bool {
41 *self == PS_A::_0
42 }
43 #[doc = "Checks if the value of the field is `_1`"]
44 #[inline(always)]
45 pub fn is_1(&self) -> bool {
46 *self == PS_A::_1
47 }
48}
49#[doc = "Write proxy for field `PS`"]
50pub struct PS_W<'a> {
51 w: &'a mut W,
52}
53impl<'a> PS_W<'a> {
54 #[doc = r"Writes `variant` to the field"]
55 #[inline(always)]
56 pub fn variant(self, variant: PS_A) -> &'a mut W {
57 {
58 self.bit(variant.into())
59 }
60 }
61 #[doc = "Internal pulldown resistor is enabled on the corresponding pin, if the corresponding Port Pull Enable field is set."]
62 #[inline(always)]
63 pub fn _0(self) -> &'a mut W {
64 self.variant(PS_A::_0)
65 }
66 #[doc = "Internal pullup resistor is enabled on the corresponding pin, if the corresponding Port Pull Enable field is set."]
67 #[inline(always)]
68 pub fn _1(self) -> &'a mut W {
69 self.variant(PS_A::_1)
70 }
71 #[doc = r"Sets the field bit"]
72 #[inline(always)]
73 pub fn set_bit(self) -> &'a mut W {
74 self.bit(true)
75 }
76 #[doc = r"Clears the field bit"]
77 #[inline(always)]
78 pub fn clear_bit(self) -> &'a mut W {
79 self.bit(false)
80 }
81 #[doc = r"Writes raw bits to the field"]
82 #[inline(always)]
83 pub fn bit(self, value: bool) -> &'a mut W {
84 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
85 self.w
86 }
87}
88#[doc = "Pull Enable\n\nValue on reset: 0"]
89#[derive(Clone, Copy, Debug, PartialEq)]
90pub enum PE_A {
91 #[doc = "0: Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
92 _0 = 0,
93 #[doc = "1: Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
94 _1 = 1,
95}
96impl From<PE_A> for bool {
97 #[inline(always)]
98 fn from(variant: PE_A) -> Self {
99 variant as u8 != 0
100 }
101}
102#[doc = "Reader of field `PE`"]
103pub type PE_R = crate::R<bool, PE_A>;
104impl PE_R {
105 #[doc = r"Get enumerated values variant"]
106 #[inline(always)]
107 pub fn variant(&self) -> PE_A {
108 match self.bits {
109 false => PE_A::_0,
110 true => PE_A::_1,
111 }
112 }
113 #[doc = "Checks if the value of the field is `_0`"]
114 #[inline(always)]
115 pub fn is_0(&self) -> bool {
116 *self == PE_A::_0
117 }
118 #[doc = "Checks if the value of the field is `_1`"]
119 #[inline(always)]
120 pub fn is_1(&self) -> bool {
121 *self == PE_A::_1
122 }
123}
124#[doc = "Write proxy for field `PE`"]
125pub struct PE_W<'a> {
126 w: &'a mut W,
127}
128impl<'a> PE_W<'a> {
129 #[doc = r"Writes `variant` to the field"]
130 #[inline(always)]
131 pub fn variant(self, variant: PE_A) -> &'a mut W {
132 {
133 self.bit(variant.into())
134 }
135 }
136 #[doc = "Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
137 #[inline(always)]
138 pub fn _0(self) -> &'a mut W {
139 self.variant(PE_A::_0)
140 }
141 #[doc = "Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
142 #[inline(always)]
143 pub fn _1(self) -> &'a mut W {
144 self.variant(PE_A::_1)
145 }
146 #[doc = r"Sets the field bit"]
147 #[inline(always)]
148 pub fn set_bit(self) -> &'a mut W {
149 self.bit(true)
150 }
151 #[doc = r"Clears the field bit"]
152 #[inline(always)]
153 pub fn clear_bit(self) -> &'a mut W {
154 self.bit(false)
155 }
156 #[doc = r"Writes raw bits to the field"]
157 #[inline(always)]
158 pub fn bit(self, value: bool) -> &'a mut W {
159 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
160 self.w
161 }
162}
163#[doc = "Slew Rate Enable\n\nValue on reset: 0"]
164#[derive(Clone, Copy, Debug, PartialEq)]
165pub enum SRE_A {
166 #[doc = "0: Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output."]
167 _0 = 0,
168 #[doc = "1: Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output."]
169 _1 = 1,
170}
171impl From<SRE_A> for bool {
172 #[inline(always)]
173 fn from(variant: SRE_A) -> Self {
174 variant as u8 != 0
175 }
176}
177#[doc = "Reader of field `SRE`"]
178pub type SRE_R = crate::R<bool, SRE_A>;
179impl SRE_R {
180 #[doc = r"Get enumerated values variant"]
181 #[inline(always)]
182 pub fn variant(&self) -> SRE_A {
183 match self.bits {
184 false => SRE_A::_0,
185 true => SRE_A::_1,
186 }
187 }
188 #[doc = "Checks if the value of the field is `_0`"]
189 #[inline(always)]
190 pub fn is_0(&self) -> bool {
191 *self == SRE_A::_0
192 }
193 #[doc = "Checks if the value of the field is `_1`"]
194 #[inline(always)]
195 pub fn is_1(&self) -> bool {
196 *self == SRE_A::_1
197 }
198}
199#[doc = "Write proxy for field `SRE`"]
200pub struct SRE_W<'a> {
201 w: &'a mut W,
202}
203impl<'a> SRE_W<'a> {
204 #[doc = r"Writes `variant` to the field"]
205 #[inline(always)]
206 pub fn variant(self, variant: SRE_A) -> &'a mut W {
207 {
208 self.bit(variant.into())
209 }
210 }
211 #[doc = "Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output."]
212 #[inline(always)]
213 pub fn _0(self) -> &'a mut W {
214 self.variant(SRE_A::_0)
215 }
216 #[doc = "Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output."]
217 #[inline(always)]
218 pub fn _1(self) -> &'a mut W {
219 self.variant(SRE_A::_1)
220 }
221 #[doc = r"Sets the field bit"]
222 #[inline(always)]
223 pub fn set_bit(self) -> &'a mut W {
224 self.bit(true)
225 }
226 #[doc = r"Clears the field bit"]
227 #[inline(always)]
228 pub fn clear_bit(self) -> &'a mut W {
229 self.bit(false)
230 }
231 #[doc = r"Writes raw bits to the field"]
232 #[inline(always)]
233 pub fn bit(self, value: bool) -> &'a mut W {
234 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
235 self.w
236 }
237}
238#[doc = "Passive Filter Enable\n\nValue on reset: 0"]
239#[derive(Clone, Copy, Debug, PartialEq)]
240pub enum PFE_A {
241 #[doc = "0: Passive input filter is disabled on the corresponding pin."]
242 _0 = 0,
243 #[doc = "1: Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics."]
244 _1 = 1,
245}
246impl From<PFE_A> for bool {
247 #[inline(always)]
248 fn from(variant: PFE_A) -> Self {
249 variant as u8 != 0
250 }
251}
252#[doc = "Reader of field `PFE`"]
253pub type PFE_R = crate::R<bool, PFE_A>;
254impl PFE_R {
255 #[doc = r"Get enumerated values variant"]
256 #[inline(always)]
257 pub fn variant(&self) -> PFE_A {
258 match self.bits {
259 false => PFE_A::_0,
260 true => PFE_A::_1,
261 }
262 }
263 #[doc = "Checks if the value of the field is `_0`"]
264 #[inline(always)]
265 pub fn is_0(&self) -> bool {
266 *self == PFE_A::_0
267 }
268 #[doc = "Checks if the value of the field is `_1`"]
269 #[inline(always)]
270 pub fn is_1(&self) -> bool {
271 *self == PFE_A::_1
272 }
273}
274#[doc = "Write proxy for field `PFE`"]
275pub struct PFE_W<'a> {
276 w: &'a mut W,
277}
278impl<'a> PFE_W<'a> {
279 #[doc = r"Writes `variant` to the field"]
280 #[inline(always)]
281 pub fn variant(self, variant: PFE_A) -> &'a mut W {
282 {
283 self.bit(variant.into())
284 }
285 }
286 #[doc = "Passive input filter is disabled on the corresponding pin."]
287 #[inline(always)]
288 pub fn _0(self) -> &'a mut W {
289 self.variant(PFE_A::_0)
290 }
291 #[doc = "Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics."]
292 #[inline(always)]
293 pub fn _1(self) -> &'a mut W {
294 self.variant(PFE_A::_1)
295 }
296 #[doc = r"Sets the field bit"]
297 #[inline(always)]
298 pub fn set_bit(self) -> &'a mut W {
299 self.bit(true)
300 }
301 #[doc = r"Clears the field bit"]
302 #[inline(always)]
303 pub fn clear_bit(self) -> &'a mut W {
304 self.bit(false)
305 }
306 #[doc = r"Writes raw bits to the field"]
307 #[inline(always)]
308 pub fn bit(self, value: bool) -> &'a mut W {
309 self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
310 self.w
311 }
312}
313#[doc = "Open Drain Enable\n\nValue on reset: 0"]
314#[derive(Clone, Copy, Debug, PartialEq)]
315pub enum ODE_A {
316 #[doc = "0: Open drain output is disabled on the corresponding pin."]
317 _0 = 0,
318 #[doc = "1: Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output."]
319 _1 = 1,
320}
321impl From<ODE_A> for bool {
322 #[inline(always)]
323 fn from(variant: ODE_A) -> Self {
324 variant as u8 != 0
325 }
326}
327#[doc = "Reader of field `ODE`"]
328pub type ODE_R = crate::R<bool, ODE_A>;
329impl ODE_R {
330 #[doc = r"Get enumerated values variant"]
331 #[inline(always)]
332 pub fn variant(&self) -> ODE_A {
333 match self.bits {
334 false => ODE_A::_0,
335 true => ODE_A::_1,
336 }
337 }
338 #[doc = "Checks if the value of the field is `_0`"]
339 #[inline(always)]
340 pub fn is_0(&self) -> bool {
341 *self == ODE_A::_0
342 }
343 #[doc = "Checks if the value of the field is `_1`"]
344 #[inline(always)]
345 pub fn is_1(&self) -> bool {
346 *self == ODE_A::_1
347 }
348}
349#[doc = "Write proxy for field `ODE`"]
350pub struct ODE_W<'a> {
351 w: &'a mut W,
352}
353impl<'a> ODE_W<'a> {
354 #[doc = r"Writes `variant` to the field"]
355 #[inline(always)]
356 pub fn variant(self, variant: ODE_A) -> &'a mut W {
357 {
358 self.bit(variant.into())
359 }
360 }
361 #[doc = "Open drain output is disabled on the corresponding pin."]
362 #[inline(always)]
363 pub fn _0(self) -> &'a mut W {
364 self.variant(ODE_A::_0)
365 }
366 #[doc = "Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output."]
367 #[inline(always)]
368 pub fn _1(self) -> &'a mut W {
369 self.variant(ODE_A::_1)
370 }
371 #[doc = r"Sets the field bit"]
372 #[inline(always)]
373 pub fn set_bit(self) -> &'a mut W {
374 self.bit(true)
375 }
376 #[doc = r"Clears the field bit"]
377 #[inline(always)]
378 pub fn clear_bit(self) -> &'a mut W {
379 self.bit(false)
380 }
381 #[doc = r"Writes raw bits to the field"]
382 #[inline(always)]
383 pub fn bit(self, value: bool) -> &'a mut W {
384 self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
385 self.w
386 }
387}
388#[doc = "Drive Strength Enable\n\nValue on reset: 0"]
389#[derive(Clone, Copy, Debug, PartialEq)]
390pub enum DSE_A {
391 #[doc = "0: Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
392 _0 = 0,
393 #[doc = "1: High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
394 _1 = 1,
395}
396impl From<DSE_A> for bool {
397 #[inline(always)]
398 fn from(variant: DSE_A) -> Self {
399 variant as u8 != 0
400 }
401}
402#[doc = "Reader of field `DSE`"]
403pub type DSE_R = crate::R<bool, DSE_A>;
404impl DSE_R {
405 #[doc = r"Get enumerated values variant"]
406 #[inline(always)]
407 pub fn variant(&self) -> DSE_A {
408 match self.bits {
409 false => DSE_A::_0,
410 true => DSE_A::_1,
411 }
412 }
413 #[doc = "Checks if the value of the field is `_0`"]
414 #[inline(always)]
415 pub fn is_0(&self) -> bool {
416 *self == DSE_A::_0
417 }
418 #[doc = "Checks if the value of the field is `_1`"]
419 #[inline(always)]
420 pub fn is_1(&self) -> bool {
421 *self == DSE_A::_1
422 }
423}
424#[doc = "Write proxy for field `DSE`"]
425pub struct DSE_W<'a> {
426 w: &'a mut W,
427}
428impl<'a> DSE_W<'a> {
429 #[doc = r"Writes `variant` to the field"]
430 #[inline(always)]
431 pub fn variant(self, variant: DSE_A) -> &'a mut W {
432 {
433 self.bit(variant.into())
434 }
435 }
436 #[doc = "Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
437 #[inline(always)]
438 pub fn _0(self) -> &'a mut W {
439 self.variant(DSE_A::_0)
440 }
441 #[doc = "High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
442 #[inline(always)]
443 pub fn _1(self) -> &'a mut W {
444 self.variant(DSE_A::_1)
445 }
446 #[doc = r"Sets the field bit"]
447 #[inline(always)]
448 pub fn set_bit(self) -> &'a mut W {
449 self.bit(true)
450 }
451 #[doc = r"Clears the field bit"]
452 #[inline(always)]
453 pub fn clear_bit(self) -> &'a mut W {
454 self.bit(false)
455 }
456 #[doc = r"Writes raw bits to the field"]
457 #[inline(always)]
458 pub fn bit(self, value: bool) -> &'a mut W {
459 self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
460 self.w
461 }
462}
463#[doc = "Pin Mux Control\n\nValue on reset: 0"]
464#[derive(Clone, Copy, Debug, PartialEq)]
465#[repr(u8)]
466pub enum MUX_A {
467 #[doc = "0: Pin disabled (analog)."]
468 _000 = 0,
469 #[doc = "1: Alternative 1 (GPIO)."]
470 _001 = 1,
471 #[doc = "2: Alternative 2 (chip-specific)."]
472 _010 = 2,
473 #[doc = "3: Alternative 3 (chip-specific)."]
474 _011 = 3,
475 #[doc = "4: Alternative 4 (chip-specific)."]
476 _100 = 4,
477 #[doc = "5: Alternative 5 (chip-specific)."]
478 _101 = 5,
479 #[doc = "6: Alternative 6 (chip-specific)."]
480 _110 = 6,
481 #[doc = "7: Alternative 7 (chip-specific)."]
482 _111 = 7,
483}
484impl From<MUX_A> for u8 {
485 #[inline(always)]
486 fn from(variant: MUX_A) -> Self {
487 variant as _
488 }
489}
490#[doc = "Reader of field `MUX`"]
491pub type MUX_R = crate::R<u8, MUX_A>;
492impl MUX_R {
493 #[doc = r"Get enumerated values variant"]
494 #[inline(always)]
495 pub fn variant(&self) -> MUX_A {
496 match self.bits {
497 0 => MUX_A::_000,
498 1 => MUX_A::_001,
499 2 => MUX_A::_010,
500 3 => MUX_A::_011,
501 4 => MUX_A::_100,
502 5 => MUX_A::_101,
503 6 => MUX_A::_110,
504 7 => MUX_A::_111,
505 _ => unreachable!(),
506 }
507 }
508 #[doc = "Checks if the value of the field is `_000`"]
509 #[inline(always)]
510 pub fn is_000(&self) -> bool {
511 *self == MUX_A::_000
512 }
513 #[doc = "Checks if the value of the field is `_001`"]
514 #[inline(always)]
515 pub fn is_001(&self) -> bool {
516 *self == MUX_A::_001
517 }
518 #[doc = "Checks if the value of the field is `_010`"]
519 #[inline(always)]
520 pub fn is_010(&self) -> bool {
521 *self == MUX_A::_010
522 }
523 #[doc = "Checks if the value of the field is `_011`"]
524 #[inline(always)]
525 pub fn is_011(&self) -> bool {
526 *self == MUX_A::_011
527 }
528 #[doc = "Checks if the value of the field is `_100`"]
529 #[inline(always)]
530 pub fn is_100(&self) -> bool {
531 *self == MUX_A::_100
532 }
533 #[doc = "Checks if the value of the field is `_101`"]
534 #[inline(always)]
535 pub fn is_101(&self) -> bool {
536 *self == MUX_A::_101
537 }
538 #[doc = "Checks if the value of the field is `_110`"]
539 #[inline(always)]
540 pub fn is_110(&self) -> bool {
541 *self == MUX_A::_110
542 }
543 #[doc = "Checks if the value of the field is `_111`"]
544 #[inline(always)]
545 pub fn is_111(&self) -> bool {
546 *self == MUX_A::_111
547 }
548}
549#[doc = "Write proxy for field `MUX`"]
550pub struct MUX_W<'a> {
551 w: &'a mut W,
552}
553impl<'a> MUX_W<'a> {
554 #[doc = r"Writes `variant` to the field"]
555 #[inline(always)]
556 pub fn variant(self, variant: MUX_A) -> &'a mut W {
557 {
558 self.bits(variant.into())
559 }
560 }
561 #[doc = "Pin disabled (analog)."]
562 #[inline(always)]
563 pub fn _000(self) -> &'a mut W {
564 self.variant(MUX_A::_000)
565 }
566 #[doc = "Alternative 1 (GPIO)."]
567 #[inline(always)]
568 pub fn _001(self) -> &'a mut W {
569 self.variant(MUX_A::_001)
570 }
571 #[doc = "Alternative 2 (chip-specific)."]
572 #[inline(always)]
573 pub fn _010(self) -> &'a mut W {
574 self.variant(MUX_A::_010)
575 }
576 #[doc = "Alternative 3 (chip-specific)."]
577 #[inline(always)]
578 pub fn _011(self) -> &'a mut W {
579 self.variant(MUX_A::_011)
580 }
581 #[doc = "Alternative 4 (chip-specific)."]
582 #[inline(always)]
583 pub fn _100(self) -> &'a mut W {
584 self.variant(MUX_A::_100)
585 }
586 #[doc = "Alternative 5 (chip-specific)."]
587 #[inline(always)]
588 pub fn _101(self) -> &'a mut W {
589 self.variant(MUX_A::_101)
590 }
591 #[doc = "Alternative 6 (chip-specific)."]
592 #[inline(always)]
593 pub fn _110(self) -> &'a mut W {
594 self.variant(MUX_A::_110)
595 }
596 #[doc = "Alternative 7 (chip-specific)."]
597 #[inline(always)]
598 pub fn _111(self) -> &'a mut W {
599 self.variant(MUX_A::_111)
600 }
601 #[doc = r"Writes raw bits to the field"]
602 #[inline(always)]
603 pub fn bits(self, value: u8) -> &'a mut W {
604 self.w.bits = (self.w.bits & !(0x07 << 8)) | (((value as u32) & 0x07) << 8);
605 self.w
606 }
607}
608#[doc = "Lock Register\n\nValue on reset: 0"]
609#[derive(Clone, Copy, Debug, PartialEq)]
610pub enum LK_A {
611 #[doc = "0: Pin Control Register fields \\[15:0\\]
612are not locked."]
613 _0 = 0,
614 #[doc = "1: Pin Control Register fields \\[15:0\\]
615are locked and cannot be updated until the next system reset."]
616 _1 = 1,
617}
618impl From<LK_A> for bool {
619 #[inline(always)]
620 fn from(variant: LK_A) -> Self {
621 variant as u8 != 0
622 }
623}
624#[doc = "Reader of field `LK`"]
625pub type LK_R = crate::R<bool, LK_A>;
626impl LK_R {
627 #[doc = r"Get enumerated values variant"]
628 #[inline(always)]
629 pub fn variant(&self) -> LK_A {
630 match self.bits {
631 false => LK_A::_0,
632 true => LK_A::_1,
633 }
634 }
635 #[doc = "Checks if the value of the field is `_0`"]
636 #[inline(always)]
637 pub fn is_0(&self) -> bool {
638 *self == LK_A::_0
639 }
640 #[doc = "Checks if the value of the field is `_1`"]
641 #[inline(always)]
642 pub fn is_1(&self) -> bool {
643 *self == LK_A::_1
644 }
645}
646#[doc = "Write proxy for field `LK`"]
647pub struct LK_W<'a> {
648 w: &'a mut W,
649}
650impl<'a> LK_W<'a> {
651 #[doc = r"Writes `variant` to the field"]
652 #[inline(always)]
653 pub fn variant(self, variant: LK_A) -> &'a mut W {
654 {
655 self.bit(variant.into())
656 }
657 }
658 #[doc = "Pin Control Register fields \\[15:0\\]
659are not locked."]
660 #[inline(always)]
661 pub fn _0(self) -> &'a mut W {
662 self.variant(LK_A::_0)
663 }
664 #[doc = "Pin Control Register fields \\[15:0\\]
665are locked and cannot be updated until the next system reset."]
666 #[inline(always)]
667 pub fn _1(self) -> &'a mut W {
668 self.variant(LK_A::_1)
669 }
670 #[doc = r"Sets the field bit"]
671 #[inline(always)]
672 pub fn set_bit(self) -> &'a mut W {
673 self.bit(true)
674 }
675 #[doc = r"Clears the field bit"]
676 #[inline(always)]
677 pub fn clear_bit(self) -> &'a mut W {
678 self.bit(false)
679 }
680 #[doc = r"Writes raw bits to the field"]
681 #[inline(always)]
682 pub fn bit(self, value: bool) -> &'a mut W {
683 self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
684 self.w
685 }
686}
687#[doc = "Interrupt Configuration\n\nValue on reset: 0"]
688#[derive(Clone, Copy, Debug, PartialEq)]
689#[repr(u8)]
690pub enum IRQC_A {
691 #[doc = "0: Interrupt/DMA request disabled."]
692 _0000 = 0,
693 #[doc = "1: DMA request on rising edge."]
694 _0001 = 1,
695 #[doc = "2: DMA request on falling edge."]
696 _0010 = 2,
697 #[doc = "3: DMA request on either edge."]
698 _0011 = 3,
699 #[doc = "8: Interrupt when logic zero."]
700 _1000 = 8,
701 #[doc = "9: Interrupt on rising edge."]
702 _1001 = 9,
703 #[doc = "10: Interrupt on falling edge."]
704 _1010 = 10,
705 #[doc = "11: Interrupt on either edge."]
706 _1011 = 11,
707 #[doc = "12: Interrupt when logic one."]
708 _1100 = 12,
709}
710impl From<IRQC_A> for u8 {
711 #[inline(always)]
712 fn from(variant: IRQC_A) -> Self {
713 variant as _
714 }
715}
716#[doc = "Reader of field `IRQC`"]
717pub type IRQC_R = crate::R<u8, IRQC_A>;
718impl IRQC_R {
719 #[doc = r"Get enumerated values variant"]
720 #[inline(always)]
721 pub fn variant(&self) -> crate::Variant<u8, IRQC_A> {
722 use crate::Variant::*;
723 match self.bits {
724 0 => Val(IRQC_A::_0000),
725 1 => Val(IRQC_A::_0001),
726 2 => Val(IRQC_A::_0010),
727 3 => Val(IRQC_A::_0011),
728 8 => Val(IRQC_A::_1000),
729 9 => Val(IRQC_A::_1001),
730 10 => Val(IRQC_A::_1010),
731 11 => Val(IRQC_A::_1011),
732 12 => Val(IRQC_A::_1100),
733 i => Res(i),
734 }
735 }
736 #[doc = "Checks if the value of the field is `_0000`"]
737 #[inline(always)]
738 pub fn is_0000(&self) -> bool {
739 *self == IRQC_A::_0000
740 }
741 #[doc = "Checks if the value of the field is `_0001`"]
742 #[inline(always)]
743 pub fn is_0001(&self) -> bool {
744 *self == IRQC_A::_0001
745 }
746 #[doc = "Checks if the value of the field is `_0010`"]
747 #[inline(always)]
748 pub fn is_0010(&self) -> bool {
749 *self == IRQC_A::_0010
750 }
751 #[doc = "Checks if the value of the field is `_0011`"]
752 #[inline(always)]
753 pub fn is_0011(&self) -> bool {
754 *self == IRQC_A::_0011
755 }
756 #[doc = "Checks if the value of the field is `_1000`"]
757 #[inline(always)]
758 pub fn is_1000(&self) -> bool {
759 *self == IRQC_A::_1000
760 }
761 #[doc = "Checks if the value of the field is `_1001`"]
762 #[inline(always)]
763 pub fn is_1001(&self) -> bool {
764 *self == IRQC_A::_1001
765 }
766 #[doc = "Checks if the value of the field is `_1010`"]
767 #[inline(always)]
768 pub fn is_1010(&self) -> bool {
769 *self == IRQC_A::_1010
770 }
771 #[doc = "Checks if the value of the field is `_1011`"]
772 #[inline(always)]
773 pub fn is_1011(&self) -> bool {
774 *self == IRQC_A::_1011
775 }
776 #[doc = "Checks if the value of the field is `_1100`"]
777 #[inline(always)]
778 pub fn is_1100(&self) -> bool {
779 *self == IRQC_A::_1100
780 }
781}
782#[doc = "Write proxy for field `IRQC`"]
783pub struct IRQC_W<'a> {
784 w: &'a mut W,
785}
786impl<'a> IRQC_W<'a> {
787 #[doc = r"Writes `variant` to the field"]
788 #[inline(always)]
789 pub fn variant(self, variant: IRQC_A) -> &'a mut W {
790 unsafe { self.bits(variant.into()) }
791 }
792 #[doc = "Interrupt/DMA request disabled."]
793 #[inline(always)]
794 pub fn _0000(self) -> &'a mut W {
795 self.variant(IRQC_A::_0000)
796 }
797 #[doc = "DMA request on rising edge."]
798 #[inline(always)]
799 pub fn _0001(self) -> &'a mut W {
800 self.variant(IRQC_A::_0001)
801 }
802 #[doc = "DMA request on falling edge."]
803 #[inline(always)]
804 pub fn _0010(self) -> &'a mut W {
805 self.variant(IRQC_A::_0010)
806 }
807 #[doc = "DMA request on either edge."]
808 #[inline(always)]
809 pub fn _0011(self) -> &'a mut W {
810 self.variant(IRQC_A::_0011)
811 }
812 #[doc = "Interrupt when logic zero."]
813 #[inline(always)]
814 pub fn _1000(self) -> &'a mut W {
815 self.variant(IRQC_A::_1000)
816 }
817 #[doc = "Interrupt on rising edge."]
818 #[inline(always)]
819 pub fn _1001(self) -> &'a mut W {
820 self.variant(IRQC_A::_1001)
821 }
822 #[doc = "Interrupt on falling edge."]
823 #[inline(always)]
824 pub fn _1010(self) -> &'a mut W {
825 self.variant(IRQC_A::_1010)
826 }
827 #[doc = "Interrupt on either edge."]
828 #[inline(always)]
829 pub fn _1011(self) -> &'a mut W {
830 self.variant(IRQC_A::_1011)
831 }
832 #[doc = "Interrupt when logic one."]
833 #[inline(always)]
834 pub fn _1100(self) -> &'a mut W {
835 self.variant(IRQC_A::_1100)
836 }
837 #[doc = r"Writes raw bits to the field"]
838 #[inline(always)]
839 pub unsafe fn bits(self, value: u8) -> &'a mut W {
840 self.w.bits = (self.w.bits & !(0x0f << 16)) | (((value as u32) & 0x0f) << 16);
841 self.w
842 }
843}
844#[doc = "Interrupt Status Flag\n\nValue on reset: 0"]
845#[derive(Clone, Copy, Debug, PartialEq)]
846pub enum ISF_A {
847 #[doc = "0: Configured interrupt is not detected."]
848 _0 = 0,
849 #[doc = "1: Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic one is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
850 _1 = 1,
851}
852impl From<ISF_A> for bool {
853 #[inline(always)]
854 fn from(variant: ISF_A) -> Self {
855 variant as u8 != 0
856 }
857}
858#[doc = "Reader of field `ISF`"]
859pub type ISF_R = crate::R<bool, ISF_A>;
860impl ISF_R {
861 #[doc = r"Get enumerated values variant"]
862 #[inline(always)]
863 pub fn variant(&self) -> ISF_A {
864 match self.bits {
865 false => ISF_A::_0,
866 true => ISF_A::_1,
867 }
868 }
869 #[doc = "Checks if the value of the field is `_0`"]
870 #[inline(always)]
871 pub fn is_0(&self) -> bool {
872 *self == ISF_A::_0
873 }
874 #[doc = "Checks if the value of the field is `_1`"]
875 #[inline(always)]
876 pub fn is_1(&self) -> bool {
877 *self == ISF_A::_1
878 }
879}
880#[doc = "Write proxy for field `ISF`"]
881pub struct ISF_W<'a> {
882 w: &'a mut W,
883}
884impl<'a> ISF_W<'a> {
885 #[doc = r"Writes `variant` to the field"]
886 #[inline(always)]
887 pub fn variant(self, variant: ISF_A) -> &'a mut W {
888 {
889 self.bit(variant.into())
890 }
891 }
892 #[doc = "Configured interrupt is not detected."]
893 #[inline(always)]
894 pub fn _0(self) -> &'a mut W {
895 self.variant(ISF_A::_0)
896 }
897 #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic one is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
898 #[inline(always)]
899 pub fn _1(self) -> &'a mut W {
900 self.variant(ISF_A::_1)
901 }
902 #[doc = r"Sets the field bit"]
903 #[inline(always)]
904 pub fn set_bit(self) -> &'a mut W {
905 self.bit(true)
906 }
907 #[doc = r"Clears the field bit"]
908 #[inline(always)]
909 pub fn clear_bit(self) -> &'a mut W {
910 self.bit(false)
911 }
912 #[doc = r"Writes raw bits to the field"]
913 #[inline(always)]
914 pub fn bit(self, value: bool) -> &'a mut W {
915 self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
916 self.w
917 }
918}
919impl R {
920 #[doc = "Bit 0 - Pull Select"]
921 #[inline(always)]
922 pub fn ps(&self) -> PS_R {
923 PS_R::new((self.bits & 0x01) != 0)
924 }
925 #[doc = "Bit 1 - Pull Enable"]
926 #[inline(always)]
927 pub fn pe(&self) -> PE_R {
928 PE_R::new(((self.bits >> 1) & 0x01) != 0)
929 }
930 #[doc = "Bit 2 - Slew Rate Enable"]
931 #[inline(always)]
932 pub fn sre(&self) -> SRE_R {
933 SRE_R::new(((self.bits >> 2) & 0x01) != 0)
934 }
935 #[doc = "Bit 4 - Passive Filter Enable"]
936 #[inline(always)]
937 pub fn pfe(&self) -> PFE_R {
938 PFE_R::new(((self.bits >> 4) & 0x01) != 0)
939 }
940 #[doc = "Bit 5 - Open Drain Enable"]
941 #[inline(always)]
942 pub fn ode(&self) -> ODE_R {
943 ODE_R::new(((self.bits >> 5) & 0x01) != 0)
944 }
945 #[doc = "Bit 6 - Drive Strength Enable"]
946 #[inline(always)]
947 pub fn dse(&self) -> DSE_R {
948 DSE_R::new(((self.bits >> 6) & 0x01) != 0)
949 }
950 #[doc = "Bits 8:10 - Pin Mux Control"]
951 #[inline(always)]
952 pub fn mux(&self) -> MUX_R {
953 MUX_R::new(((self.bits >> 8) & 0x07) as u8)
954 }
955 #[doc = "Bit 15 - Lock Register"]
956 #[inline(always)]
957 pub fn lk(&self) -> LK_R {
958 LK_R::new(((self.bits >> 15) & 0x01) != 0)
959 }
960 #[doc = "Bits 16:19 - Interrupt Configuration"]
961 #[inline(always)]
962 pub fn irqc(&self) -> IRQC_R {
963 IRQC_R::new(((self.bits >> 16) & 0x0f) as u8)
964 }
965 #[doc = "Bit 24 - Interrupt Status Flag"]
966 #[inline(always)]
967 pub fn isf(&self) -> ISF_R {
968 ISF_R::new(((self.bits >> 24) & 0x01) != 0)
969 }
970}
971impl W {
972 #[doc = "Bit 0 - Pull Select"]
973 #[inline(always)]
974 pub fn ps(&mut self) -> PS_W {
975 PS_W { w: self }
976 }
977 #[doc = "Bit 1 - Pull Enable"]
978 #[inline(always)]
979 pub fn pe(&mut self) -> PE_W {
980 PE_W { w: self }
981 }
982 #[doc = "Bit 2 - Slew Rate Enable"]
983 #[inline(always)]
984 pub fn sre(&mut self) -> SRE_W {
985 SRE_W { w: self }
986 }
987 #[doc = "Bit 4 - Passive Filter Enable"]
988 #[inline(always)]
989 pub fn pfe(&mut self) -> PFE_W {
990 PFE_W { w: self }
991 }
992 #[doc = "Bit 5 - Open Drain Enable"]
993 #[inline(always)]
994 pub fn ode(&mut self) -> ODE_W {
995 ODE_W { w: self }
996 }
997 #[doc = "Bit 6 - Drive Strength Enable"]
998 #[inline(always)]
999 pub fn dse(&mut self) -> DSE_W {
1000 DSE_W { w: self }
1001 }
1002 #[doc = "Bits 8:10 - Pin Mux Control"]
1003 #[inline(always)]
1004 pub fn mux(&mut self) -> MUX_W {
1005 MUX_W { w: self }
1006 }
1007 #[doc = "Bit 15 - Lock Register"]
1008 #[inline(always)]
1009 pub fn lk(&mut self) -> LK_W {
1010 LK_W { w: self }
1011 }
1012 #[doc = "Bits 16:19 - Interrupt Configuration"]
1013 #[inline(always)]
1014 pub fn irqc(&mut self) -> IRQC_W {
1015 IRQC_W { w: self }
1016 }
1017 #[doc = "Bit 24 - Interrupt Status Flag"]
1018 #[inline(always)]
1019 pub fn isf(&mut self) -> ISF_W {
1020 ISF_W { w: self }
1021 }
1022}