1#[doc = "Reader of register ADDR"]
2pub type R = crate::R<u8, super::ADDR>;
3#[doc = "Writer for register ADDR"]
4pub type W = crate::W<u8, super::ADDR>;
5#[doc = "Register ADDR `reset()`'s with value 0"]
6impl crate::ResetValue for super::ADDR {
7 type Type = u8;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `ADDR`"]
14pub type ADDR_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `ADDR`"]
16pub struct ADDR_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> ADDR_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u8) -> &'a mut W {
23 self.w.bits = (self.w.bits & !0x7f) | ((value as u8) & 0x7f);
24 self.w
25 }
26}
27#[doc = "Reader of field `LSEN`"]
28pub type LSEN_R = crate::R<bool, bool>;
29#[doc = "Write proxy for field `LSEN`"]
30pub struct LSEN_W<'a> {
31 w: &'a mut W,
32}
33impl<'a> LSEN_W<'a> {
34 #[doc = r"Sets the field bit"]
35 #[inline(always)]
36 pub fn set_bit(self) -> &'a mut W {
37 self.bit(true)
38 }
39 #[doc = r"Clears the field bit"]
40 #[inline(always)]
41 pub fn clear_bit(self) -> &'a mut W {
42 self.bit(false)
43 }
44 #[doc = r"Writes raw bits to the field"]
45 #[inline(always)]
46 pub fn bit(self, value: bool) -> &'a mut W {
47 self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u8) & 0x01) << 7);
48 self.w
49 }
50}
51impl R {
52 #[doc = "Bits 0:6 - USB Address"]
53 #[inline(always)]
54 pub fn addr(&self) -> ADDR_R {
55 ADDR_R::new((self.bits & 0x7f) as u8)
56 }
57 #[doc = "Bit 7 - Low Speed Enable bit"]
58 #[inline(always)]
59 pub fn lsen(&self) -> LSEN_R {
60 LSEN_R::new(((self.bits >> 7) & 0x01) != 0)
61 }
62}
63impl W {
64 #[doc = "Bits 0:6 - USB Address"]
65 #[inline(always)]
66 pub fn addr(&mut self) -> ADDR_W {
67 ADDR_W { w: self }
68 }
69 #[doc = "Bit 7 - Low Speed Enable bit"]
70 #[inline(always)]
71 pub fn lsen(&mut self) -> LSEN_W {
72 LSEN_W { w: self }
73 }
74}