[−][src]Type Definition imxrt1062_flexspi::mcr0::R
type R = R<u32, MCR0>;
Reader of register MCR0
Methods
impl R
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pub fn swreset(&self) -> SWRESET_R
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Bit 0 - Software Reset
pub fn mdis(&self) -> MDIS_R
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Bit 1 - Module Disable
pub fn rxclksrc(&self) -> RXCLKSRC_R
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Bits 4:5 - Sample Clock source selection for Flash Reading
pub fn ardfen(&self) -> ARDFEN_R
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Bit 6 - Enable AHB bus Read Access to IP RX FIFO.
pub fn atdfen(&self) -> ATDFEN_R
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Bit 7 - Enable AHB bus Write Access to IP TX FIFO.
pub fn hsen(&self) -> HSEN_R
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Bit 11 - Half Speed Serial Flash access Enable.
pub fn dozeen(&self) -> DOZEEN_R
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Bit 12 - Doze mode enable bit
pub fn combinationen(&self) -> COMBINATIONEN_R
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Bit 13 - This bit is to support Flash Octal mode access by combining Port A and B Data pins (SIOA[3:0] and SIOB[3:0]).
pub fn sckfreerunen(&self) -> SCKFREERUNEN_R
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Bit 14 - This bit is used to force SCK output free-running. For FPGA applications, external device may use SCK clock as reference clock to its internal PLL. If SCK free-running is enabled, data sampling with loopback clock from SCK pad is not supported (MCR0[RXCLKSRC]=2).
pub fn ipgrantwait(&self) -> IPGRANTWAIT_R
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Bits 16:23 - Time out wait cycle for IP command grant.
pub fn ahbgrantwait(&self) -> AHBGRANTWAIT_R
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Bits 24:31 - Timeout wait cycle for AHB command grant.