//! ARM divider.
//!//! This divides the output from the AHB PLL (either PLL1 or PLL6, depending
//! on the system).
usecrate::ral::{self,ccm::CCM};/// Set the ARM divider.
////// The implementation clamps `divider` between 1 and 8.
#[inline(always)]pubfnset_divider(ccm:&mut CCM, divider:u32){let podf = divider.clamp(1,8)-1;ral::modify_reg!(ral::ccm, ccm,CACRR,ARM_PODF: podf);crate::ccm::wait_handshake(ccm);}/// Returns the ARM divider.
#[inline(always)]pubfndivider(ccm:&CCM)->u32{ral::read_reg!(ral::ccm, ccm,CACRR,ARM_PODF)+1}