iis2mdc 0.2.0

Simple driver for ST iis2mdc sensor
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147

use core::fmt;

use crate::Register;

/// The CFG_REG_B register
#[derive(Debug)]
pub struct CfgRegC(u8);

impl fmt::Display for CfgRegC {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        write!(f, "{}", self.0)
    }
}

impl fmt::Binary for CfgRegC {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        write!(f, "{:b}", self.0)
    }
}

impl fmt::LowerHex for CfgRegC {
    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
        fmt::LowerHex::fmt(&self.0, f)
    }
}

/// Sub-address of the register.
pub const ADDR: u8 = 0x62u8;

/// If '1', the INTERRUPT signal (INT bit in INT_SOURCE_REG (64h)) is driven
/// on the INT/DRDY pin. The INT/DRDY pin is configured in push-pull output mode.
///
/// Default value: 0
const INT_ON_PIN: u8 = 6;

/// I2C_DIS If ‘1’, the I2C interface is inhibited. Only the SPI interface can be used.
const I2C_DIS: u8 = 5;

/// If enabled, reading of incorrect data is avoided when the user reads asynchronously. In fact if the read request arrives during an update of the output data, a
/// latch is possible, reading incoherent high and low parts of the same register. Only
/// one part is updated and the other one remains old.
const BDU: u8 = 4;

/// If ‘1’, an inversion of the low and high parts of the data occurs.
const BLE: u8 = 3;

/// If ‘1’, the self-test is enabled.
const SELF_TEST: u8 = 1;

/// If '1', the data-ready signal (Zyxda bit in STATUS_REG (67h)) is driven on the
/// INT/DRDY pin. The INT/DRDY pin is configured in push-pull output mode.
///
/// Default value: 0
const DRDY_ON_PIN: u8 = 0;

impl Register for CfgRegC {}

impl CfgRegC {
    pub fn new(bits: u8) -> Self {
        CfgRegC(bits)
    }

    pub fn value<I2C>(&mut self, i2c: &mut I2C) -> Result<u8, I2C::Error>
    where
        I2C: embedded_hal::i2c::I2c,
    {
        self.read(i2c, ADDR)
    }

    pub fn int_on_pin(&mut self) -> bool {
        self.0 & (1 << INT_ON_PIN) != 0
    }

    pub fn set_int_on_pin<I2C>(&mut self, i2c: &mut I2C, value: bool) -> Result<(), I2C::Error>
    where
        I2C: embedded_hal::i2c::I2c,
    {
        self.0 &= !(1 << INT_ON_PIN);
        self.0 |= (value as u8) << INT_ON_PIN;
        self.write(i2c, ADDR, self.0)
    }

    pub fn i2c_dis(&mut self) -> bool {
        self.0 & (1 << I2C_DIS) != 0
    }

    pub fn set_i2c_dis<I2C>(&mut self, i2c: &mut I2C, value: bool) -> Result<(), I2C::Error>
    where
        I2C: embedded_hal::i2c::I2c,
    {
        self.0 &= !(1 << I2C_DIS);
        self.0 |= (value as u8) << I2C_DIS;
        self.write(i2c, ADDR, self.0)
    }

    pub fn bdu(&mut self) -> bool {
        self.0 & (1 << BDU) != 0
    }

    pub fn set_bdu<I2C>(&mut self, i2c: &mut I2C, value: bool) -> Result<(), I2C::Error>
    where
        I2C: embedded_hal::i2c::I2c,
    {
        self.0 &= !(1 << BDU);
        self.0 |= (value as u8) << BDU;
        self.write(i2c, ADDR, self.0)
    }

    pub fn ble(&mut self) -> bool {
        self.0 & (1 << BLE) != 0
    }

    pub fn set_ble<I2C>(&mut self, i2c: &mut I2C, value: bool) -> Result<(), I2C::Error>
    where
        I2C: embedded_hal::i2c::I2c,
    {
        self.0 &= !(1 << BLE);
        self.0 |= (value as u8) << BLE;
        self.write(i2c, ADDR, self.0)
    }

    pub fn self_test(&mut self) -> bool {
        self.0 & (1 << SELF_TEST) != 0
    }

    pub fn set_self_test<I2C>(&mut self, i2c: &mut I2C, value: bool) -> Result<(), I2C::Error>
    where
        I2C: embedded_hal::i2c::I2c,
    {
        self.0 &= !(1 << SELF_TEST);
        self.0 |= (value as u8) << SELF_TEST;
        self.write(i2c, ADDR, self.0)
    }

    pub fn drdy_on_pin(&mut self) -> bool {
        self.0 & (1 << DRDY_ON_PIN) != 0
    }

    pub fn set_drdy_on_pin<I2C>(&mut self, i2c: &mut I2C, value: bool) -> Result<(), I2C::Error>
    where
        I2C: embedded_hal::i2c::I2c,
    {
        self.0 &= !(1 << DRDY_ON_PIN);
        self.0 |= (value as u8) << DRDY_ON_PIN;
        self.write(i2c, ADDR, self.0)
    }
}