hyperlight-common 0.17.0

Hyperlight's components common to host and guest.
Documentation 
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// SPDX-License-Identifier: Apache-2.0
// Copyright 2025 The Hyperlight Authors.

// The addresses in this file should be coordinated with
// src/hyperlight_guest/src/arch/amd64/layout.rs and
// src/hyperlight_guest_bin/src/arch/amd64/layout.rs

/// We have this the top of the page below the top of memory in order
/// to make working with start/end ptrs in a few places more
/// convenient (not needing to worry about overflow)
pub const SCRATCH_TOP_GVA: usize = 0xffff_ffff_ffff_efff;
pub const SNAPSHOT_PT_GVA_MIN: usize = 0xffff_8000_0000_0000;
pub const SNAPSHOT_PT_GVA_MAX: usize = 0xffff_80ff_ffff_ffff;

/// We assume 36-bit IPAs for now, since every amd64 processor
/// supports at least 36 bits.  Almost all of them support at least 40
/// bits, so we could consider bumping this in the future if we were
/// ever memory-constrained.
pub const SCRATCH_TOP_GPA: usize = 0x0000_000f_ffff_ffff;

pub fn io_page() -> Option<(u64, u64)> {
    None
}

/// On amd64, this is:
/// - Two pages for the TSS and IDT
/// - (up to) 4 pages for the PTEs for mapping that (including CoW'ing the root PT)
/// - A page for the smallest possible non-exception stack
/// - (up to) 3 pages for mapping that
/// - Two pages for the exception stack and metadata
/// - A page-aligned amount of memory for I/O buffers (for now)
pub fn min_scratch_size(input_data_size: usize, output_data_size: usize) -> usize {
    (input_data_size + output_data_size).next_multiple_of(crate::vmem::PAGE_SIZE)
        + 12 * crate::vmem::PAGE_SIZE
}