ht32f1yyy/ht32f175x/mctm/
mctm_ch1icfr.rs

1#[doc = "Register `MCTM_CH1ICFR` reader"]
2pub struct R(crate::R<MCTM_CH1ICFR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<MCTM_CH1ICFR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<MCTM_CH1ICFR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<MCTM_CH1ICFR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `MCTM_CH1ICFR` writer"]
17pub struct W(crate::W<MCTM_CH1ICFR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<MCTM_CH1ICFR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<MCTM_CH1ICFR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<MCTM_CH1ICFR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TI1F` reader - TI1F"]
38pub type TI1F_R = crate::FieldReader;
39#[doc = "Field `TI1F` writer - TI1F"]
40pub type TI1F_W<'a, const O: u8> = crate::FieldWriter<'a, MCTM_CH1ICFR_SPEC, 4, O>;
41#[doc = "Field `CH1CCS` reader - CH1CCS"]
42pub type CH1CCS_R = crate::FieldReader;
43#[doc = "Field `CH1CCS` writer - CH1CCS"]
44pub type CH1CCS_W<'a, const O: u8> = crate::FieldWriter<'a, MCTM_CH1ICFR_SPEC, 2, O>;
45#[doc = "Field `CH1PSC` reader - CH1PSC"]
46pub type CH1PSC_R = crate::FieldReader;
47#[doc = "Field `CH1PSC` writer - CH1PSC"]
48pub type CH1PSC_W<'a, const O: u8> = crate::FieldWriter<'a, MCTM_CH1ICFR_SPEC, 2, O>;
49impl R {
50    #[doc = "Bits 0:3 - TI1F"]
51    #[inline(always)]
52    pub fn ti1f(&self) -> TI1F_R {
53        TI1F_R::new((self.bits & 0x0f) as u8)
54    }
55    #[doc = "Bits 16:17 - CH1CCS"]
56    #[inline(always)]
57    pub fn ch1ccs(&self) -> CH1CCS_R {
58        CH1CCS_R::new(((self.bits >> 16) & 3) as u8)
59    }
60    #[doc = "Bits 18:19 - CH1PSC"]
61    #[inline(always)]
62    pub fn ch1psc(&self) -> CH1PSC_R {
63        CH1PSC_R::new(((self.bits >> 18) & 3) as u8)
64    }
65}
66impl W {
67    #[doc = "Bits 0:3 - TI1F"]
68    #[inline(always)]
69    #[must_use]
70    pub fn ti1f(&mut self) -> TI1F_W<0> {
71        TI1F_W::new(self)
72    }
73    #[doc = "Bits 16:17 - CH1CCS"]
74    #[inline(always)]
75    #[must_use]
76    pub fn ch1ccs(&mut self) -> CH1CCS_W<16> {
77        CH1CCS_W::new(self)
78    }
79    #[doc = "Bits 18:19 - CH1PSC"]
80    #[inline(always)]
81    #[must_use]
82    pub fn ch1psc(&mut self) -> CH1PSC_W<18> {
83        CH1PSC_W::new(self)
84    }
85    #[doc = "Writes raw bits to the register."]
86    #[inline(always)]
87    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
88        self.0.bits(bits);
89        self
90    }
91}
92#[doc = "MCTM_CH1ICFR\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mctm_ch1icfr](index.html) module"]
93pub struct MCTM_CH1ICFR_SPEC;
94impl crate::RegisterSpec for MCTM_CH1ICFR_SPEC {
95    type Ux = u32;
96}
97#[doc = "`read()` method returns [mctm_ch1icfr::R](R) reader structure"]
98impl crate::Readable for MCTM_CH1ICFR_SPEC {
99    type Reader = R;
100}
101#[doc = "`write(|w| ..)` method takes [mctm_ch1icfr::W](W) writer structure"]
102impl crate::Writable for MCTM_CH1ICFR_SPEC {
103    type Writer = W;
104    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
105    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
106}
107#[doc = "`reset()` method sets MCTM_CH1ICFR to value 0"]
108impl crate::Resettable for MCTM_CH1ICFR_SPEC {
109    const RESET_VALUE: Self::Ux = 0;
110}
ht32f1yyy/ht32f175x/mctm/mctm_ch1icfr.rs

ht32f1yyy/ht32f175x/mctm/
mctm_ch1icfr.rs
