hk32-partial-hal 0.2.0

HK32 partial HAL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133

pub use hk32c030xx_pac as pac;

embassy_hal_internal::peripherals_definition!(
    PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1,
    PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC13, PC14, PC15,
    PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, SPI1, SPI2
);

embassy_hal_internal::peripherals_struct!(
    PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, PB0, PB1,
    PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC13, PC14, PC15,
    PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, SPI1, SPI2
);

#[allow(unused)]
#[macro_export]
macro_rules! foreach_spi {
	($($pat:tt => $code:tt;)*) => {
		macro_rules! __foreach_spi_inner {
			$(($pat) => $code;)*
			($_:tt) => {}
		}
		__foreach_spi_inner!((SPI1));
		__foreach_spi_inner!((SPI2));
	};
}

#[allow(unused)]
#[macro_export]
macro_rules! foreach_pin {
	($($pat:tt => $code:tt;)*) => {
		macro_rules! __foreach_pin_inner {
			$(($pat) => $code;)*
			($_:tt) => {}
		}
		__foreach_pin_inner!((PA0,GPIOA,0,0,EXTI0));
		__foreach_pin_inner!((PA1,GPIOA,0,1,EXTI1));
		__foreach_pin_inner!((PA2,GPIOA,0,2,EXTI2));
		__foreach_pin_inner!((PA3,GPIOA,0,3,EXTI3));
		__foreach_pin_inner!((PA4,GPIOA,0,4,EXTI4));
		__foreach_pin_inner!((PA5,GPIOA,0,5,EXTI5));
		__foreach_pin_inner!((PA6,GPIOA,0,6,EXTI6));
		__foreach_pin_inner!((PA7,GPIOA,0,7,EXTI7));
		__foreach_pin_inner!((PA8,GPIOA,0,8,EXTI8));
		__foreach_pin_inner!((PA9,GPIOA,0,9,EXTI9));
		__foreach_pin_inner!((PA10,GPIOA,0,10,EXTI10));
		__foreach_pin_inner!((PA11,GPIOA,0,11,EXTI11));
		__foreach_pin_inner!((PA12,GPIOA,0,12,EXTI12));
		__foreach_pin_inner!((PA13,GPIOA,0,13,EXTI13));
		__foreach_pin_inner!((PA14,GPIOA,0,14,EXTI14));
		__foreach_pin_inner!((PA15,GPIOA,0,15,EXTI15));
		__foreach_pin_inner!((PB0,GPIOB,1,0,EXTI0));
		__foreach_pin_inner!((PB1,GPIOB,1,1,EXTI1));
		__foreach_pin_inner!((PB2,GPIOB,1,2,EXTI2));
		__foreach_pin_inner!((PB3,GPIOB,1,3,EXTI3));
		__foreach_pin_inner!((PB4,GPIOB,1,4,EXTI4));
		__foreach_pin_inner!((PB5,GPIOB,1,5,EXTI5));
		__foreach_pin_inner!((PB6,GPIOB,1,6,EXTI6));
		__foreach_pin_inner!((PB7,GPIOB,1,7,EXTI7));
		__foreach_pin_inner!((PB8,GPIOB,1,8,EXTI8));
		__foreach_pin_inner!((PB9,GPIOB,1,9,EXTI9));
		__foreach_pin_inner!((PB10,GPIOB,1,10,EXTI10));
		__foreach_pin_inner!((PB11,GPIOB,1,11,EXTI11));
		__foreach_pin_inner!((PB12,GPIOB,1,12,EXTI12));
		__foreach_pin_inner!((PB13,GPIOB,1,13,EXTI13));
		__foreach_pin_inner!((PB14,GPIOB,1,14,EXTI14));
		__foreach_pin_inner!((PB15,GPIOB,1,15,EXTI15));
		__foreach_pin_inner!((PC13,GPIOC,2,13,EXTI13));
		__foreach_pin_inner!((PC14,GPIOC,2,14,EXTI14));
		__foreach_pin_inner!((PC15,GPIOC,2,15,EXTI15));
		__foreach_pin_inner!((PF0,GPIOF,5,0,EXTI0));
		__foreach_pin_inner!((PF1,GPIOF,5,1,EXTI1));
		__foreach_pin_inner!((PF2,GPIOF,5,2,EXTI2));
		__foreach_pin_inner!((PF3,GPIOF,5,3,EXTI3));
		__foreach_pin_inner!((PF4,GPIOF,5,4,EXTI4));
		__foreach_pin_inner!((PF5,GPIOF,5,5,EXTI5));
		__foreach_pin_inner!((PF6,GPIOF,5,6,EXTI6));
		__foreach_pin_inner!((PF7,GPIOF,5,7,EXTI7));
		__foreach_pin_inner!((PF8,GPIOF,5,8,EXTI8));
	};
}

pub fn gpio_block(n: usize) -> crate::pac::gpio::Gpio {
    match n {
        0 => crate::pac::GPIOA,
        1 => crate::pac::GPIOB,
        2 => crate::pac::GPIOC,
        5 => crate::pac::GPIOF,
        _ => {
            #[cfg(feature = "dont-panic")]
            {
                cortex_m::asm::udf();
            }
            #[cfg(not(feature = "dont-panic"))]
            {
                panic!("invalid GPIO block number {n}");
            }
        }
    }
}

embassy_hal_internal::interrupt_mod!(
    WWDG,
    PVD,
    RTC,
    FLASH,
    RCC,
    EXTI0_1,
    EXTI2_3,
    EXTI4_15,
    DMA_CH1,
    DMA_CH2_3,
    DMA_CH4_5,
    ADC,
    TIM1_BRK_UP_TRG_COM,
    TIM1_CC,
    TIM2,
    TIM3,
    TIM6,
    TIM14,
    TIM15,
    TIM16,
    TIM17,
    I2C1,
    I2C2,
    SPI1,
    SPI2,
    UART1,
    UART2,
    UART3,
    TSEN,
    DVSQ,
);