hdmi-hal
Hardware abstraction traits for the HDMI stack.
hdmi-hal defines the behavioral contracts between protocol logic and hardware. It is a
traits-only crate: no implementations live here. Every trait expresses an I/O boundary
that multiple crates in the stack need to cross in a compatible way — raw SCDC register
access over DDC/I²C, and HDMI 2.1 transmitter PHY control (what FRL link training needs:
rate, training patterns, output mode, scrambling and TxFFE levels). Further PHY
configuration is on the roadmap.
Usage
Implement a trait against your hardware backend:
use ScdcTransport;
Accept a trait bound in consumer code:
use ScdcTransport;
For a complete worked example of both traits with a simulated backend, see
examples/simulate.
Stack position
hdmi-hal sits between the platform backends and the protocol logic crates. It has no
dependency on the rest of the stack; protocol crates depend on it, not the reverse.
flowchart LR
dt["display-types"]
hal["hdmi-hal"]
culvert["culvert"]
plumbob["plumbob"]
be["platform backends (e.g. hdmi-hal-i2c-dev)"]
dt --> hal
hal --> culvert
hal --> plumbob
hal --> be
Async variants of both traits live in the companion crate hdmi-hal-async, following
the same split as embedded-hal / embedded-hal-async.
Out of scope
- Protocol logic — SCDC register semantics, typed register wrappers, and the FRL
link training state machine belong in the crates that consume
ScdcTransport. - Implementations — concrete platform backends (kernel I²C drivers, simulator harnesses, test doubles) live in the crates that use these traits.
- PHY vendor backends — hardware-specific register sequences belong in platform
crates that implement
HdmiPhy. - CEC or eARC protocol logic — only the wire-access primitive will belong here; protocol state machines are in their own crates.
Documentation
doc/architecture.md— trait surfaces, design principles, async story, and stack positiondoc/roadmap.md— planned features and future work
Verifying releases
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License
Licensed under the Mozilla Public License 2.0.