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hd44780_driver/bus/
fourbit.rs

1use embedded_hal::blocking::delay::{DelayMs, DelayUs};
2use embedded_hal::digital::v2::OutputPin;
3
4use crate::bus::DataBus;
5use crate::error::{Error, Result};
6
7pub struct FourBitBus<
8    RS: OutputPin,
9    EN: OutputPin,
10    D4: OutputPin,
11    D5: OutputPin,
12    D6: OutputPin,
13    D7: OutputPin,
14> {
15    rs: RS,
16    en: EN,
17    d4: D4,
18    d5: D5,
19    d6: D6,
20    d7: D7,
21}
22
23impl<RS: OutputPin, EN: OutputPin, D4: OutputPin, D5: OutputPin, D6: OutputPin, D7: OutputPin>
24    FourBitBus<RS, EN, D4, D5, D6, D7>
25{
26    pub fn from_pins(
27        rs: RS,
28        en: EN,
29        d4: D4,
30        d5: D5,
31        d6: D6,
32        d7: D7,
33    ) -> FourBitBus<RS, EN, D4, D5, D6, D7> {
34        FourBitBus {
35            rs,
36            en,
37            d4,
38            d5,
39            d6,
40            d7,
41        }
42    }
43
44    fn write_lower_nibble(&mut self, data: u8) -> Result<()> {
45        let db0: bool = (0b0000_0001 & data) != 0;
46        let db1: bool = (0b0000_0010 & data) != 0;
47        let db2: bool = (0b0000_0100 & data) != 0;
48        let db3: bool = (0b0000_1000 & data) != 0;
49
50        if db0 {
51            self.d4.set_high().map_err(|_| Error)?;
52        } else {
53            self.d4.set_low().map_err(|_| Error)?;
54        }
55
56        if db1 {
57            self.d5.set_high().map_err(|_| Error)?;
58        } else {
59            self.d5.set_low().map_err(|_| Error)?;
60        }
61
62        if db2 {
63            self.d6.set_high().map_err(|_| Error)?;
64        } else {
65            self.d6.set_low().map_err(|_| Error)?;
66        }
67
68        if db3 {
69            self.d7.set_high().map_err(|_| Error)?;
70        } else {
71            self.d7.set_low().map_err(|_| Error)?;
72        }
73
74        Ok(())
75    }
76
77    fn write_upper_nibble(&mut self, data: u8) -> Result<()> {
78        let db4: bool = (0b0001_0000 & data) != 0;
79        let db5: bool = (0b0010_0000 & data) != 0;
80        let db6: bool = (0b0100_0000 & data) != 0;
81        let db7: bool = (0b1000_0000 & data) != 0;
82
83        if db4 {
84            self.d4.set_high().map_err(|_| Error)?;
85        } else {
86            self.d4.set_low().map_err(|_| Error)?;
87        }
88
89        if db5 {
90            self.d5.set_high().map_err(|_| Error)?;
91        } else {
92            self.d5.set_low().map_err(|_| Error)?;
93        }
94
95        if db6 {
96            self.d6.set_high().map_err(|_| Error)?;
97        } else {
98            self.d6.set_low().map_err(|_| Error)?;
99        }
100
101        if db7 {
102            self.d7.set_high().map_err(|_| Error)?;
103        } else {
104            self.d7.set_low().map_err(|_| Error)?;
105        }
106        Ok(())
107    }
108}
109
110impl<RS: OutputPin, EN: OutputPin, D4: OutputPin, D5: OutputPin, D6: OutputPin, D7: OutputPin>
111    DataBus for FourBitBus<RS, EN, D4, D5, D6, D7>
112{
113    fn write<D: DelayUs<u16> + DelayMs<u8>>(
114        &mut self,
115        byte: u8,
116        data: bool,
117        delay: &mut D,
118    ) -> Result<()> {
119        if data {
120            self.rs.set_high().map_err(|_| Error)?;
121        } else {
122            self.rs.set_low().map_err(|_| Error)?;
123        }
124
125        self.write_upper_nibble(byte)?;
126
127        // Pulse the enable pin to recieve the upper nibble
128        self.en.set_high().map_err(|_| Error)?;
129        delay.delay_ms(2u8);
130        self.en.set_low().map_err(|_| Error)?;
131
132        self.write_lower_nibble(byte)?;
133
134        // Pulse the enable pin to recieve the lower nibble
135        self.en.set_high().map_err(|_| Error)?;
136        delay.delay_ms(2u8);
137        self.en.set_low().map_err(|_| Error)?;
138
139        if data {
140            self.rs.set_low().map_err(|_| Error)?;
141        }
142        Ok(())
143    }
144}