pub const en_functional_state_t_DISABLE: en_functional_state_t = 0;
pub const en_functional_state_t_ENABLE: en_functional_state_t = 1;
#[doc = " @brief Functional state"]
pub type en_functional_state_t = ::core::ffi::c_uint;
pub const en_int_src_t_INT_SRC_SWI_IRQ0: en_int_src_t = 0;
pub const en_int_src_t_INT_SRC_SWI_IRQ1: en_int_src_t = 1;
pub const en_int_src_t_INT_SRC_SWI_IRQ2: en_int_src_t = 2;
pub const en_int_src_t_INT_SRC_SWI_IRQ3: en_int_src_t = 3;
pub const en_int_src_t_INT_SRC_SWI_IRQ4: en_int_src_t = 4;
pub const en_int_src_t_INT_SRC_SWI_IRQ5: en_int_src_t = 5;
pub const en_int_src_t_INT_SRC_SWI_IRQ6: en_int_src_t = 6;
pub const en_int_src_t_INT_SRC_SWI_IRQ7: en_int_src_t = 7;
pub const en_int_src_t_INT_SRC_SWI_IRQ8: en_int_src_t = 8;
pub const en_int_src_t_INT_SRC_SWI_IRQ9: en_int_src_t = 9;
pub const en_int_src_t_INT_SRC_SWI_IRQ10: en_int_src_t = 10;
pub const en_int_src_t_INT_SRC_SWI_IRQ11: en_int_src_t = 11;
pub const en_int_src_t_INT_SRC_SWI_IRQ12: en_int_src_t = 12;
pub const en_int_src_t_INT_SRC_SWI_IRQ13: en_int_src_t = 13;
pub const en_int_src_t_INT_SRC_SWI_IRQ14: en_int_src_t = 14;
pub const en_int_src_t_INT_SRC_SWI_IRQ15: en_int_src_t = 15;
pub const en_int_src_t_INT_SRC_SWI_IRQ16: en_int_src_t = 16;
pub const en_int_src_t_INT_SRC_SWI_IRQ17: en_int_src_t = 17;
pub const en_int_src_t_INT_SRC_SWI_IRQ18: en_int_src_t = 18;
pub const en_int_src_t_INT_SRC_SWI_IRQ19: en_int_src_t = 19;
pub const en_int_src_t_INT_SRC_SWI_IRQ20: en_int_src_t = 20;
pub const en_int_src_t_INT_SRC_SWI_IRQ21: en_int_src_t = 21;
pub const en_int_src_t_INT_SRC_SWI_IRQ22: en_int_src_t = 22;
pub const en_int_src_t_INT_SRC_SWI_IRQ23: en_int_src_t = 23;
pub const en_int_src_t_INT_SRC_SWI_IRQ24: en_int_src_t = 24;
pub const en_int_src_t_INT_SRC_SWI_IRQ25: en_int_src_t = 25;
pub const en_int_src_t_INT_SRC_SWI_IRQ26: en_int_src_t = 26;
pub const en_int_src_t_INT_SRC_SWI_IRQ27: en_int_src_t = 27;
pub const en_int_src_t_INT_SRC_SWI_IRQ28: en_int_src_t = 28;
pub const en_int_src_t_INT_SRC_SWI_IRQ29: en_int_src_t = 29;
pub const en_int_src_t_INT_SRC_SWI_IRQ30: en_int_src_t = 30;
pub const en_int_src_t_INT_SRC_SWI_IRQ31: en_int_src_t = 31;
pub const en_int_src_t_INT_SRC_PORT_EIRQ0: en_int_src_t = 0;
pub const en_int_src_t_INT_SRC_PORT_EIRQ1: en_int_src_t = 1;
pub const en_int_src_t_INT_SRC_PORT_EIRQ2: en_int_src_t = 2;
pub const en_int_src_t_INT_SRC_PORT_EIRQ3: en_int_src_t = 3;
pub const en_int_src_t_INT_SRC_PORT_EIRQ4: en_int_src_t = 4;
pub const en_int_src_t_INT_SRC_PORT_EIRQ5: en_int_src_t = 5;
pub const en_int_src_t_INT_SRC_PORT_EIRQ6: en_int_src_t = 6;
pub const en_int_src_t_INT_SRC_PORT_EIRQ7: en_int_src_t = 7;
pub const en_int_src_t_INT_SRC_PORT_EIRQ8: en_int_src_t = 8;
pub const en_int_src_t_INT_SRC_PORT_EIRQ9: en_int_src_t = 9;
pub const en_int_src_t_INT_SRC_PORT_EIRQ10: en_int_src_t = 10;
pub const en_int_src_t_INT_SRC_PORT_EIRQ11: en_int_src_t = 11;
pub const en_int_src_t_INT_SRC_PORT_EIRQ12: en_int_src_t = 12;
pub const en_int_src_t_INT_SRC_PORT_EIRQ13: en_int_src_t = 13;
pub const en_int_src_t_INT_SRC_PORT_EIRQ14: en_int_src_t = 14;
pub const en_int_src_t_INT_SRC_PORT_EIRQ15: en_int_src_t = 15;
pub const en_int_src_t_INT_SRC_DMA1_TC0: en_int_src_t = 32;
pub const en_int_src_t_INT_SRC_DMA1_TC1: en_int_src_t = 33;
pub const en_int_src_t_INT_SRC_DMA1_TC2: en_int_src_t = 34;
pub const en_int_src_t_INT_SRC_DMA1_TC3: en_int_src_t = 35;
pub const en_int_src_t_INT_SRC_DMA2_TC0: en_int_src_t = 36;
pub const en_int_src_t_INT_SRC_DMA2_TC1: en_int_src_t = 37;
pub const en_int_src_t_INT_SRC_DMA2_TC2: en_int_src_t = 38;
pub const en_int_src_t_INT_SRC_DMA2_TC3: en_int_src_t = 39;
pub const en_int_src_t_INT_SRC_DMA1_BTC0: en_int_src_t = 40;
pub const en_int_src_t_INT_SRC_DMA1_BTC1: en_int_src_t = 41;
pub const en_int_src_t_INT_SRC_DMA1_BTC2: en_int_src_t = 42;
pub const en_int_src_t_INT_SRC_DMA1_BTC3: en_int_src_t = 43;
pub const en_int_src_t_INT_SRC_DMA2_BTC0: en_int_src_t = 44;
pub const en_int_src_t_INT_SRC_DMA2_BTC1: en_int_src_t = 45;
pub const en_int_src_t_INT_SRC_DMA2_BTC2: en_int_src_t = 46;
pub const en_int_src_t_INT_SRC_DMA2_BTC3: en_int_src_t = 47;
pub const en_int_src_t_INT_SRC_DMA1_ERR: en_int_src_t = 48;
pub const en_int_src_t_INT_SRC_DMA2_ERR: en_int_src_t = 49;
pub const en_int_src_t_INT_SRC_EFM_PEERR: en_int_src_t = 50;
pub const en_int_src_t_INT_SRC_EFM_COLERR: en_int_src_t = 51;
pub const en_int_src_t_INT_SRC_EFM_OPTEND: en_int_src_t = 52;
pub const en_int_src_t_INT_SRC_QSPI_INTR: en_int_src_t = 54;
pub const en_int_src_t_INT_SRC_DCU1: en_int_src_t = 55;
pub const en_int_src_t_INT_SRC_DCU2: en_int_src_t = 56;
pub const en_int_src_t_INT_SRC_DCU3: en_int_src_t = 57;
pub const en_int_src_t_INT_SRC_DCU4: en_int_src_t = 58;
pub const en_int_src_t_INT_SRC_TMR0_1_CMP_A: en_int_src_t = 64;
pub const en_int_src_t_INT_SRC_TMR0_1_CMP_B: en_int_src_t = 65;
pub const en_int_src_t_INT_SRC_TMR0_2_CMP_A: en_int_src_t = 66;
pub const en_int_src_t_INT_SRC_TMR0_2_CMP_B: en_int_src_t = 67;
pub const en_int_src_t_INT_SRC_RTC_ALM: en_int_src_t = 81;
pub const en_int_src_t_INT_SRC_RTC_PRD: en_int_src_t = 82;
pub const en_int_src_t_INT_SRC_XTAL32_STOP: en_int_src_t = 84;
pub const en_int_src_t_INT_SRC_XTAL_STOP: en_int_src_t = 85;
pub const en_int_src_t_INT_SRC_WKTM_PRD: en_int_src_t = 86;
pub const en_int_src_t_INT_SRC_SWDT_REFUDF: en_int_src_t = 87;
pub const en_int_src_t_INT_SRC_TMR6_1_GCMP_A: en_int_src_t = 96;
pub const en_int_src_t_INT_SRC_TMR6_1_GCMP_B: en_int_src_t = 97;
pub const en_int_src_t_INT_SRC_TMR6_1_GCMP_C: en_int_src_t = 98;
pub const en_int_src_t_INT_SRC_TMR6_1_GCMP_D: en_int_src_t = 99;
pub const en_int_src_t_INT_SRC_TMR6_1_GCMP_E: en_int_src_t = 100;
pub const en_int_src_t_INT_SRC_TMR6_1_GCMP_F: en_int_src_t = 101;
pub const en_int_src_t_INT_SRC_TMR6_1_OVF: en_int_src_t = 102;
pub const en_int_src_t_INT_SRC_TMR6_1_UDF: en_int_src_t = 103;
pub const en_int_src_t_INT_SRC_TMR6_1_DTE: en_int_src_t = 104;
pub const en_int_src_t_INT_SRC_TMR6_1_SCMP_A: en_int_src_t = 107;
pub const en_int_src_t_INT_SRC_TMR6_1_SCMP_B: en_int_src_t = 108;
pub const en_int_src_t_INT_SRC_TMR6_2_GCMP_A: en_int_src_t = 112;
pub const en_int_src_t_INT_SRC_TMR6_2_GCMP_B: en_int_src_t = 113;
pub const en_int_src_t_INT_SRC_TMR6_2_GCMP_C: en_int_src_t = 114;
pub const en_int_src_t_INT_SRC_TMR6_2_GCMP_D: en_int_src_t = 115;
pub const en_int_src_t_INT_SRC_TMR6_2_GCMP_E: en_int_src_t = 116;
pub const en_int_src_t_INT_SRC_TMR6_2_GCMP_F: en_int_src_t = 117;
pub const en_int_src_t_INT_SRC_TMR6_2_OVF: en_int_src_t = 118;
pub const en_int_src_t_INT_SRC_TMR6_2_UDF: en_int_src_t = 119;
pub const en_int_src_t_INT_SRC_TMR6_2_DTE: en_int_src_t = 120;
pub const en_int_src_t_INT_SRC_TMR6_2_SCMP_A: en_int_src_t = 123;
pub const en_int_src_t_INT_SRC_TMR6_2_SCMP_B: en_int_src_t = 124;
pub const en_int_src_t_INT_SRC_TMR6_3_GCMP_A: en_int_src_t = 128;
pub const en_int_src_t_INT_SRC_TMR6_3_GCMP_B: en_int_src_t = 129;
pub const en_int_src_t_INT_SRC_TMR6_3_GCMP_C: en_int_src_t = 130;
pub const en_int_src_t_INT_SRC_TMR6_3_GCMP_D: en_int_src_t = 131;
pub const en_int_src_t_INT_SRC_TMR6_3_GCMP_E: en_int_src_t = 132;
pub const en_int_src_t_INT_SRC_TMR6_3_GCMP_F: en_int_src_t = 133;
pub const en_int_src_t_INT_SRC_TMR6_3_OVF: en_int_src_t = 134;
pub const en_int_src_t_INT_SRC_TMR6_3_UDF: en_int_src_t = 135;
pub const en_int_src_t_INT_SRC_TMR6_3_DTE: en_int_src_t = 136;
pub const en_int_src_t_INT_SRC_TMR6_3_SCMP_A: en_int_src_t = 139;
pub const en_int_src_t_INT_SRC_TMR6_3_SCMP_B: en_int_src_t = 140;
pub const en_int_src_t_INT_SRC_TMRA_1_OVF: en_int_src_t = 256;
pub const en_int_src_t_INT_SRC_TMRA_1_UDF: en_int_src_t = 257;
pub const en_int_src_t_INT_SRC_TMRA_1_CMP: en_int_src_t = 258;
pub const en_int_src_t_INT_SRC_TMRA_2_OVF: en_int_src_t = 259;
pub const en_int_src_t_INT_SRC_TMRA_2_UDF: en_int_src_t = 260;
pub const en_int_src_t_INT_SRC_TMRA_2_CMP: en_int_src_t = 261;
pub const en_int_src_t_INT_SRC_TMRA_3_OVF: en_int_src_t = 262;
pub const en_int_src_t_INT_SRC_TMRA_3_UDF: en_int_src_t = 263;
pub const en_int_src_t_INT_SRC_TMRA_3_CMP: en_int_src_t = 264;
pub const en_int_src_t_INT_SRC_TMRA_4_OVF: en_int_src_t = 265;
pub const en_int_src_t_INT_SRC_TMRA_4_UDF: en_int_src_t = 266;
pub const en_int_src_t_INT_SRC_TMRA_4_CMP: en_int_src_t = 267;
pub const en_int_src_t_INT_SRC_TMRA_5_OVF: en_int_src_t = 268;
pub const en_int_src_t_INT_SRC_TMRA_5_UDF: en_int_src_t = 269;
pub const en_int_src_t_INT_SRC_TMRA_5_CMP: en_int_src_t = 270;
pub const en_int_src_t_INT_SRC_TMRA_6_OVF: en_int_src_t = 272;
pub const en_int_src_t_INT_SRC_TMRA_6_UDF: en_int_src_t = 273;
pub const en_int_src_t_INT_SRC_TMRA_6_CMP: en_int_src_t = 274;
pub const en_int_src_t_INT_SRC_USBFS_GLB: en_int_src_t = 275;
pub const en_int_src_t_INT_SRC_USART1_EI: en_int_src_t = 278;
pub const en_int_src_t_INT_SRC_USART1_RI: en_int_src_t = 279;
pub const en_int_src_t_INT_SRC_USART1_TI: en_int_src_t = 280;
pub const en_int_src_t_INT_SRC_USART1_TCI: en_int_src_t = 281;
pub const en_int_src_t_INT_SRC_USART1_RTO: en_int_src_t = 282;
pub const en_int_src_t_INT_SRC_USART1_WUPI: en_int_src_t = 432;
pub const en_int_src_t_INT_SRC_USART2_EI: en_int_src_t = 283;
pub const en_int_src_t_INT_SRC_USART2_RI: en_int_src_t = 284;
pub const en_int_src_t_INT_SRC_USART2_TI: en_int_src_t = 285;
pub const en_int_src_t_INT_SRC_USART2_TCI: en_int_src_t = 286;
pub const en_int_src_t_INT_SRC_USART2_RTO: en_int_src_t = 287;
pub const en_int_src_t_INT_SRC_USART3_EI: en_int_src_t = 288;
pub const en_int_src_t_INT_SRC_USART3_RI: en_int_src_t = 289;
pub const en_int_src_t_INT_SRC_USART3_TI: en_int_src_t = 290;
pub const en_int_src_t_INT_SRC_USART3_TCI: en_int_src_t = 291;
pub const en_int_src_t_INT_SRC_USART3_RTO: en_int_src_t = 292;
pub const en_int_src_t_INT_SRC_USART4_EI: en_int_src_t = 293;
pub const en_int_src_t_INT_SRC_USART4_RI: en_int_src_t = 294;
pub const en_int_src_t_INT_SRC_USART4_TI: en_int_src_t = 295;
pub const en_int_src_t_INT_SRC_USART4_TCI: en_int_src_t = 296;
pub const en_int_src_t_INT_SRC_USART4_RTO: en_int_src_t = 297;
pub const en_int_src_t_INT_SRC_SPI1_SPRI: en_int_src_t = 299;
pub const en_int_src_t_INT_SRC_SPI1_SPTI: en_int_src_t = 300;
pub const en_int_src_t_INT_SRC_SPI1_SPII: en_int_src_t = 301;
pub const en_int_src_t_INT_SRC_SPI1_SPEI: en_int_src_t = 302;
pub const en_int_src_t_INT_SRC_SPI2_SPRI: en_int_src_t = 304;
pub const en_int_src_t_INT_SRC_SPI2_SPTI: en_int_src_t = 305;
pub const en_int_src_t_INT_SRC_SPI2_SPII: en_int_src_t = 306;
pub const en_int_src_t_INT_SRC_SPI2_SPEI: en_int_src_t = 307;
pub const en_int_src_t_INT_SRC_SPI3_SPRI: en_int_src_t = 309;
pub const en_int_src_t_INT_SRC_SPI3_SPTI: en_int_src_t = 310;
pub const en_int_src_t_INT_SRC_SPI3_SPII: en_int_src_t = 311;
pub const en_int_src_t_INT_SRC_SPI3_SPEI: en_int_src_t = 312;
pub const en_int_src_t_INT_SRC_SPI4_SPRI: en_int_src_t = 314;
pub const en_int_src_t_INT_SRC_SPI4_SPTI: en_int_src_t = 315;
pub const en_int_src_t_INT_SRC_SPI4_SPII: en_int_src_t = 316;
pub const en_int_src_t_INT_SRC_SPI4_SPEI: en_int_src_t = 317;
pub const en_int_src_t_INT_SRC_TMR4_1_GCMP_UH: en_int_src_t = 320;
pub const en_int_src_t_INT_SRC_TMR4_1_GCMP_UL: en_int_src_t = 321;
pub const en_int_src_t_INT_SRC_TMR4_1_GCMP_VH: en_int_src_t = 322;
pub const en_int_src_t_INT_SRC_TMR4_1_GCMP_VL: en_int_src_t = 323;
pub const en_int_src_t_INT_SRC_TMR4_1_GCMP_WH: en_int_src_t = 324;
pub const en_int_src_t_INT_SRC_TMR4_1_GCMP_WL: en_int_src_t = 325;
pub const en_int_src_t_INT_SRC_TMR4_1_OVF: en_int_src_t = 326;
pub const en_int_src_t_INT_SRC_TMR4_1_UDF: en_int_src_t = 327;
pub const en_int_src_t_INT_SRC_TMR4_1_RELOAD_U: en_int_src_t = 328;
pub const en_int_src_t_INT_SRC_TMR4_1_RELOAD_V: en_int_src_t = 329;
pub const en_int_src_t_INT_SRC_TMR4_1_RELOAD_W: en_int_src_t = 330;
pub const en_int_src_t_INT_SRC_TMR4_2_GCMP_UH: en_int_src_t = 336;
pub const en_int_src_t_INT_SRC_TMR4_2_GCMP_UL: en_int_src_t = 337;
pub const en_int_src_t_INT_SRC_TMR4_2_GCMP_VH: en_int_src_t = 338;
pub const en_int_src_t_INT_SRC_TMR4_2_GCMP_VL: en_int_src_t = 339;
pub const en_int_src_t_INT_SRC_TMR4_2_GCMP_WH: en_int_src_t = 340;
pub const en_int_src_t_INT_SRC_TMR4_2_GCMP_WL: en_int_src_t = 341;
pub const en_int_src_t_INT_SRC_TMR4_2_OVF: en_int_src_t = 342;
pub const en_int_src_t_INT_SRC_TMR4_2_UDF: en_int_src_t = 343;
pub const en_int_src_t_INT_SRC_TMR4_2_RELOAD_U: en_int_src_t = 344;
pub const en_int_src_t_INT_SRC_TMR4_2_RELOAD_V: en_int_src_t = 345;
pub const en_int_src_t_INT_SRC_TMR4_2_RELOAD_W: en_int_src_t = 346;
pub const en_int_src_t_INT_SRC_TMR4_3_GCMP_UH: en_int_src_t = 352;
pub const en_int_src_t_INT_SRC_TMR4_3_GCMP_UL: en_int_src_t = 353;
pub const en_int_src_t_INT_SRC_TMR4_3_GCMP_VH: en_int_src_t = 354;
pub const en_int_src_t_INT_SRC_TMR4_3_GCMP_VL: en_int_src_t = 355;
pub const en_int_src_t_INT_SRC_TMR4_3_GCMP_WH: en_int_src_t = 356;
pub const en_int_src_t_INT_SRC_TMR4_3_GCMP_WL: en_int_src_t = 357;
pub const en_int_src_t_INT_SRC_TMR4_3_OVF: en_int_src_t = 358;
pub const en_int_src_t_INT_SRC_TMR4_3_UDF: en_int_src_t = 359;
pub const en_int_src_t_INT_SRC_TMR4_3_RELOAD_U: en_int_src_t = 360;
pub const en_int_src_t_INT_SRC_TMR4_3_RELOAD_V: en_int_src_t = 361;
pub const en_int_src_t_INT_SRC_TMR4_3_RELOAD_W: en_int_src_t = 362;
pub const en_int_src_t_INT_SRC_EMB_GR0: en_int_src_t = 390;
pub const en_int_src_t_INT_SRC_EMB_GR1: en_int_src_t = 391;
pub const en_int_src_t_INT_SRC_EMB_GR2: en_int_src_t = 392;
pub const en_int_src_t_INT_SRC_EMB_GR3: en_int_src_t = 393;
pub const en_int_src_t_INT_SRC_EVENT_PORT1: en_int_src_t = 394;
pub const en_int_src_t_INT_SRC_EVENT_PORT2: en_int_src_t = 395;
pub const en_int_src_t_INT_SRC_EVENT_PORT3: en_int_src_t = 396;
pub const en_int_src_t_INT_SRC_EVENT_PORT4: en_int_src_t = 397;
pub const en_int_src_t_INT_SRC_I2S1_TXIRQOUT: en_int_src_t = 400;
pub const en_int_src_t_INT_SRC_I2S1_RXIRQOUT: en_int_src_t = 401;
pub const en_int_src_t_INT_SRC_I2S1_ERRIRQOUT: en_int_src_t = 402;
pub const en_int_src_t_INT_SRC_I2S2_TXIRQOUT: en_int_src_t = 403;
pub const en_int_src_t_INT_SRC_I2S2_RXIRQOUT: en_int_src_t = 404;
pub const en_int_src_t_INT_SRC_I2S2_ERRIRQOUT: en_int_src_t = 405;
pub const en_int_src_t_INT_SRC_I2S3_TXIRQOUT: en_int_src_t = 406;
pub const en_int_src_t_INT_SRC_I2S3_RXIRQOUT: en_int_src_t = 407;
pub const en_int_src_t_INT_SRC_I2S3_ERRIRQOUT: en_int_src_t = 408;
pub const en_int_src_t_INT_SRC_I2S4_TXIRQOUT: en_int_src_t = 409;
pub const en_int_src_t_INT_SRC_I2S4_RXIRQOUT: en_int_src_t = 410;
pub const en_int_src_t_INT_SRC_I2S4_ERRIRQOUT: en_int_src_t = 411;
pub const en_int_src_t_INT_SRC_CMP1: en_int_src_t = 416;
pub const en_int_src_t_INT_SRC_CMP2: en_int_src_t = 417;
pub const en_int_src_t_INT_SRC_CMP3: en_int_src_t = 418;
pub const en_int_src_t_INT_SRC_I2C1_RXI: en_int_src_t = 420;
pub const en_int_src_t_INT_SRC_I2C1_TXI: en_int_src_t = 421;
pub const en_int_src_t_INT_SRC_I2C1_TEI: en_int_src_t = 422;
pub const en_int_src_t_INT_SRC_I2C1_EEI: en_int_src_t = 423;
pub const en_int_src_t_INT_SRC_I2C2_RXI: en_int_src_t = 424;
pub const en_int_src_t_INT_SRC_I2C2_TXI: en_int_src_t = 425;
pub const en_int_src_t_INT_SRC_I2C2_TEI: en_int_src_t = 426;
pub const en_int_src_t_INT_SRC_I2C2_EEI: en_int_src_t = 427;
pub const en_int_src_t_INT_SRC_I2C3_RXI: en_int_src_t = 428;
pub const en_int_src_t_INT_SRC_I2C3_TXI: en_int_src_t = 429;
pub const en_int_src_t_INT_SRC_I2C3_TEI: en_int_src_t = 430;
pub const en_int_src_t_INT_SRC_I2C3_EEI: en_int_src_t = 431;
pub const en_int_src_t_INT_SRC_LVD1: en_int_src_t = 433;
pub const en_int_src_t_INT_SRC_LVD2: en_int_src_t = 434;
pub const en_int_src_t_INT_SRC_OTS: en_int_src_t = 435;
pub const en_int_src_t_INT_SRC_FCMFERRI: en_int_src_t = 436;
pub const en_int_src_t_INT_SRC_FCMMENDI: en_int_src_t = 437;
pub const en_int_src_t_INT_SRC_FCMCOVFI: en_int_src_t = 438;
pub const en_int_src_t_INT_SRC_WDT_REFUDF: en_int_src_t = 439;
pub const en_int_src_t_INT_SRC_ADC1_EOCA: en_int_src_t = 448;
pub const en_int_src_t_INT_SRC_ADC1_EOCB: en_int_src_t = 449;
pub const en_int_src_t_INT_SRC_ADC1_CHCMP: en_int_src_t = 450;
pub const en_int_src_t_INT_SRC_ADC1_SEQCMP: en_int_src_t = 451;
pub const en_int_src_t_INT_SRC_ADC2_EOCA: en_int_src_t = 452;
pub const en_int_src_t_INT_SRC_ADC2_EOCB: en_int_src_t = 453;
pub const en_int_src_t_INT_SRC_ADC2_CHCMP: en_int_src_t = 454;
pub const en_int_src_t_INT_SRC_ADC2_SEQCMP: en_int_src_t = 455;
pub const en_int_src_t_INT_SRC_TRNG_END: en_int_src_t = 456;
pub const en_int_src_t_INT_SRC_SDIOC1_SD: en_int_src_t = 482;
pub const en_int_src_t_INT_SRC_SDIOC2_SD: en_int_src_t = 485;
pub const en_int_src_t_INT_SRC_CAN_INT: en_int_src_t = 486;
pub const en_int_src_t_INT_SRC_MAX: en_int_src_t = 511;
#[doc = " \\brief Interrupt number enumeration"]
pub type en_int_src_t = ::core::ffi::c_uint;
unsafe extern "C" {
#[doc = "Global function prototypes (definition in C source)\n/\n/**\n @addtogroup Share_Interrupts_Global_Functions\n @{"]
pub fn INTC_ShareIrqCmd(enIntSrc: en_int_src_t, enNewState: en_functional_state_t) -> i32;
pub fn IRQ128_Handler();
pub fn IRQ129_Handler();
pub fn IRQ130_Handler();
pub fn IRQ131_Handler();
pub fn IRQ132_Handler();
pub fn IRQ136_Handler();
pub fn IRQ137_Handler();
pub fn IRQ138_Handler();
pub fn IRQ139_Handler();
pub fn IRQ140_Handler();
pub fn IRQ141_Handler();
pub fn IRQ142_Handler();
pub fn IRQ143_Handler();
pub fn EXTINT00_IrqHandler();
pub fn EXTINT01_IrqHandler();
pub fn EXTINT02_IrqHandler();
pub fn EXTINT03_IrqHandler();
pub fn EXTINT04_IrqHandler();
pub fn EXTINT05_IrqHandler();
pub fn EXTINT06_IrqHandler();
pub fn EXTINT07_IrqHandler();
pub fn EXTINT08_IrqHandler();
pub fn EXTINT09_IrqHandler();
pub fn EXTINT10_IrqHandler();
pub fn EXTINT11_IrqHandler();
pub fn EXTINT12_IrqHandler();
pub fn EXTINT13_IrqHandler();
pub fn EXTINT14_IrqHandler();
pub fn EXTINT15_IrqHandler();
pub fn DMA1_TC0_IrqHandler();
pub fn DMA1_TC1_IrqHandler();
pub fn DMA1_TC2_IrqHandler();
pub fn DMA1_TC3_IrqHandler();
pub fn DMA2_TC0_IrqHandler();
pub fn DMA2_TC1_IrqHandler();
pub fn DMA2_TC2_IrqHandler();
pub fn DMA2_TC3_IrqHandler();
pub fn DMA1_BTC0_IrqHandler();
pub fn DMA1_BTC1_IrqHandler();
pub fn DMA1_BTC2_IrqHandler();
pub fn DMA1_BTC3_IrqHandler();
pub fn DMA2_BTC0_IrqHandler();
pub fn DMA2_BTC1_IrqHandler();
pub fn DMA2_BTC2_IrqHandler();
pub fn DMA2_BTC3_IrqHandler();
pub fn DMA1_Error0_IrqHandler();
pub fn DMA1_Error1_IrqHandler();
pub fn DMA1_Error2_IrqHandler();
pub fn DMA1_Error3_IrqHandler();
pub fn DMA2_Error0_IrqHandler();
pub fn DMA2_Error1_IrqHandler();
pub fn DMA2_Error2_IrqHandler();
pub fn DMA2_Error3_IrqHandler();
pub fn EFM_ProgramEraseError_IrqHandler();
pub fn EFM_ColError_IrqHandler();
pub fn EFM_OpEnd_IrqHandler();
pub fn QSPI_Error_IrqHandler();
pub fn DCU1_IrqHandler();
pub fn DCU2_IrqHandler();
pub fn DCU3_IrqHandler();
pub fn DCU4_IrqHandler();
pub fn TMR0_1_CmpA_IrqHandler();
pub fn TMR0_1_CmpB_IrqHandler();
pub fn TMR0_2_CmpA_IrqHandler();
pub fn TMR0_2_CmpB_IrqHandler();
pub fn CLK_XtalStop_IrqHandler();
pub fn PWC_WakeupTimer_IrqHandler();
pub fn SWDT_IrqHandler();
pub fn WDT_IrqHandler();
pub fn TMR6_1_GCmpA_IrqHandler();
pub fn TMR6_1_GCmpB_IrqHandler();
pub fn TMR6_1_GCmpC_IrqHandler();
pub fn TMR6_1_GCmpD_IrqHandler();
pub fn TMR6_1_GCmpE_IrqHandler();
pub fn TMR6_1_GCmpF_IrqHandler();
pub fn TMR6_1_GOvf_IrqHandler();
pub fn TMR6_1_GUdf_IrqHandler();
pub fn TMR6_1_GDte_IrqHandler();
pub fn TMR6_1_SCmpA_IrqHandler();
pub fn TMR6_1_SCmpB_IrqHandler();
pub fn TMR6_2_GCmpA_IrqHandler();
pub fn TMR6_2_GCmpB_IrqHandler();
pub fn TMR6_2_GCmpC_IrqHandler();
pub fn TMR6_2_GCmpD_IrqHandler();
pub fn TMR6_2_GCmpE_IrqHandler();
pub fn TMR6_2_GCmpF_IrqHandler();
pub fn TMR6_2_GOvf_IrqHandler();
pub fn TMR6_2_GUdf_IrqHandler();
pub fn TMR6_2_GDte_IrqHandler();
pub fn TMR6_2_SCmpA_IrqHandler();
pub fn TMR6_2_SCmpB_IrqHandler();
pub fn TMR6_3_GCmpA_IrqHandler();
pub fn TMR6_3_GCmpB_IrqHandler();
pub fn TMR6_3_GCmpC_IrqHandler();
pub fn TMR6_3_GCmpD_IrqHandler();
pub fn TMR6_3_GCmpE_IrqHandler();
pub fn TMR6_3_GCmpF_IrqHandler();
pub fn TMR6_3_GOvf_IrqHandler();
pub fn TMR6_3_GUdf_IrqHandler();
pub fn TMR6_3_GDte_IrqHandler();
pub fn TMR6_3_SCmpA_IrqHandler();
pub fn TMR6_3_SCmpB_IrqHandler();
pub fn TMRA_1_Ovf_IrqHandler();
pub fn TMRA_1_Udf_IrqHandler();
pub fn TMRA_1_Cmp_IrqHandler();
pub fn TMRA_2_Ovf_IrqHandler();
pub fn TMRA_2_Udf_IrqHandler();
pub fn TMRA_2_Cmp_IrqHandler();
pub fn TMRA_3_Ovf_IrqHandler();
pub fn TMRA_3_Udf_IrqHandler();
pub fn TMRA_3_Cmp_IrqHandler();
pub fn TMRA_4_Ovf_IrqHandler();
pub fn TMRA_4_Udf_IrqHandler();
pub fn TMRA_4_Cmp_IrqHandler();
pub fn TMRA_5_Ovf_IrqHandler();
pub fn TMRA_5_Udf_IrqHandler();
pub fn TMRA_5_Cmp_IrqHandler();
pub fn TMRA_6_Ovf_IrqHandler();
pub fn TMRA_6_Udf_IrqHandler();
pub fn TMRA_6_Cmp_IrqHandler();
pub fn USBFS_Global_IrqHandler();
pub fn USART1_RxError_IrqHandler();
pub fn USART1_RxFull_IrqHandler();
pub fn USART1_TxEmpty_IrqHandler();
pub fn USART1_TxComplete_IrqHandler();
pub fn USART1_RxTO_IrqHandler();
pub fn USART2_RxError_IrqHandler();
pub fn USART2_RxFull_IrqHandler();
pub fn USART2_TxEmpty_IrqHandler();
pub fn USART2_TxComplete_IrqHandler();
pub fn USART2_RxTO_IrqHandler();
pub fn USART3_RxError_IrqHandler();
pub fn USART3_RxFull_IrqHandler();
pub fn USART3_TxEmpty_IrqHandler();
pub fn USART3_TxComplete_IrqHandler();
pub fn USART3_RxTO_IrqHandler();
pub fn USART4_RxError_IrqHandler();
pub fn USART4_RxFull_IrqHandler();
pub fn USART4_TxEmpty_IrqHandler();
pub fn USART4_TxComplete_IrqHandler();
pub fn USART4_RxTO_IrqHandler();
pub fn SPI1_RxFull_IrqHandler();
pub fn SPI1_TxEmpty_IrqHandler();
pub fn SPI1_Error_IrqHandler();
pub fn SPI1_Idle_IrqHandler();
pub fn SPI2_RxFull_IrqHandler();
pub fn SPI2_TxEmpty_IrqHandler();
pub fn SPI2_Error_IrqHandler();
pub fn SPI2_Idle_IrqHandler();
pub fn SPI3_RxFull_IrqHandler();
pub fn SPI3_TxEmpty_IrqHandler();
pub fn SPI3_Error_IrqHandler();
pub fn SPI3_Idle_IrqHandler();
pub fn SPI4_RxFull_IrqHandler();
pub fn SPI4_TxEmpty_IrqHandler();
pub fn SPI4_Error_IrqHandler();
pub fn SPI4_Idle_IrqHandler();
pub fn TMR4_1_GCmpUH_IrqHandler();
pub fn TMR4_1_GCmpUL_IrqHandler();
pub fn TMR4_1_GCmpVH_IrqHandler();
pub fn TMR4_1_GCmpVL_IrqHandler();
pub fn TMR4_1_GCmpWH_IrqHandler();
pub fn TMR4_1_GCmpWL_IrqHandler();
pub fn TMR4_1_GOvf_IrqHandler();
pub fn TMR4_1_GUdf_IrqHandler();
pub fn TMR4_1_ReloadU_IrqHandler();
pub fn TMR4_1_ReloadV_IrqHandler();
pub fn TMR4_1_ReloadW_IrqHandler();
pub fn TMR4_2_GCmpUH_IrqHandler();
pub fn TMR4_2_GCmpUL_IrqHandler();
pub fn TMR4_2_GCmpVH_IrqHandler();
pub fn TMR4_2_GCmpVL_IrqHandler();
pub fn TMR4_2_GCmpWH_IrqHandler();
pub fn TMR4_2_GCmpWL_IrqHandler();
pub fn TMR4_2_GOvf_IrqHandler();
pub fn TMR4_2_GUdf_IrqHandler();
pub fn TMR4_2_ReloadU_IrqHandler();
pub fn TMR4_2_ReloadV_IrqHandler();
pub fn TMR4_2_ReloadW_IrqHandler();
pub fn TMR4_3_GCmpUH_IrqHandler();
pub fn TMR4_3_GCmpUL_IrqHandler();
pub fn TMR4_3_GCmpVH_IrqHandler();
pub fn TMR4_3_GCmpVL_IrqHandler();
pub fn TMR4_3_GCmpWH_IrqHandler();
pub fn TMR4_3_GCmpWL_IrqHandler();
pub fn TMR4_3_GOvf_IrqHandler();
pub fn TMR4_3_GUdf_IrqHandler();
pub fn TMR4_3_ReloadU_IrqHandler();
pub fn TMR4_3_ReloadV_IrqHandler();
pub fn TMR4_3_ReloadW_IrqHandler();
pub fn EMB_GR0_IrqHandler();
pub fn EMB_GR1_IrqHandler();
pub fn EMB_GR2_IrqHandler();
pub fn EMB_GR3_IrqHandler();
pub fn I2S1_Tx_IrqHandler();
pub fn I2S1_Rx_IrqHandler();
pub fn I2S1_Error_IrqHandler();
pub fn I2S2_Tx_IrqHandler();
pub fn I2S2_Rx_IrqHandler();
pub fn I2S2_Error_IrqHandler();
pub fn I2S3_Tx_IrqHandler();
pub fn I2S3_Rx_IrqHandler();
pub fn I2S3_Error_IrqHandler();
pub fn I2S4_Tx_IrqHandler();
pub fn I2S4_Rx_IrqHandler();
pub fn I2S4_Error_IrqHandler();
pub fn I2C1_RxFull_IrqHandler();
pub fn I2C1_TxComplete_IrqHandler();
pub fn I2C1_TxEmpty_IrqHandler();
pub fn I2C1_EE_IrqHandler();
pub fn I2C2_RxFull_IrqHandler();
pub fn I2C2_TxComplete_IrqHandler();
pub fn I2C2_TxEmpty_IrqHandler();
pub fn I2C2_EE_IrqHandler();
pub fn I2C3_RxFull_IrqHandler();
pub fn I2C3_TxComplete_IrqHandler();
pub fn I2C3_TxEmpty_IrqHandler();
pub fn I2C3_EE_IrqHandler();
pub fn PWC_LVD1_IrqHandler();
pub fn PWC_LVD2_IrqHandler();
pub fn FCM_Error_IrqHandler();
pub fn FCM_End_IrqHandler();
pub fn FCM_Ovf_IrqHandler();
pub fn ADC1_SeqA_IrqHandler();
pub fn ADC1_SeqB_IrqHandler();
pub fn ADC1_ChCmp_IrqHandler();
pub fn ADC1_SeqCmp_IrqHandler();
pub fn ADC2_SeqA_IrqHandler();
pub fn ADC2_SeqB_IrqHandler();
pub fn ADC2_ChCmp_IrqHandler();
pub fn ADC2_SeqCmp_IrqHandler();
pub fn SDIOC1_IrqHandler();
pub fn SDIOC2_IrqHandler();
pub fn CAN_IrqHandler();
}