pub enum ValidationError {
Show 53 variants
VectorSizeNotMultiple,
InstructionZeroLatency,
MemoryControllerZeroLatency,
MemoryControllerTooHighPortWidth,
CacheIdDuplication,
CacheCircularMemoryPath(Vec<usize>),
CacheTooLargeSize(usize),
CacheLineSizeLargerThanDataSize(usize),
CacheTooHighAssociativity(usize),
CacheZeroLatency(usize),
CacheZeroLineBufferSize(usize),
CacheZeroMaxOutstandingMisses(usize),
CacheTooHighBandwidth(usize),
CacheHigherBandwidthThanLineSize(usize),
CacheProviderIdNotFound(usize, usize),
FetchConnectionIdNotFound(usize),
FetchTooLittleBandwidth(MemoryConnection, usize),
FetchInvalidPrimaryPredictor(Vec<BranchPredictionError>),
FetchInvalidSecondaryPredictor(Vec<BranchPredictionError>),
FetchSecondaryPredictorZeroLatency,
DecoderZeroWidth,
DecoderZeroLatency,
ReorderBufferZeroSize,
ReorderBufferOutOfBoundsWidth,
ReorderBufferOutOfBoundsBranchWidth,
RegisterFileTooLowGeneralPurposeRegisters,
RegisterFileTooLowVectorRegisters,
SchedulerIdDuplication,
SchedulerZeroEntries(usize),
PipelineIdDuplication,
PipelineSchedulerIdNotFound(usize, usize),
PipelineNoFunction(usize),
PipelineNoType(usize),
PipelineMissingGeneralPurposeIntegerAdd,
PipelineMissingGeneralPurposeIntegerMultiply,
PipelineMissingGeneralPurposeIntegerDivide,
PipelineMissingGeneralPurposeIntegerShift,
PipelineMissingGeneralPurposeBranch,
PipelineMissingGeneralPurposeLoad,
PipelineMissingGeneralPurposeStore,
PipelineMissingFloatAdd,
PipelineMissingFloatMultiply,
PipelineMissingFloatDivide,
PipelineMissingVectorIntegerAdd,
PipelineMissingVectorIntegerMultiply,
PipelineMissingVectorIntegerDivide,
PipelineMissingVectorIntegerShift,
PipelineMissingVectorBranch,
PipelineMissingVectorLoad,
PipelineMissingVectorStore,
LoadStoreUnitZeroLoadEntries,
LoadStoreUnitZeroStoreEntries,
LoadStoreUnitConnectionIdNotFound(usize),
}Expand description
An individual error of a model that was found during validation.
Variants§
VectorSizeNotMultiple
The vector size is no multiple of 128 bits.
InstructionZeroLatency
An instruction type as a ALU latency of zero clocks, which isn’t allowed.
MemoryControllerZeroLatency
The memory controller must have a latency of at least one clock cycle for synchronisation reasons.
MemoryControllerTooHighPortWidth
The memory controller has excessive bandwidth, most likely because it wasn’t put in as power-of-two.
CacheIdDuplication
At least two caches have the same ID, making correctly connecting them impossible.
CacheCircularMemoryPath(Vec<usize>)
Contains IDs to caches that create a loop, which doesn’t ever resolve to the memory controller, thus making the caches useless.
CacheTooLargeSize(usize)
Excessive cache size, most probably because it wasn’t put in as power-of-two. Contains ID of the offending cache.
CacheLineSizeLargerThanDataSize(usize)
The line size is larger than the entire cache, which isn’t possible. Contains ID of the offending cache.
CacheTooHighAssociativity(usize)
There would have to be more entries in a set than there are in the entire cache, which isn’t possible. Contains ID of the offending cache.
CacheZeroLatency(usize)
The cache must have a latency of at least one clock cycle for synchronisation reasons. Contains ID of the offending cache.
CacheZeroLineBufferSize(usize)
The cache needs as least one entry in the line buffer, else no lines can be requested from the next layer. Contains ID of the offending cache.
CacheZeroMaxOutstandingMisses(usize)
The cache needs to allow at least one miss to be in transit, else it freezes on the first miss. Contains ID of the offending cache.
CacheTooHighBandwidth(usize)
Excessive cache bandwidth, most probably because it wasn’t put in as power-of-two. Contains ID of the offending cache.
CacheHigherBandwidthThanLineSize(usize)
The bandwidth (and by extension, potentially the fetch request size) is higher than the line size, so a request could touch more than two cache lines.
CacheProviderIdNotFound(usize, usize)
Cache connects to another cache that doesn’t exist. Contains ID of the offending cache and non-existing ID.
FetchConnectionIdNotFound(usize)
The fetch unit receives its data from a cache that doesn’t exist. Contains cache ID.
FetchTooLittleBandwidth(MemoryConnection, usize)
The fetch unit isn’t provided enough bandwidth to load the longest supported instruction in a maximum of two requests. Contains minimum bandwidth.
FetchInvalidPrimaryPredictor(Vec<BranchPredictionError>)
The primary predictor has an invalid configuration. Contains occurred errors.
FetchInvalidSecondaryPredictor(Vec<BranchPredictionError>)
The secondary predictor has an invalid configuration. Contains occurred errors.
FetchSecondaryPredictorZeroLatency
The secondary predictor applies its prediction immediately, which isn’t allowed.
DecoderZeroWidth
The decoder can’t output any instructions.
DecoderZeroLatency
The decoder must have its own pipeline stage and as such, does need to take at least one clock cycle.
ReorderBufferZeroSize
The reorder buffer can’t hold any instructions, thus none can be processed.
ReorderBufferOutOfBoundsWidth
The reorder buffer must be able to retire at least one instruction per clock, but can’t retire more instructions than can be in-flight at a time.
ReorderBufferOutOfBoundsBranchWidth
The reorder buffer must be able to retire at least one branch per clock, but can’t retire more branches than instructions.
RegisterFileTooLowGeneralPurposeRegisters
The register file holds less general purpose registers than required by the instruction set architecture.
RegisterFileTooLowVectorRegisters
The register file holds less vector registers than required by the instruction set architecture.
SchedulerIdDuplication
At least two schedulers have the same ID, making correctly connecting them impossible.
SchedulerZeroEntries(usize)
The scheduler can’t hold entries and thus also don’t dispatch any. Contains ID of the offending scheduler.
PipelineIdDuplication
At least two pipelines have the same ID, which isn’t allowed.
PipelineSchedulerIdNotFound(usize, usize)
The pipelines connects to a scheduler that doesn’t exist. Contains ID of the offending pipeline and non-existing scheduler ID.
PipelineNoFunction(usize)
The pipeline doesn’t have any instructions it can execute. Contains ID of the offending pipeline.
PipelineNoType(usize)
The pipeline can execute neither general purpose nor vector instruction, making it useless. Contains ID of the offending pipeline.
PipelineMissingGeneralPurposeIntegerAdd
There’s no pipeline capable of executing integer add instructions on general purpose registers.
PipelineMissingGeneralPurposeIntegerMultiply
There’s no pipeline capable of executing integer multiply instructions on general purpose registers.
PipelineMissingGeneralPurposeIntegerDivide
There’s no pipeline capable of executing integer divide instructions on general purpose registers.
PipelineMissingGeneralPurposeIntegerShift
There’s no pipeline capable of executing integer shift instructions on general purpose registers.
PipelineMissingGeneralPurposeBranch
There’s no pipeline capable of executing branch instructions on general purpose registers.
PipelineMissingGeneralPurposeLoad
There’s no pipeline capable of executing memory loads on general purpose registers.
PipelineMissingGeneralPurposeStore
There’s no pipeline capable of executing memory stores on general purpose registers.
PipelineMissingFloatAdd
There’s no pipeline capable of executing floating point add instructions, but it’s required by the instruction set.
PipelineMissingFloatMultiply
There’s no pipeline capable of executing floating point multiply instructions, but it’s required by the instruction set.
PipelineMissingFloatDivide
There’s no pipeline capable of executing floating point divide instructions, but it’s required by the instruction set.
PipelineMissingVectorIntegerAdd
There’s no pipeline capable of executing integer add instructions on vector registers, but it’s required by the instruction set.
PipelineMissingVectorIntegerMultiply
There’s no pipeline capable of executing integer multiply instructions on vector registers, but it’s required by the instruction set.
PipelineMissingVectorIntegerDivide
There’s no pipeline capable of executing integer divide instructions on vector registers, but it’s required by the instruction set.
PipelineMissingVectorIntegerShift
There’s no pipeline capable of executing integer shift instructions on vector registers, but it’s required by the instruction set.
PipelineMissingVectorBranch
There’s no pipeline capable of executing branch instructions on vector registers, but it’s required by the instruction set.
PipelineMissingVectorLoad
There’s no pipeline capable of executing memory loads on vector registers, but it’s required by the instruction set.
PipelineMissingVectorStore
There’s no pipeline capable of executing memory store on vector registers, but it’s required by the instruction set.
LoadStoreUnitZeroLoadEntries
The load-store-unit doesn’t have any load queue entries and thus can’t execute loads.
LoadStoreUnitZeroStoreEntries
The load-store-unit doesn’t have any store queue entries and thus can’t execute stores.
LoadStoreUnitConnectionIdNotFound(usize)
The load-store-unit connects to a cache that doesn’t exist. Contains non-existing cache ID.