use crate::pipeline::constants::OUTPUT_BUFFER_SIZE;
use std::num::NonZeroU64;
use wgpu::{
BindGroup, BindGroupDescriptor, BindGroupEntry, BindGroupLayoutDescriptor,
BindGroupLayoutEntry, BindingType, Buffer, BufferBindingType, CommandEncoder,
ComputePassDescriptor, ComputePipeline, ComputePipelineDescriptor, Device,
PipelineLayoutDescriptor, ShaderModuleDescriptor, ShaderSource, ShaderStages,
};
#[derive(Debug)]
pub struct OutputClear {
pipeline: ComputePipeline,
bind_group: BindGroup,
}
impl OutputClear {
pub fn new(device: &Device, output_buffer: &Buffer) -> Self {
let module = device.create_shader_module(ShaderModuleDescriptor {
label: Some("OutputClear shader"),
source: ShaderSource::Wgsl(include_str!("../shaders/output_clear.wgsl").into()),
});
let bind_group_layout = device.create_bind_group_layout(&BindGroupLayoutDescriptor {
label: Some("OutputClear bind group layout"),
entries: &[BindGroupLayoutEntry {
binding: 0,
visibility: ShaderStages::COMPUTE,
ty: BindingType::Buffer {
ty: BufferBindingType::Storage { read_only: false },
has_dynamic_offset: false,
min_binding_size: NonZeroU64::new(OUTPUT_BUFFER_SIZE),
},
count: None,
}],
});
let pipeline_layout = device.create_pipeline_layout(&PipelineLayoutDescriptor {
label: Some("OutputClear pipeline layout"),
bind_group_layouts: &[Some(&bind_group_layout)],
immediate_size: 0,
});
let pipeline = device.create_compute_pipeline(&ComputePipelineDescriptor {
cache: None,
label: Some("OutputClear pipeline"),
layout: Some(&pipeline_layout),
module: &module,
entry_point: Some("main"),
compilation_options: Default::default(),
});
let bind_group = device.create_bind_group(&BindGroupDescriptor {
label: Some("OutputClear bind group"),
layout: &bind_group_layout,
entries: &[BindGroupEntry {
binding: 0,
resource: output_buffer.as_entire_binding(),
}],
});
Self {
pipeline,
bind_group,
}
}
#[cfg_attr(feature = "profiling", profiling::function)]
pub fn run(&self, encoder: &mut CommandEncoder) {
let mut compute_pass = encoder.begin_compute_pass(&ComputePassDescriptor {
label: Some("OutputClear compute pass"),
timestamp_writes: None,
});
compute_pass.set_pipeline(&self.pipeline);
compute_pass.set_bind_group(0, &self.bind_group, &[]);
compute_pass.dispatch_workgroups(OUTPUT_BUFFER_SIZE as u32 / 4, 1, 1);
}
}