//! The CPU data model: flat per-LP topology, L3 domains, core kinds.
//!
//! Entry point: [`CpuInfo::detect()`]. The model is deliberately flat - one
//! [`Lp`] record per online logical processor, a first-class [`L3Domain`]
//! table (CCDs/clusters), and per-kind caches. Socket membership is a field on
//! each LP, not a container: per-socket hierarchies cannot represent chiplet
//! CPUs, where one socket carries several L3 domains.
pub use CacheInfo;
pub use CoreKind;
pub use CpuFeatures;
pub use CpuInfo;
pub use L2Domain;
pub use L3Domain;
pub use Lp;
pub use Vendor;