gd32vf103_pac/timer1/
swevg.rs

1#[doc = "Register `SWEVG` writer"]
2pub struct W(crate::W<SWEVG_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<SWEVG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<SWEVG_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<SWEVG_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `UPG` writer - Update generation"]
23pub type UPG_W<'a, const O: u8> = crate::BitWriter<'a, u16, SWEVG_SPEC, bool, O>;
24#[doc = "Field `CH0G` writer - Channel 0 capture or compare event generation"]
25pub type CH0G_W<'a, const O: u8> = crate::BitWriter<'a, u16, SWEVG_SPEC, bool, O>;
26#[doc = "Field `CH1G` writer - Channel 1 capture or compare event generation"]
27pub type CH1G_W<'a, const O: u8> = crate::BitWriter<'a, u16, SWEVG_SPEC, bool, O>;
28#[doc = "Field `CH2G` writer - Channel 2 capture or compare event generation"]
29pub type CH2G_W<'a, const O: u8> = crate::BitWriter<'a, u16, SWEVG_SPEC, bool, O>;
30#[doc = "Field `CH3G` writer - Channel 3 capture or compare event generation"]
31pub type CH3G_W<'a, const O: u8> = crate::BitWriter<'a, u16, SWEVG_SPEC, bool, O>;
32#[doc = "Field `TRGG` writer - Trigger event generation"]
33pub type TRGG_W<'a, const O: u8> = crate::BitWriter<'a, u16, SWEVG_SPEC, bool, O>;
34impl W {
35    #[doc = "Bit 0 - Update generation"]
36    #[inline(always)]
37    #[must_use]
38    pub fn upg(&mut self) -> UPG_W<0> {
39        UPG_W::new(self)
40    }
41    #[doc = "Bit 1 - Channel 0 capture or compare event generation"]
42    #[inline(always)]
43    #[must_use]
44    pub fn ch0g(&mut self) -> CH0G_W<1> {
45        CH0G_W::new(self)
46    }
47    #[doc = "Bit 2 - Channel 1 capture or compare event generation"]
48    #[inline(always)]
49    #[must_use]
50    pub fn ch1g(&mut self) -> CH1G_W<2> {
51        CH1G_W::new(self)
52    }
53    #[doc = "Bit 3 - Channel 2 capture or compare event generation"]
54    #[inline(always)]
55    #[must_use]
56    pub fn ch2g(&mut self) -> CH2G_W<3> {
57        CH2G_W::new(self)
58    }
59    #[doc = "Bit 4 - Channel 3 capture or compare event generation"]
60    #[inline(always)]
61    #[must_use]
62    pub fn ch3g(&mut self) -> CH3G_W<4> {
63        CH3G_W::new(self)
64    }
65    #[doc = "Bit 6 - Trigger event generation"]
66    #[inline(always)]
67    #[must_use]
68    pub fn trgg(&mut self) -> TRGG_W<6> {
69        TRGG_W::new(self)
70    }
71    #[doc = "Writes raw bits to the register."]
72    #[inline(always)]
73    pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
74        self.0.bits(bits);
75        self
76    }
77}
78#[doc = "event generation register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swevg](index.html) module"]
79pub struct SWEVG_SPEC;
80impl crate::RegisterSpec for SWEVG_SPEC {
81    type Ux = u16;
82}
83#[doc = "`write(|w| ..)` method takes [swevg::W](W) writer structure"]
84impl crate::Writable for SWEVG_SPEC {
85    type Writer = W;
86    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
87    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
88}
89#[doc = "`reset()` method sets SWEVG to value 0"]
90impl crate::Resettable for SWEVG_SPEC {
91    const RESET_VALUE: Self::Ux = 0;
92}
gd32vf103_pac/timer1/swevg.rs

gd32vf103_pac/timer1/
swevg.rs
