1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - Interrupt flag register"]
5 pub intf: INTF,
6 #[doc = "0x04 - Interrupt flag clear register"]
7 pub intc: INTC,
8 #[doc = "0x08 - Channel 0 control register"]
9 pub ch0ctl: CH0CTL,
10 #[doc = "0x0c - Channel 0 counter register"]
11 pub ch0cnt: CH0CNT,
12 #[doc = "0x10 - Channel 0 peripheral base address register"]
13 pub ch0paddr: CH0PADDR,
14 #[doc = "0x14 - Channel 0 memory base address register"]
15 pub ch0maddr: CH0MADDR,
16 _reserved6: [u8; 0x04],
17 #[doc = "0x1c - Channel 1 control register"]
18 pub ch1ctl: CH1CTL,
19 #[doc = "0x20 - Channel 1 counter register"]
20 pub ch1cnt: CH1CNT,
21 #[doc = "0x24 - Channel 1 peripheral base address register"]
22 pub ch1paddr: CH1PADDR,
23 #[doc = "0x28 - Channel 1 memory base address register"]
24 pub ch1maddr: CH1MADDR,
25 _reserved10: [u8; 0x04],
26 #[doc = "0x30 - Channel 2 control register"]
27 pub ch2ctl: CH2CTL,
28 #[doc = "0x34 - Channel 2 counter register"]
29 pub ch2cnt: CH2CNT,
30 #[doc = "0x38 - Channel 2 peripheral base address register"]
31 pub ch2paddr: CH2PADDR,
32 #[doc = "0x3c - Channel 2 memory base address register"]
33 pub ch2maddr: CH2MADDR,
34 _reserved14: [u8; 0x04],
35 #[doc = "0x44 - Channel 3 control register"]
36 pub ch3ctl: CH3CTL,
37 #[doc = "0x48 - Channel 3 counter register"]
38 pub ch3cnt: CH3CNT,
39 #[doc = "0x4c - Channel 3 peripheral base address register"]
40 pub ch3paddr: CH3PADDR,
41 #[doc = "0x50 - Channel 3 memory base address register"]
42 pub ch3maddr: CH3MADDR,
43 _reserved18: [u8; 0x04],
44 #[doc = "0x58 - Channel 4 control register"]
45 pub ch4ctl: CH4CTL,
46 #[doc = "0x5c - Channel 4 counter register"]
47 pub ch4cnt: CH4CNT,
48 #[doc = "0x60 - Channel 4 peripheral base address register"]
49 pub ch4paddr: CH4PADDR,
50 #[doc = "0x64 - Channel 4 memory base address register"]
51 pub ch4maddr: CH4MADDR,
52 _reserved22: [u8; 0x04],
53 #[doc = "0x6c - Channel 5 control register"]
54 pub ch5ctl: CH5CTL,
55 #[doc = "0x70 - Channel 5 counter register"]
56 pub ch5cnt: CH5CNT,
57 #[doc = "0x74 - Channel 5 peripheral base address register"]
58 pub ch5paddr: CH5PADDR,
59 #[doc = "0x78 - Channel 5 memory base address register"]
60 pub ch5maddr: CH5MADDR,
61 _reserved26: [u8; 0x04],
62 #[doc = "0x80 - Channel 6 control register"]
63 pub ch6ctl: CH6CTL,
64 #[doc = "0x84 - Channel 6 counter register"]
65 pub ch6cnt: CH6CNT,
66 #[doc = "0x88 - Channel 6 peripheral base address register"]
67 pub ch6paddr: CH6PADDR,
68 #[doc = "0x8c - Channel 6 memory base address register"]
69 pub ch6maddr: CH6MADDR,
70}
71#[doc = "INTF (r) register accessor: an alias for `Reg<INTF_SPEC>`"]
72pub type INTF = crate::Reg<intf::INTF_SPEC>;
73#[doc = "Interrupt flag register"]
74pub mod intf;
75#[doc = "INTC (w) register accessor: an alias for `Reg<INTC_SPEC>`"]
76pub type INTC = crate::Reg<intc::INTC_SPEC>;
77#[doc = "Interrupt flag clear register"]
78pub mod intc;
79#[doc = "CH0CTL (rw) register accessor: an alias for `Reg<CH0CTL_SPEC>`"]
80pub type CH0CTL = crate::Reg<ch0ctl::CH0CTL_SPEC>;
81#[doc = "Channel 0 control register"]
82pub mod ch0ctl;
83#[doc = "CH0CNT (rw) register accessor: an alias for `Reg<CH0CNT_SPEC>`"]
84pub type CH0CNT = crate::Reg<ch0cnt::CH0CNT_SPEC>;
85#[doc = "Channel 0 counter register"]
86pub mod ch0cnt;
87#[doc = "CH0PADDR (rw) register accessor: an alias for `Reg<CH0PADDR_SPEC>`"]
88pub type CH0PADDR = crate::Reg<ch0paddr::CH0PADDR_SPEC>;
89#[doc = "Channel 0 peripheral base address register"]
90pub mod ch0paddr;
91#[doc = "CH0MADDR (rw) register accessor: an alias for `Reg<CH0MADDR_SPEC>`"]
92pub type CH0MADDR = crate::Reg<ch0maddr::CH0MADDR_SPEC>;
93#[doc = "Channel 0 memory base address register"]
94pub mod ch0maddr;
95#[doc = "CH1CTL (rw) register accessor: an alias for `Reg<CH1CTL_SPEC>`"]
96pub type CH1CTL = crate::Reg<ch1ctl::CH1CTL_SPEC>;
97#[doc = "Channel 1 control register"]
98pub mod ch1ctl;
99#[doc = "CH1CNT (rw) register accessor: an alias for `Reg<CH1CNT_SPEC>`"]
100pub type CH1CNT = crate::Reg<ch1cnt::CH1CNT_SPEC>;
101#[doc = "Channel 1 counter register"]
102pub mod ch1cnt;
103#[doc = "CH1PADDR (rw) register accessor: an alias for `Reg<CH1PADDR_SPEC>`"]
104pub type CH1PADDR = crate::Reg<ch1paddr::CH1PADDR_SPEC>;
105#[doc = "Channel 1 peripheral base address register"]
106pub mod ch1paddr;
107#[doc = "CH1MADDR (rw) register accessor: an alias for `Reg<CH1MADDR_SPEC>`"]
108pub type CH1MADDR = crate::Reg<ch1maddr::CH1MADDR_SPEC>;
109#[doc = "Channel 1 memory base address register"]
110pub mod ch1maddr;
111#[doc = "CH2CTL (rw) register accessor: an alias for `Reg<CH2CTL_SPEC>`"]
112pub type CH2CTL = crate::Reg<ch2ctl::CH2CTL_SPEC>;
113#[doc = "Channel 2 control register"]
114pub mod ch2ctl;
115#[doc = "CH2CNT (rw) register accessor: an alias for `Reg<CH2CNT_SPEC>`"]
116pub type CH2CNT = crate::Reg<ch2cnt::CH2CNT_SPEC>;
117#[doc = "Channel 2 counter register"]
118pub mod ch2cnt;
119#[doc = "CH2PADDR (rw) register accessor: an alias for `Reg<CH2PADDR_SPEC>`"]
120pub type CH2PADDR = crate::Reg<ch2paddr::CH2PADDR_SPEC>;
121#[doc = "Channel 2 peripheral base address register"]
122pub mod ch2paddr;
123#[doc = "CH2MADDR (rw) register accessor: an alias for `Reg<CH2MADDR_SPEC>`"]
124pub type CH2MADDR = crate::Reg<ch2maddr::CH2MADDR_SPEC>;
125#[doc = "Channel 2 memory base address register"]
126pub mod ch2maddr;
127#[doc = "CH3CTL (rw) register accessor: an alias for `Reg<CH3CTL_SPEC>`"]
128pub type CH3CTL = crate::Reg<ch3ctl::CH3CTL_SPEC>;
129#[doc = "Channel 3 control register"]
130pub mod ch3ctl;
131#[doc = "CH3CNT (rw) register accessor: an alias for `Reg<CH3CNT_SPEC>`"]
132pub type CH3CNT = crate::Reg<ch3cnt::CH3CNT_SPEC>;
133#[doc = "Channel 3 counter register"]
134pub mod ch3cnt;
135#[doc = "CH3PADDR (rw) register accessor: an alias for `Reg<CH3PADDR_SPEC>`"]
136pub type CH3PADDR = crate::Reg<ch3paddr::CH3PADDR_SPEC>;
137#[doc = "Channel 3 peripheral base address register"]
138pub mod ch3paddr;
139#[doc = "CH3MADDR (rw) register accessor: an alias for `Reg<CH3MADDR_SPEC>`"]
140pub type CH3MADDR = crate::Reg<ch3maddr::CH3MADDR_SPEC>;
141#[doc = "Channel 3 memory base address register"]
142pub mod ch3maddr;
143#[doc = "CH4CTL (rw) register accessor: an alias for `Reg<CH4CTL_SPEC>`"]
144pub type CH4CTL = crate::Reg<ch4ctl::CH4CTL_SPEC>;
145#[doc = "Channel 4 control register"]
146pub mod ch4ctl;
147#[doc = "CH4CNT (rw) register accessor: an alias for `Reg<CH4CNT_SPEC>`"]
148pub type CH4CNT = crate::Reg<ch4cnt::CH4CNT_SPEC>;
149#[doc = "Channel 4 counter register"]
150pub mod ch4cnt;
151#[doc = "CH4PADDR (rw) register accessor: an alias for `Reg<CH4PADDR_SPEC>`"]
152pub type CH4PADDR = crate::Reg<ch4paddr::CH4PADDR_SPEC>;
153#[doc = "Channel 4 peripheral base address register"]
154pub mod ch4paddr;
155#[doc = "CH4MADDR (rw) register accessor: an alias for `Reg<CH4MADDR_SPEC>`"]
156pub type CH4MADDR = crate::Reg<ch4maddr::CH4MADDR_SPEC>;
157#[doc = "Channel 4 memory base address register"]
158pub mod ch4maddr;
159#[doc = "CH5CTL (rw) register accessor: an alias for `Reg<CH5CTL_SPEC>`"]
160pub type CH5CTL = crate::Reg<ch5ctl::CH5CTL_SPEC>;
161#[doc = "Channel 5 control register"]
162pub mod ch5ctl;
163#[doc = "CH5CNT (rw) register accessor: an alias for `Reg<CH5CNT_SPEC>`"]
164pub type CH5CNT = crate::Reg<ch5cnt::CH5CNT_SPEC>;
165#[doc = "Channel 5 counter register"]
166pub mod ch5cnt;
167#[doc = "CH5PADDR (rw) register accessor: an alias for `Reg<CH5PADDR_SPEC>`"]
168pub type CH5PADDR = crate::Reg<ch5paddr::CH5PADDR_SPEC>;
169#[doc = "Channel 5 peripheral base address register"]
170pub mod ch5paddr;
171#[doc = "CH5MADDR (rw) register accessor: an alias for `Reg<CH5MADDR_SPEC>`"]
172pub type CH5MADDR = crate::Reg<ch5maddr::CH5MADDR_SPEC>;
173#[doc = "Channel 5 memory base address register"]
174pub mod ch5maddr;
175#[doc = "CH6CTL (rw) register accessor: an alias for `Reg<CH6CTL_SPEC>`"]
176pub type CH6CTL = crate::Reg<ch6ctl::CH6CTL_SPEC>;
177#[doc = "Channel 6 control register"]
178pub mod ch6ctl;
179#[doc = "CH6CNT (rw) register accessor: an alias for `Reg<CH6CNT_SPEC>`"]
180pub type CH6CNT = crate::Reg<ch6cnt::CH6CNT_SPEC>;
181#[doc = "Channel 6 counter register"]
182pub mod ch6cnt;
183#[doc = "CH6PADDR (rw) register accessor: an alias for `Reg<CH6PADDR_SPEC>`"]
184pub type CH6PADDR = crate::Reg<ch6paddr::CH6PADDR_SPEC>;
185#[doc = "Channel 6 peripheral base address register"]
186pub mod ch6paddr;
187#[doc = "CH6MADDR (rw) register accessor: an alias for `Reg<CH6MADDR_SPEC>`"]
188pub type CH6MADDR = crate::Reg<ch6maddr::CH6MADDR_SPEC>;
189#[doc = "Channel 6 memory base address register"]
190pub mod ch6maddr;