#[doc = "Register `PCF3` reader"]
pub type R = crate::R<Pcf3Spec>;
#[doc = "Register `PCF3` writer"]
pub type W = crate::W<Pcf3Spec>;
#[doc = "Field `TLI_B5_PA3_REMAP` reader - TLI_B5_PA3 remapping"]
pub type TliB5Pa3RemapR = crate::BitReader;
#[doc = "Field `TLI_B5_PA3_REMAP` writer - TLI_B5_PA3 remapping"]
pub type TliB5Pa3RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_VSYNC_PA4_REMAP` reader - TLI_VSYNC_PA4 remapping"]
pub type TliVsyncPa4RemapR = crate::BitReader;
#[doc = "Field `TLI_VSYNC_PA4_REMAP` writer - TLI_VSYNC_PA4 remapping"]
pub type TliVsyncPa4RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G2_PA6_REMAP` reader - TLI_G2_PA6 remapping"]
pub type TliG2Pa6RemapR = crate::BitReader;
#[doc = "Field `TLI_G2_PA6_REMAP` writer - TLI_G2_PA6 remapping"]
pub type TliG2Pa6RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R6_PA8_REMAP` reader - TLI_R6_PA8 remapping"]
pub type TliR6Pa8RemapR = crate::BitReader;
#[doc = "Field `TLI_R6_PA8_REMAP` writer - TLI_R6_PA8 remapping"]
pub type TliR6Pa8RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R4_PA11_REMAP` reader - TLI_R4_PA11 remapping"]
pub type TliR4Pa11RemapR = crate::BitReader;
#[doc = "Field `TLI_R4_PA11_REMAP` writer - TLI_R4_PA11 remapping"]
pub type TliR4Pa11RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R5_PA12_REMAP` reader - TLI_R5_PA12 remapping"]
pub type TliR5Pa12RemapR = crate::BitReader;
#[doc = "Field `TLI_R5_PA12_REMAP` writer - TLI_R5_PA12 remapping"]
pub type TliR5Pa12RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R3_PB0_REMAP` reader - TLI_R3_PB0 remapping"]
pub type TliR3Pb0RemapR = crate::BitReader;
#[doc = "Field `TLI_R3_PB0_REMAP` writer - TLI_R3_PB0 remapping"]
pub type TliR3Pb0RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R6_PB1_REMAP` reader - TLI_R6_PB1 remapping"]
pub type TliR6Pb1RemapR = crate::BitReader;
#[doc = "Field `TLI_R6_PB1_REMAP` writer - TLI_R6_PB1 remapping"]
pub type TliR6Pb1RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_B6_PB8_REMAP` reader - TLI_B6_PB8 remapping"]
pub type TliB6Pb8RemapR = crate::BitReader;
#[doc = "Field `TLI_B6_PB8_REMAP` writer - TLI_B6_PB8 remapping"]
pub type TliB6Pb8RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_B7_PB9_REMAP` reader - TLI_B7_PB9 remapping"]
pub type TliB7Pb9RemapR = crate::BitReader;
#[doc = "Field `TLI_B7_PB9_REMAP` writer - TLI_B7_PB9 remapping"]
pub type TliB7Pb9RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G4_PB10_REMAP` reader - TLI_G4_PB10 remapping"]
pub type TliG4Pb10RemapR = crate::BitReader;
#[doc = "Field `TLI_G4_PB10_REMAP` writer - TLI_G4_PB10 remapping"]
pub type TliG4Pb10RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G5_PB11_REMAP` reader - TLI_G5_PB11 remapping"]
pub type TliG5Pb11RemapR = crate::BitReader;
#[doc = "Field `TLI_G5_PB11_REMAP` writer - TLI_G5_PB11 remapping"]
pub type TliG5Pb11RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_HSYNC_PC6_REMAP` reader - TLI_HSYNC_PC6 remapping"]
pub type TliHsyncPc6RemapR = crate::BitReader;
#[doc = "Field `TLI_HSYNC_PC6_REMAP` writer - TLI_HSYNC_PC6 remapping"]
pub type TliHsyncPc6RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G6_PC7_REMAP` reader - TLI_G6_PC7 remapping"]
pub type TliG6Pc7RemapR = crate::BitReader;
#[doc = "Field `TLI_G6_PC7_REMAP` writer - TLI_G6_PC7 remapping"]
pub type TliG6Pc7RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R2_PC10_REMAP` reader - TLI_R2_PC10 remapping"]
pub type TliR2Pc10RemapR = crate::BitReader;
#[doc = "Field `TLI_R2_PC10_REMAP` writer - TLI_R2_PC10 remapping"]
pub type TliR2Pc10RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G7_PD3_REMAP` reader - TLI_G7_PD3 remapping"]
pub type TliG7Pd3RemapR = crate::BitReader;
#[doc = "Field `TLI_G7_PD3_REMAP` writer - TLI_G7_PD3 remapping"]
pub type TliG7Pd3RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_B2_PD6_REMAP` reader - TLI_B2_PD6 remapping"]
pub type TliB2Pd6RemapR = crate::BitReader;
#[doc = "Field `TLI_B2_PD6_REMAP` writer - TLI_B2_PD6 remapping"]
pub type TliB2Pd6RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_B3_PD10_REMAP` reader - TLI_B3_PD10 remapping"]
pub type TliB3Pd10RemapR = crate::BitReader;
#[doc = "Field `TLI_B3_PD10_REMAP` writer - TLI_B3_PD10 remapping"]
pub type TliB3Pd10RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_B0_PE4_REMAP` reader - TLI_B0_PE4 remapping"]
pub type TliB0Pe4RemapR = crate::BitReader;
#[doc = "Field `TLI_B0_PE4_REMAP` writer - TLI_B0_PE4 remapping"]
pub type TliB0Pe4RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G0_PE5_REMAP` reader - TLI_G0_PE5 remapping"]
pub type TliG0Pe5RemapR = crate::BitReader;
#[doc = "Field `TLI_G0_PE5_REMAP` writer - TLI_G0_PE5 remapping"]
pub type TliG0Pe5RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G1_PE6_REMAP` reader - TLI_G1_PE6 remapping"]
pub type TliG1Pe6RemapR = crate::BitReader;
#[doc = "Field `TLI_G1_PE6_REMAP` writer - TLI_G1_PE6 remapping"]
pub type TliG1Pe6RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G3_PE11_REMAP` reader - TLI_G3_PE11 remapping"]
pub type TliG3Pe11RemapR = crate::BitReader;
#[doc = "Field `TLI_G3_PE11_REMAP` writer - TLI_G3_PE11 remapping"]
pub type TliG3Pe11RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_B4_PE12_REMAP` reader - TLI_B4_PE12 remapping"]
pub type TliB4Pe12RemapR = crate::BitReader;
#[doc = "Field `TLI_B4_PE12_REMAP` writer - TLI_B4_PE12 remapping"]
pub type TliB4Pe12RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_DE_PE13_REMAP` reader - TLI_DE_PE13 remapping"]
pub type TliDePe13RemapR = crate::BitReader;
#[doc = "Field `TLI_DE_PE13_REMAP` writer - TLI_DE_PE13 remapping"]
pub type TliDePe13RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_CLK_PE14_REMAP` reader - TLI_CLK_PE14 remapping"]
pub type TliClkPe14RemapR = crate::BitReader;
#[doc = "Field `TLI_CLK_PE14_REMAP` writer - TLI_CLK_PE14 remapping"]
pub type TliClkPe14RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R7_PE15_REMAP` reader - TLI_R7_PE15 remapping"]
pub type TliR7Pe15RemapR = crate::BitReader;
#[doc = "Field `TLI_R7_PE15_REMAP` writer - TLI_R7_PE15 remapping"]
pub type TliR7Pe15RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_DE_PF10_REMAP` reader - TLI_DE_PF10 remapping"]
pub type TliDePf10RemapR = crate::BitReader;
#[doc = "Field `TLI_DE_PF10_REMAP` writer - TLI_DE_PF10 remapping"]
pub type TliDePf10RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R7_PG6_REMAP` reader - TLI_R7_PG6 remapping"]
pub type TliR7Pg6RemapR = crate::BitReader;
#[doc = "Field `TLI_R7_PG6_REMAP` writer - TLI_R7_PG6 remapping"]
pub type TliR7Pg6RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_CLK_PG7_REMAP` reader - TLI_CLK_PG7 remapping"]
pub type TliClkPg7RemapR = crate::BitReader;
#[doc = "Field `TLI_CLK_PG7_REMAP` writer - TLI_CLK_PG7 remapping"]
pub type TliClkPg7RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G3_PG10_REMAP` reader - TLI_G3_PG10 remapping"]
pub type TliG3Pg10RemapR = crate::BitReader;
#[doc = "Field `TLI_G3_PG10_REMAP` writer - TLI_G3_PG10 remapping"]
pub type TliG3Pg10RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_B2_PG10_REMAP` reader - TLI_B2_PG10 remapping"]
pub type TliB2Pg10RemapR = crate::BitReader;
#[doc = "Field `TLI_B2_PG10_REMAP` writer - TLI_B2_PG10 remapping"]
pub type TliB2Pg10RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_B3_PG11_REMAP` reader - TLI_B3_PG11 remapping"]
pub type TliB3Pg11RemapR = crate::BitReader;
#[doc = "Field `TLI_B3_PG11_REMAP` writer - TLI_B3_PG11 remapping"]
pub type TliB3Pg11RemapW<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
#[doc = "Bit 0 - TLI_B5_PA3 remapping"]
#[inline(always)]
pub fn tli_b5_pa3_remap(&self) -> TliB5Pa3RemapR {
TliB5Pa3RemapR::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - TLI_VSYNC_PA4 remapping"]
#[inline(always)]
pub fn tli_vsync_pa4_remap(&self) -> TliVsyncPa4RemapR {
TliVsyncPa4RemapR::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - TLI_G2_PA6 remapping"]
#[inline(always)]
pub fn tli_g2_pa6_remap(&self) -> TliG2Pa6RemapR {
TliG2Pa6RemapR::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - TLI_R6_PA8 remapping"]
#[inline(always)]
pub fn tli_r6_pa8_remap(&self) -> TliR6Pa8RemapR {
TliR6Pa8RemapR::new(((self.bits >> 3) & 1) != 0)
}
#[doc = "Bit 4 - TLI_R4_PA11 remapping"]
#[inline(always)]
pub fn tli_r4_pa11_remap(&self) -> TliR4Pa11RemapR {
TliR4Pa11RemapR::new(((self.bits >> 4) & 1) != 0)
}
#[doc = "Bit 5 - TLI_R5_PA12 remapping"]
#[inline(always)]
pub fn tli_r5_pa12_remap(&self) -> TliR5Pa12RemapR {
TliR5Pa12RemapR::new(((self.bits >> 5) & 1) != 0)
}
#[doc = "Bit 6 - TLI_R3_PB0 remapping"]
#[inline(always)]
pub fn tli_r3_pb0_remap(&self) -> TliR3Pb0RemapR {
TliR3Pb0RemapR::new(((self.bits >> 6) & 1) != 0)
}
#[doc = "Bit 7 - TLI_R6_PB1 remapping"]
#[inline(always)]
pub fn tli_r6_pb1_remap(&self) -> TliR6Pb1RemapR {
TliR6Pb1RemapR::new(((self.bits >> 7) & 1) != 0)
}
#[doc = "Bit 8 - TLI_B6_PB8 remapping"]
#[inline(always)]
pub fn tli_b6_pb8_remap(&self) -> TliB6Pb8RemapR {
TliB6Pb8RemapR::new(((self.bits >> 8) & 1) != 0)
}
#[doc = "Bit 9 - TLI_B7_PB9 remapping"]
#[inline(always)]
pub fn tli_b7_pb9_remap(&self) -> TliB7Pb9RemapR {
TliB7Pb9RemapR::new(((self.bits >> 9) & 1) != 0)
}
#[doc = "Bit 10 - TLI_G4_PB10 remapping"]
#[inline(always)]
pub fn tli_g4_pb10_remap(&self) -> TliG4Pb10RemapR {
TliG4Pb10RemapR::new(((self.bits >> 10) & 1) != 0)
}
#[doc = "Bit 11 - TLI_G5_PB11 remapping"]
#[inline(always)]
pub fn tli_g5_pb11_remap(&self) -> TliG5Pb11RemapR {
TliG5Pb11RemapR::new(((self.bits >> 11) & 1) != 0)
}
#[doc = "Bit 12 - TLI_HSYNC_PC6 remapping"]
#[inline(always)]
pub fn tli_hsync_pc6_remap(&self) -> TliHsyncPc6RemapR {
TliHsyncPc6RemapR::new(((self.bits >> 12) & 1) != 0)
}
#[doc = "Bit 13 - TLI_G6_PC7 remapping"]
#[inline(always)]
pub fn tli_g6_pc7_remap(&self) -> TliG6Pc7RemapR {
TliG6Pc7RemapR::new(((self.bits >> 13) & 1) != 0)
}
#[doc = "Bit 14 - TLI_R2_PC10 remapping"]
#[inline(always)]
pub fn tli_r2_pc10_remap(&self) -> TliR2Pc10RemapR {
TliR2Pc10RemapR::new(((self.bits >> 14) & 1) != 0)
}
#[doc = "Bit 15 - TLI_G7_PD3 remapping"]
#[inline(always)]
pub fn tli_g7_pd3_remap(&self) -> TliG7Pd3RemapR {
TliG7Pd3RemapR::new(((self.bits >> 15) & 1) != 0)
}
#[doc = "Bit 16 - TLI_B2_PD6 remapping"]
#[inline(always)]
pub fn tli_b2_pd6_remap(&self) -> TliB2Pd6RemapR {
TliB2Pd6RemapR::new(((self.bits >> 16) & 1) != 0)
}
#[doc = "Bit 17 - TLI_B3_PD10 remapping"]
#[inline(always)]
pub fn tli_b3_pd10_remap(&self) -> TliB3Pd10RemapR {
TliB3Pd10RemapR::new(((self.bits >> 17) & 1) != 0)
}
#[doc = "Bit 18 - TLI_B0_PE4 remapping"]
#[inline(always)]
pub fn tli_b0_pe4_remap(&self) -> TliB0Pe4RemapR {
TliB0Pe4RemapR::new(((self.bits >> 18) & 1) != 0)
}
#[doc = "Bit 19 - TLI_G0_PE5 remapping"]
#[inline(always)]
pub fn tli_g0_pe5_remap(&self) -> TliG0Pe5RemapR {
TliG0Pe5RemapR::new(((self.bits >> 19) & 1) != 0)
}
#[doc = "Bit 20 - TLI_G1_PE6 remapping"]
#[inline(always)]
pub fn tli_g1_pe6_remap(&self) -> TliG1Pe6RemapR {
TliG1Pe6RemapR::new(((self.bits >> 20) & 1) != 0)
}
#[doc = "Bit 21 - TLI_G3_PE11 remapping"]
#[inline(always)]
pub fn tli_g3_pe11_remap(&self) -> TliG3Pe11RemapR {
TliG3Pe11RemapR::new(((self.bits >> 21) & 1) != 0)
}
#[doc = "Bit 22 - TLI_B4_PE12 remapping"]
#[inline(always)]
pub fn tli_b4_pe12_remap(&self) -> TliB4Pe12RemapR {
TliB4Pe12RemapR::new(((self.bits >> 22) & 1) != 0)
}
#[doc = "Bit 23 - TLI_DE_PE13 remapping"]
#[inline(always)]
pub fn tli_de_pe13_remap(&self) -> TliDePe13RemapR {
TliDePe13RemapR::new(((self.bits >> 23) & 1) != 0)
}
#[doc = "Bit 24 - TLI_CLK_PE14 remapping"]
#[inline(always)]
pub fn tli_clk_pe14_remap(&self) -> TliClkPe14RemapR {
TliClkPe14RemapR::new(((self.bits >> 24) & 1) != 0)
}
#[doc = "Bit 25 - TLI_R7_PE15 remapping"]
#[inline(always)]
pub fn tli_r7_pe15_remap(&self) -> TliR7Pe15RemapR {
TliR7Pe15RemapR::new(((self.bits >> 25) & 1) != 0)
}
#[doc = "Bit 26 - TLI_DE_PF10 remapping"]
#[inline(always)]
pub fn tli_de_pf10_remap(&self) -> TliDePf10RemapR {
TliDePf10RemapR::new(((self.bits >> 26) & 1) != 0)
}
#[doc = "Bit 27 - TLI_R7_PG6 remapping"]
#[inline(always)]
pub fn tli_r7_pg6_remap(&self) -> TliR7Pg6RemapR {
TliR7Pg6RemapR::new(((self.bits >> 27) & 1) != 0)
}
#[doc = "Bit 28 - TLI_CLK_PG7 remapping"]
#[inline(always)]
pub fn tli_clk_pg7_remap(&self) -> TliClkPg7RemapR {
TliClkPg7RemapR::new(((self.bits >> 28) & 1) != 0)
}
#[doc = "Bit 29 - TLI_G3_PG10 remapping"]
#[inline(always)]
pub fn tli_g3_pg10_remap(&self) -> TliG3Pg10RemapR {
TliG3Pg10RemapR::new(((self.bits >> 29) & 1) != 0)
}
#[doc = "Bit 30 - TLI_B2_PG10 remapping"]
#[inline(always)]
pub fn tli_b2_pg10_remap(&self) -> TliB2Pg10RemapR {
TliB2Pg10RemapR::new(((self.bits >> 30) & 1) != 0)
}
#[doc = "Bit 31 - TLI_B3_PG11 remapping"]
#[inline(always)]
pub fn tli_b3_pg11_remap(&self) -> TliB3Pg11RemapR {
TliB3Pg11RemapR::new(((self.bits >> 31) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - TLI_B5_PA3 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b5_pa3_remap(&mut self) -> TliB5Pa3RemapW<Pcf3Spec> {
TliB5Pa3RemapW::new(self, 0)
}
#[doc = "Bit 1 - TLI_VSYNC_PA4 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_vsync_pa4_remap(&mut self) -> TliVsyncPa4RemapW<Pcf3Spec> {
TliVsyncPa4RemapW::new(self, 1)
}
#[doc = "Bit 2 - TLI_G2_PA6 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g2_pa6_remap(&mut self) -> TliG2Pa6RemapW<Pcf3Spec> {
TliG2Pa6RemapW::new(self, 2)
}
#[doc = "Bit 3 - TLI_R6_PA8 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r6_pa8_remap(&mut self) -> TliR6Pa8RemapW<Pcf3Spec> {
TliR6Pa8RemapW::new(self, 3)
}
#[doc = "Bit 4 - TLI_R4_PA11 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r4_pa11_remap(&mut self) -> TliR4Pa11RemapW<Pcf3Spec> {
TliR4Pa11RemapW::new(self, 4)
}
#[doc = "Bit 5 - TLI_R5_PA12 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r5_pa12_remap(&mut self) -> TliR5Pa12RemapW<Pcf3Spec> {
TliR5Pa12RemapW::new(self, 5)
}
#[doc = "Bit 6 - TLI_R3_PB0 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r3_pb0_remap(&mut self) -> TliR3Pb0RemapW<Pcf3Spec> {
TliR3Pb0RemapW::new(self, 6)
}
#[doc = "Bit 7 - TLI_R6_PB1 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r6_pb1_remap(&mut self) -> TliR6Pb1RemapW<Pcf3Spec> {
TliR6Pb1RemapW::new(self, 7)
}
#[doc = "Bit 8 - TLI_B6_PB8 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b6_pb8_remap(&mut self) -> TliB6Pb8RemapW<Pcf3Spec> {
TliB6Pb8RemapW::new(self, 8)
}
#[doc = "Bit 9 - TLI_B7_PB9 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b7_pb9_remap(&mut self) -> TliB7Pb9RemapW<Pcf3Spec> {
TliB7Pb9RemapW::new(self, 9)
}
#[doc = "Bit 10 - TLI_G4_PB10 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g4_pb10_remap(&mut self) -> TliG4Pb10RemapW<Pcf3Spec> {
TliG4Pb10RemapW::new(self, 10)
}
#[doc = "Bit 11 - TLI_G5_PB11 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g5_pb11_remap(&mut self) -> TliG5Pb11RemapW<Pcf3Spec> {
TliG5Pb11RemapW::new(self, 11)
}
#[doc = "Bit 12 - TLI_HSYNC_PC6 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_hsync_pc6_remap(&mut self) -> TliHsyncPc6RemapW<Pcf3Spec> {
TliHsyncPc6RemapW::new(self, 12)
}
#[doc = "Bit 13 - TLI_G6_PC7 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g6_pc7_remap(&mut self) -> TliG6Pc7RemapW<Pcf3Spec> {
TliG6Pc7RemapW::new(self, 13)
}
#[doc = "Bit 14 - TLI_R2_PC10 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r2_pc10_remap(&mut self) -> TliR2Pc10RemapW<Pcf3Spec> {
TliR2Pc10RemapW::new(self, 14)
}
#[doc = "Bit 15 - TLI_G7_PD3 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g7_pd3_remap(&mut self) -> TliG7Pd3RemapW<Pcf3Spec> {
TliG7Pd3RemapW::new(self, 15)
}
#[doc = "Bit 16 - TLI_B2_PD6 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b2_pd6_remap(&mut self) -> TliB2Pd6RemapW<Pcf3Spec> {
TliB2Pd6RemapW::new(self, 16)
}
#[doc = "Bit 17 - TLI_B3_PD10 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b3_pd10_remap(&mut self) -> TliB3Pd10RemapW<Pcf3Spec> {
TliB3Pd10RemapW::new(self, 17)
}
#[doc = "Bit 18 - TLI_B0_PE4 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b0_pe4_remap(&mut self) -> TliB0Pe4RemapW<Pcf3Spec> {
TliB0Pe4RemapW::new(self, 18)
}
#[doc = "Bit 19 - TLI_G0_PE5 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g0_pe5_remap(&mut self) -> TliG0Pe5RemapW<Pcf3Spec> {
TliG0Pe5RemapW::new(self, 19)
}
#[doc = "Bit 20 - TLI_G1_PE6 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g1_pe6_remap(&mut self) -> TliG1Pe6RemapW<Pcf3Spec> {
TliG1Pe6RemapW::new(self, 20)
}
#[doc = "Bit 21 - TLI_G3_PE11 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g3_pe11_remap(&mut self) -> TliG3Pe11RemapW<Pcf3Spec> {
TliG3Pe11RemapW::new(self, 21)
}
#[doc = "Bit 22 - TLI_B4_PE12 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b4_pe12_remap(&mut self) -> TliB4Pe12RemapW<Pcf3Spec> {
TliB4Pe12RemapW::new(self, 22)
}
#[doc = "Bit 23 - TLI_DE_PE13 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_de_pe13_remap(&mut self) -> TliDePe13RemapW<Pcf3Spec> {
TliDePe13RemapW::new(self, 23)
}
#[doc = "Bit 24 - TLI_CLK_PE14 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_clk_pe14_remap(&mut self) -> TliClkPe14RemapW<Pcf3Spec> {
TliClkPe14RemapW::new(self, 24)
}
#[doc = "Bit 25 - TLI_R7_PE15 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r7_pe15_remap(&mut self) -> TliR7Pe15RemapW<Pcf3Spec> {
TliR7Pe15RemapW::new(self, 25)
}
#[doc = "Bit 26 - TLI_DE_PF10 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_de_pf10_remap(&mut self) -> TliDePf10RemapW<Pcf3Spec> {
TliDePf10RemapW::new(self, 26)
}
#[doc = "Bit 27 - TLI_R7_PG6 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r7_pg6_remap(&mut self) -> TliR7Pg6RemapW<Pcf3Spec> {
TliR7Pg6RemapW::new(self, 27)
}
#[doc = "Bit 28 - TLI_CLK_PG7 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_clk_pg7_remap(&mut self) -> TliClkPg7RemapW<Pcf3Spec> {
TliClkPg7RemapW::new(self, 28)
}
#[doc = "Bit 29 - TLI_G3_PG10 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g3_pg10_remap(&mut self) -> TliG3Pg10RemapW<Pcf3Spec> {
TliG3Pg10RemapW::new(self, 29)
}
#[doc = "Bit 30 - TLI_B2_PG10 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b2_pg10_remap(&mut self) -> TliB2Pg10RemapW<Pcf3Spec> {
TliB2Pg10RemapW::new(self, 30)
}
#[doc = "Bit 31 - TLI_B3_PG11 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b3_pg11_remap(&mut self) -> TliB3Pg11RemapW<Pcf3Spec> {
TliB3Pg11RemapW::new(self, 31)
}
}
#[doc = "AFIO port configuration register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcf3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcf3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct Pcf3Spec;
impl crate::RegisterSpec for Pcf3Spec {
type Ux = u32;
}
#[doc = "`read()` method returns [`pcf3::R`](R) reader structure"]
impl crate::Readable for Pcf3Spec {}
#[doc = "`write(|w| ..)` method takes [`pcf3::W`](W) writer structure"]
impl crate::Writable for Pcf3Spec {
type Safety = crate::Unsafe;
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets PCF3 to value 0"]
impl crate::Resettable for Pcf3Spec {
const RESET_VALUE: u32 = 0;
}