#[doc = "Register `PCF4` reader"]
pub type R = crate::R<Pcf4Spec>;
#[doc = "Register `PCF4` writer"]
pub type W = crate::W<Pcf4Spec>;
#[doc = "Field `TLI_B4_PG12_REMAP` reader - TLI_B4_PG12 remapping"]
pub type TliB4Pg12RemapR = crate::BitReader;
#[doc = "Field `TLI_B4_PG12_REMAP` writer - TLI_B4_PG12 remapping"]
pub type TliB4Pg12RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_B1_PG12_REMAP` reader - TLI_B1_PG12 remapping"]
pub type TliB1Pg12RemapR = crate::BitReader;
#[doc = "Field `TLI_B1_PG12_REMAP` writer - TLI_B1_PG12 remapping"]
pub type TliB1Pg12RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R0_PH2_REMAP` reader - TLI_R0_PH2 remapping"]
pub type TliR0Ph2RemapR = crate::BitReader;
#[doc = "Field `TLI_R0_PH2_REMAP` writer - TLI_R0_PH2 remapping"]
pub type TliR0Ph2RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R1_PH3_REMAP` reader - TLI_R1_PH3 remapping"]
pub type TliR1Ph3RemapR = crate::BitReader;
#[doc = "Field `TLI_R1_PH3_REMAP` writer - TLI_R1_PH3 remapping"]
pub type TliR1Ph3RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R2_PH8_REMAP` reader - TLI_R2_PH8 remapping"]
pub type TliR2Ph8RemapR = crate::BitReader;
#[doc = "Field `TLI_R2_PH8_REMAP` writer - TLI_R2_PH8 remapping"]
pub type TliR2Ph8RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R3_PH9_REMAP` reader - TLI_R3_PH9 remapping"]
pub type TliR3Ph9RemapR = crate::BitReader;
#[doc = "Field `TLI_R3_PH9_REMAP` writer - TLI_R3_PH9 remapping"]
pub type TliR3Ph9RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R4_PH10_REMAP` reader - TLI_R4_PH10 remapping"]
pub type TliR4Ph10RemapR = crate::BitReader;
#[doc = "Field `TLI_R4_PH10_REMAP` writer - TLI_R4_PH10 remapping"]
pub type TliR4Ph10RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R5_PH11_REMAP` reader - TLI_R5_PH11 remapping"]
pub type TliR5Ph11RemapR = crate::BitReader;
#[doc = "Field `TLI_R5_PH11_REMAP` writer - TLI_R5_PH11 remapping"]
pub type TliR5Ph11RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R6_PH12_REMAP` reader - TLI_R6_PH12 remapping"]
pub type TliR6Ph12RemapR = crate::BitReader;
#[doc = "Field `TLI_R6_PH12_REMAP` writer - TLI_R6_PH12 remapping"]
pub type TliR6Ph12RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G2_PH13_REMAP` reader - TLI_G2_PH13 remapping"]
pub type TliG2Ph13RemapR = crate::BitReader;
#[doc = "Field `TLI_G2_PH13_REMAP` writer - TLI_G2_PH13 remapping"]
pub type TliG2Ph13RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G3_PH14_REMAP` reader - TLI_G3_PH14 remapping"]
pub type TliG3Ph14RemapR = crate::BitReader;
#[doc = "Field `TLI_G3_PH14_REMAP` writer - TLI_G3_PH14 remapping"]
pub type TliG3Ph14RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G4_PH15_REMAP` reader - TLI_G4_PH15 remapping"]
pub type TliG4Ph15RemapR = crate::BitReader;
#[doc = "Field `TLI_G4_PH15_REMAP` writer - TLI_G4_PH15 remapping"]
pub type TliG4Ph15RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G5_PI0_REMAP` reader - TLI_G5_PI0 remapping"]
pub type TliG5Pi0RemapR = crate::BitReader;
#[doc = "Field `TLI_G5_PI0_REMAP` writer - TLI_G5_PI0 remapping"]
pub type TliG5Pi0RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G6_PI1_REMAP` reader - TLI_G6_PI1 remapping"]
pub type TliG6Pi1RemapR = crate::BitReader;
#[doc = "Field `TLI_G6_PI1_REMAP` writer - TLI_G6_PI1 remapping"]
pub type TliG6Pi1RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_G7_PI2_REMAP` reader - TLI_G7_PI2 remapping"]
pub type TliG7Pi2RemapR = crate::BitReader;
#[doc = "Field `TLI_G7_PI2_REMAP` writer - TLI_G7_PI2 remapping"]
pub type TliG7Pi2RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_B4_PI4_REMAP` reader - TLI_B4_PI4 remapping"]
pub type TliB4Pi4RemapR = crate::BitReader;
#[doc = "Field `TLI_B4_PI4_REMAP` writer - TLI_B4_PI4 remapping"]
pub type TliB4Pi4RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_B5_PI5_REMAP` reader - TLI_B5_PI5 remapping"]
pub type TliB5Pi5RemapR = crate::BitReader;
#[doc = "Field `TLI_B5_PI5_REMAP` writer - TLI_B5_PI5 remapping"]
pub type TliB5Pi5RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_B6_PI6_REMAP` reader - TLI_B6_PI6 remapping"]
pub type TliB6Pi6RemapR = crate::BitReader;
#[doc = "Field `TLI_B6_PI6_REMAP` writer - TLI_B6_PI6 remapping"]
pub type TliB6Pi6RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_B7_PI7_REMAP` reader - TLI_B7_PI7 remapping"]
pub type TliB7Pi7RemapR = crate::BitReader;
#[doc = "Field `TLI_B7_PI7_REMAP` writer - TLI_B7_PI7 remapping"]
pub type TliB7Pi7RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_VSYNC_PI9_REMAP` reader - TLI_VSYNC_PI9 remapping"]
pub type TliVsyncPi9RemapR = crate::BitReader;
#[doc = "Field `TLI_VSYNC_PI9_REMAP` writer - TLI_VSYNC_PI9 remapping"]
pub type TliVsyncPi9RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_HSYNC_PI10_REMAP` reader - TLI_HSYNC_PI10 remapping"]
pub type TliHsyncPi10RemapR = crate::BitReader;
#[doc = "Field `TLI_HSYNC_PI10_REMAP` writer - TLI_HSYNC_PI10 remapping"]
pub type TliHsyncPi10RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R0_PH4_REMAP` reader - TLI_R0_PH4 remapping"]
pub type TliR0Ph4RemapR = crate::BitReader;
#[doc = "Field `TLI_R0_PH4_REMAP` writer - TLI_R0_PH4 remapping"]
pub type TliR0Ph4RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `TLI_R1_PI3_REMAP` reader - TLI_R1_PI3 remapping"]
pub type TliR1Pi3RemapR = crate::BitReader;
#[doc = "Field `TLI_R1_PI3_REMAP` writer - TLI_R1_PI3 remapping"]
pub type TliR1Pi3RemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `SPI1_SCK_REMAP` reader - SPI1_SCK remapping"]
pub type Spi1SckRemapR = crate::BitReader;
#[doc = "Field `SPI1_SCK_REMAP` writer - SPI1_SCK remapping"]
pub type Spi1SckRemapW<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `SPI2_MOSI_REMAP` reader - SPI2_MOSI remapping"]
pub type Spi2MosiRemapR = crate::BitReader;
#[doc = "Field `SPI2_MOSI_REMAP` writer - SPI2_MOSI remapping"]
pub type Spi2MosiRemapW<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
#[doc = "Bit 0 - TLI_B4_PG12 remapping"]
#[inline(always)]
pub fn tli_b4_pg12_remap(&self) -> TliB4Pg12RemapR {
TliB4Pg12RemapR::new((self.bits & 1) != 0)
}
#[doc = "Bit 1 - TLI_B1_PG12 remapping"]
#[inline(always)]
pub fn tli_b1_pg12_remap(&self) -> TliB1Pg12RemapR {
TliB1Pg12RemapR::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - TLI_R0_PH2 remapping"]
#[inline(always)]
pub fn tli_r0_ph2_remap(&self) -> TliR0Ph2RemapR {
TliR0Ph2RemapR::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - TLI_R1_PH3 remapping"]
#[inline(always)]
pub fn tli_r1_ph3_remap(&self) -> TliR1Ph3RemapR {
TliR1Ph3RemapR::new(((self.bits >> 3) & 1) != 0)
}
#[doc = "Bit 4 - TLI_R2_PH8 remapping"]
#[inline(always)]
pub fn tli_r2_ph8_remap(&self) -> TliR2Ph8RemapR {
TliR2Ph8RemapR::new(((self.bits >> 4) & 1) != 0)
}
#[doc = "Bit 5 - TLI_R3_PH9 remapping"]
#[inline(always)]
pub fn tli_r3_ph9_remap(&self) -> TliR3Ph9RemapR {
TliR3Ph9RemapR::new(((self.bits >> 5) & 1) != 0)
}
#[doc = "Bit 6 - TLI_R4_PH10 remapping"]
#[inline(always)]
pub fn tli_r4_ph10_remap(&self) -> TliR4Ph10RemapR {
TliR4Ph10RemapR::new(((self.bits >> 6) & 1) != 0)
}
#[doc = "Bit 7 - TLI_R5_PH11 remapping"]
#[inline(always)]
pub fn tli_r5_ph11_remap(&self) -> TliR5Ph11RemapR {
TliR5Ph11RemapR::new(((self.bits >> 7) & 1) != 0)
}
#[doc = "Bit 8 - TLI_R6_PH12 remapping"]
#[inline(always)]
pub fn tli_r6_ph12_remap(&self) -> TliR6Ph12RemapR {
TliR6Ph12RemapR::new(((self.bits >> 8) & 1) != 0)
}
#[doc = "Bit 9 - TLI_G2_PH13 remapping"]
#[inline(always)]
pub fn tli_g2_ph13_remap(&self) -> TliG2Ph13RemapR {
TliG2Ph13RemapR::new(((self.bits >> 9) & 1) != 0)
}
#[doc = "Bit 10 - TLI_G3_PH14 remapping"]
#[inline(always)]
pub fn tli_g3_ph14_remap(&self) -> TliG3Ph14RemapR {
TliG3Ph14RemapR::new(((self.bits >> 10) & 1) != 0)
}
#[doc = "Bit 11 - TLI_G4_PH15 remapping"]
#[inline(always)]
pub fn tli_g4_ph15_remap(&self) -> TliG4Ph15RemapR {
TliG4Ph15RemapR::new(((self.bits >> 11) & 1) != 0)
}
#[doc = "Bit 12 - TLI_G5_PI0 remapping"]
#[inline(always)]
pub fn tli_g5_pi0_remap(&self) -> TliG5Pi0RemapR {
TliG5Pi0RemapR::new(((self.bits >> 12) & 1) != 0)
}
#[doc = "Bit 13 - TLI_G6_PI1 remapping"]
#[inline(always)]
pub fn tli_g6_pi1_remap(&self) -> TliG6Pi1RemapR {
TliG6Pi1RemapR::new(((self.bits >> 13) & 1) != 0)
}
#[doc = "Bit 14 - TLI_G7_PI2 remapping"]
#[inline(always)]
pub fn tli_g7_pi2_remap(&self) -> TliG7Pi2RemapR {
TliG7Pi2RemapR::new(((self.bits >> 14) & 1) != 0)
}
#[doc = "Bit 15 - TLI_B4_PI4 remapping"]
#[inline(always)]
pub fn tli_b4_pi4_remap(&self) -> TliB4Pi4RemapR {
TliB4Pi4RemapR::new(((self.bits >> 15) & 1) != 0)
}
#[doc = "Bit 16 - TLI_B5_PI5 remapping"]
#[inline(always)]
pub fn tli_b5_pi5_remap(&self) -> TliB5Pi5RemapR {
TliB5Pi5RemapR::new(((self.bits >> 16) & 1) != 0)
}
#[doc = "Bit 17 - TLI_B6_PI6 remapping"]
#[inline(always)]
pub fn tli_b6_pi6_remap(&self) -> TliB6Pi6RemapR {
TliB6Pi6RemapR::new(((self.bits >> 17) & 1) != 0)
}
#[doc = "Bit 18 - TLI_B7_PI7 remapping"]
#[inline(always)]
pub fn tli_b7_pi7_remap(&self) -> TliB7Pi7RemapR {
TliB7Pi7RemapR::new(((self.bits >> 18) & 1) != 0)
}
#[doc = "Bit 19 - TLI_VSYNC_PI9 remapping"]
#[inline(always)]
pub fn tli_vsync_pi9_remap(&self) -> TliVsyncPi9RemapR {
TliVsyncPi9RemapR::new(((self.bits >> 19) & 1) != 0)
}
#[doc = "Bit 20 - TLI_HSYNC_PI10 remapping"]
#[inline(always)]
pub fn tli_hsync_pi10_remap(&self) -> TliHsyncPi10RemapR {
TliHsyncPi10RemapR::new(((self.bits >> 20) & 1) != 0)
}
#[doc = "Bit 21 - TLI_R0_PH4 remapping"]
#[inline(always)]
pub fn tli_r0_ph4_remap(&self) -> TliR0Ph4RemapR {
TliR0Ph4RemapR::new(((self.bits >> 21) & 1) != 0)
}
#[doc = "Bit 22 - TLI_R1_PI3 remapping"]
#[inline(always)]
pub fn tli_r1_pi3_remap(&self) -> TliR1Pi3RemapR {
TliR1Pi3RemapR::new(((self.bits >> 22) & 1) != 0)
}
#[doc = "Bit 23 - SPI1_SCK remapping"]
#[inline(always)]
pub fn spi1_sck_remap(&self) -> Spi1SckRemapR {
Spi1SckRemapR::new(((self.bits >> 23) & 1) != 0)
}
#[doc = "Bit 24 - SPI2_MOSI remapping"]
#[inline(always)]
pub fn spi2_mosi_remap(&self) -> Spi2MosiRemapR {
Spi2MosiRemapR::new(((self.bits >> 24) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0 - TLI_B4_PG12 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b4_pg12_remap(&mut self) -> TliB4Pg12RemapW<Pcf4Spec> {
TliB4Pg12RemapW::new(self, 0)
}
#[doc = "Bit 1 - TLI_B1_PG12 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b1_pg12_remap(&mut self) -> TliB1Pg12RemapW<Pcf4Spec> {
TliB1Pg12RemapW::new(self, 1)
}
#[doc = "Bit 2 - TLI_R0_PH2 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r0_ph2_remap(&mut self) -> TliR0Ph2RemapW<Pcf4Spec> {
TliR0Ph2RemapW::new(self, 2)
}
#[doc = "Bit 3 - TLI_R1_PH3 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r1_ph3_remap(&mut self) -> TliR1Ph3RemapW<Pcf4Spec> {
TliR1Ph3RemapW::new(self, 3)
}
#[doc = "Bit 4 - TLI_R2_PH8 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r2_ph8_remap(&mut self) -> TliR2Ph8RemapW<Pcf4Spec> {
TliR2Ph8RemapW::new(self, 4)
}
#[doc = "Bit 5 - TLI_R3_PH9 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r3_ph9_remap(&mut self) -> TliR3Ph9RemapW<Pcf4Spec> {
TliR3Ph9RemapW::new(self, 5)
}
#[doc = "Bit 6 - TLI_R4_PH10 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r4_ph10_remap(&mut self) -> TliR4Ph10RemapW<Pcf4Spec> {
TliR4Ph10RemapW::new(self, 6)
}
#[doc = "Bit 7 - TLI_R5_PH11 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r5_ph11_remap(&mut self) -> TliR5Ph11RemapW<Pcf4Spec> {
TliR5Ph11RemapW::new(self, 7)
}
#[doc = "Bit 8 - TLI_R6_PH12 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r6_ph12_remap(&mut self) -> TliR6Ph12RemapW<Pcf4Spec> {
TliR6Ph12RemapW::new(self, 8)
}
#[doc = "Bit 9 - TLI_G2_PH13 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g2_ph13_remap(&mut self) -> TliG2Ph13RemapW<Pcf4Spec> {
TliG2Ph13RemapW::new(self, 9)
}
#[doc = "Bit 10 - TLI_G3_PH14 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g3_ph14_remap(&mut self) -> TliG3Ph14RemapW<Pcf4Spec> {
TliG3Ph14RemapW::new(self, 10)
}
#[doc = "Bit 11 - TLI_G4_PH15 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g4_ph15_remap(&mut self) -> TliG4Ph15RemapW<Pcf4Spec> {
TliG4Ph15RemapW::new(self, 11)
}
#[doc = "Bit 12 - TLI_G5_PI0 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g5_pi0_remap(&mut self) -> TliG5Pi0RemapW<Pcf4Spec> {
TliG5Pi0RemapW::new(self, 12)
}
#[doc = "Bit 13 - TLI_G6_PI1 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g6_pi1_remap(&mut self) -> TliG6Pi1RemapW<Pcf4Spec> {
TliG6Pi1RemapW::new(self, 13)
}
#[doc = "Bit 14 - TLI_G7_PI2 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_g7_pi2_remap(&mut self) -> TliG7Pi2RemapW<Pcf4Spec> {
TliG7Pi2RemapW::new(self, 14)
}
#[doc = "Bit 15 - TLI_B4_PI4 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b4_pi4_remap(&mut self) -> TliB4Pi4RemapW<Pcf4Spec> {
TliB4Pi4RemapW::new(self, 15)
}
#[doc = "Bit 16 - TLI_B5_PI5 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b5_pi5_remap(&mut self) -> TliB5Pi5RemapW<Pcf4Spec> {
TliB5Pi5RemapW::new(self, 16)
}
#[doc = "Bit 17 - TLI_B6_PI6 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b6_pi6_remap(&mut self) -> TliB6Pi6RemapW<Pcf4Spec> {
TliB6Pi6RemapW::new(self, 17)
}
#[doc = "Bit 18 - TLI_B7_PI7 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_b7_pi7_remap(&mut self) -> TliB7Pi7RemapW<Pcf4Spec> {
TliB7Pi7RemapW::new(self, 18)
}
#[doc = "Bit 19 - TLI_VSYNC_PI9 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_vsync_pi9_remap(&mut self) -> TliVsyncPi9RemapW<Pcf4Spec> {
TliVsyncPi9RemapW::new(self, 19)
}
#[doc = "Bit 20 - TLI_HSYNC_PI10 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_hsync_pi10_remap(&mut self) -> TliHsyncPi10RemapW<Pcf4Spec> {
TliHsyncPi10RemapW::new(self, 20)
}
#[doc = "Bit 21 - TLI_R0_PH4 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r0_ph4_remap(&mut self) -> TliR0Ph4RemapW<Pcf4Spec> {
TliR0Ph4RemapW::new(self, 21)
}
#[doc = "Bit 22 - TLI_R1_PI3 remapping"]
#[inline(always)]
#[must_use]
pub fn tli_r1_pi3_remap(&mut self) -> TliR1Pi3RemapW<Pcf4Spec> {
TliR1Pi3RemapW::new(self, 22)
}
#[doc = "Bit 23 - SPI1_SCK remapping"]
#[inline(always)]
#[must_use]
pub fn spi1_sck_remap(&mut self) -> Spi1SckRemapW<Pcf4Spec> {
Spi1SckRemapW::new(self, 23)
}
#[doc = "Bit 24 - SPI2_MOSI remapping"]
#[inline(always)]
#[must_use]
pub fn spi2_mosi_remap(&mut self) -> Spi2MosiRemapW<Pcf4Spec> {
Spi2MosiRemapW::new(self, 24)
}
}
#[doc = "AFIO port configuration register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcf4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcf4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct Pcf4Spec;
impl crate::RegisterSpec for Pcf4Spec {
type Ux = u32;
}
#[doc = "`read()` method returns [`pcf4::R`](R) reader structure"]
impl crate::Readable for Pcf4Spec {}
#[doc = "`write(|w| ..)` method takes [`pcf4::W`](W) writer structure"]
impl crate::Writable for Pcf4Spec {
type Safety = crate::Unsafe;
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets PCF4 to value 0"]
impl crate::Resettable for Pcf4Spec {
const RESET_VALUE: u32 = 0;
}