gd32e5/gd32e503/
slave_timer2.rs

1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4    st2ctl0: St2ctl0,
5    st2intf: St2intf,
6    st2intc: St2intc,
7    st2dmainten: St2dmainten,
8    st2cnt: St2cnt,
9    st2car: St2car,
10    st2crep: St2crep,
11    st2cmp0v: St2cmp0v,
12    st2cmp0cp: St2cmp0cp,
13    st2cmp1v: St2cmp1v,
14    st2cmp2v: St2cmp2v,
15    st2cmp3v: St2cmp3v,
16    st2cap0v: St2cap0v,
17    st2cap1v: St2cap1v,
18    st2dtctl: St2dtctl,
19    st2ch0set: St2ch0set,
20    st2ch0rst: St2ch0rst,
21    st2ch1set: St2ch1set,
22    st2ch1rst: St2ch1rst,
23    st2exevfcfg0: St2exevfcfg0,
24    st2exevfcfg1: St2exevfcfg1,
25    st2cntrst: St2cntrst,
26    st2csctl: St2csctl,
27    st2cap0trg: St2cap0trg,
28    st2cap1trg: St2cap1trg,
29    st2choctl: St2choctl,
30    st2fltctl: St2fltctl,
31    _reserved27: [u8; 0x10],
32    st2actl: St2actl,
33}
34impl RegisterBlock {
35    #[doc = "0x00 - SHRTIMER Slave_TIMERx control register 0"]
36    #[inline(always)]
37    pub const fn st2ctl0(&self) -> &St2ctl0 {
38        &self.st2ctl0
39    }
40    #[doc = "0x04 - SHRTIMER Slave_TIMERx interrupt flag register"]
41    #[inline(always)]
42    pub const fn st2intf(&self) -> &St2intf {
43        &self.st2intf
44    }
45    #[doc = "0x08 - SHRTIMER Slave_TIMERx interrupt flag clear register"]
46    #[inline(always)]
47    pub const fn st2intc(&self) -> &St2intc {
48        &self.st2intc
49    }
50    #[doc = "0x0c - SHRTIMER Slave_TIMERx DMA and interrupt enable register"]
51    #[inline(always)]
52    pub const fn st2dmainten(&self) -> &St2dmainten {
53        &self.st2dmainten
54    }
55    #[doc = "0x10 - SHRTIMER Slave_TIMERx counter register"]
56    #[inline(always)]
57    pub const fn st2cnt(&self) -> &St2cnt {
58        &self.st2cnt
59    }
60    #[doc = "0x14 - SHRTIMER Slave_TIMER2 counter auto reload register"]
61    #[inline(always)]
62    pub const fn st2car(&self) -> &St2car {
63        &self.st2car
64    }
65    #[doc = "0x18 - SHRTIMER Slave_TIMER2 counter repetition register"]
66    #[inline(always)]
67    pub const fn st2crep(&self) -> &St2crep {
68        &self.st2crep
69    }
70    #[doc = "0x1c - SHRTIMER Slave_TIMER2 compare 0 value register"]
71    #[inline(always)]
72    pub const fn st2cmp0v(&self) -> &St2cmp0v {
73        &self.st2cmp0v
74    }
75    #[doc = "0x20 - SHRTIMER Slave_TIMERx compare 0 composite register"]
76    #[inline(always)]
77    pub const fn st2cmp0cp(&self) -> &St2cmp0cp {
78        &self.st2cmp0cp
79    }
80    #[doc = "0x24 - SHRTIMER Slave_TIMERx compare 1 value register"]
81    #[inline(always)]
82    pub const fn st2cmp1v(&self) -> &St2cmp1v {
83        &self.st2cmp1v
84    }
85    #[doc = "0x28 - SHRTIMER Slave_TIMERx compare 2 value register"]
86    #[inline(always)]
87    pub const fn st2cmp2v(&self) -> &St2cmp2v {
88        &self.st2cmp2v
89    }
90    #[doc = "0x2c - SHRTIMER Slave_TIMERx compare 3 value register"]
91    #[inline(always)]
92    pub const fn st2cmp3v(&self) -> &St2cmp3v {
93        &self.st2cmp3v
94    }
95    #[doc = "0x30 - SHRTIMER Slave_TIMERx capture 0 value register"]
96    #[inline(always)]
97    pub const fn st2cap0v(&self) -> &St2cap0v {
98        &self.st2cap0v
99    }
100    #[doc = "0x34 - SHRTIMER Slave_TIMERx capture 1 value register"]
101    #[inline(always)]
102    pub const fn st2cap1v(&self) -> &St2cap1v {
103        &self.st2cap1v
104    }
105    #[doc = "0x38 - SHRTIMER Slave_TIMERx dead-time control register"]
106    #[inline(always)]
107    pub const fn st2dtctl(&self) -> &St2dtctl {
108        &self.st2dtctl
109    }
110    #[doc = "0x3c - SHRTIMER Slave_TIMERx channel 0 set request register"]
111    #[inline(always)]
112    pub const fn st2ch0set(&self) -> &St2ch0set {
113        &self.st2ch0set
114    }
115    #[doc = "0x40 - SHRTIMER Slave_TIMERx channel 0 reset request register"]
116    #[inline(always)]
117    pub const fn st2ch0rst(&self) -> &St2ch0rst {
118        &self.st2ch0rst
119    }
120    #[doc = "0x44 - SHRTIMER Slave_TIMERx channel 1 set request register"]
121    #[inline(always)]
122    pub const fn st2ch1set(&self) -> &St2ch1set {
123        &self.st2ch1set
124    }
125    #[doc = "0x48 - SHRTIMER Slave_TIMERx channel 1 reset request register"]
126    #[inline(always)]
127    pub const fn st2ch1rst(&self) -> &St2ch1rst {
128        &self.st2ch1rst
129    }
130    #[doc = "0x4c - SHRTIMER Slave_TIMERx external event filter configuration register 0"]
131    #[inline(always)]
132    pub const fn st2exevfcfg0(&self) -> &St2exevfcfg0 {
133        &self.st2exevfcfg0
134    }
135    #[doc = "0x50 - SHRTIMER Slave_TIMERx external event filter configuration register 1"]
136    #[inline(always)]
137    pub const fn st2exevfcfg1(&self) -> &St2exevfcfg1 {
138        &self.st2exevfcfg1
139    }
140    #[doc = "0x54 - SHRTIMER Slave_TIMERx counter reset register"]
141    #[inline(always)]
142    pub const fn st2cntrst(&self) -> &St2cntrst {
143        &self.st2cntrst
144    }
145    #[doc = "0x58 - SHRTIMER Slave_TIMERx carrier-signal control register"]
146    #[inline(always)]
147    pub const fn st2csctl(&self) -> &St2csctl {
148        &self.st2csctl
149    }
150    #[doc = "0x5c - SHRTIMER Slave_TIMERx capture 0 trigger register"]
151    #[inline(always)]
152    pub const fn st2cap0trg(&self) -> &St2cap0trg {
153        &self.st2cap0trg
154    }
155    #[doc = "0x60 - SHRTIMER Slave_TIMERx capture 1 trigger register"]
156    #[inline(always)]
157    pub const fn st2cap1trg(&self) -> &St2cap1trg {
158        &self.st2cap1trg
159    }
160    #[doc = "0x64 - SHRTIMER Slave_TIMERx channel output control register"]
161    #[inline(always)]
162    pub const fn st2choctl(&self) -> &St2choctl {
163        &self.st2choctl
164    }
165    #[doc = "0x68 - SHRTIMER Slave_TIMERx fault control register"]
166    #[inline(always)]
167    pub const fn st2fltctl(&self) -> &St2fltctl {
168        &self.st2fltctl
169    }
170    #[doc = "0x7c - SHRTIMER Slave_TIMERx additional control register"]
171    #[inline(always)]
172    pub const fn st2actl(&self) -> &St2actl {
173        &self.st2actl
174    }
175}
176#[doc = "ST2CTL0 (rw) register accessor: SHRTIMER Slave_TIMERx control register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2ctl0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2ctl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2ctl0`]
177module"]
178#[doc(alias = "ST2CTL0")]
179pub type St2ctl0 = crate::Reg<st2ctl0::St2ctl0Spec>;
180#[doc = "SHRTIMER Slave_TIMERx control register 0"]
181pub mod st2ctl0;
182#[doc = "ST2INTF (r) register accessor: SHRTIMER Slave_TIMERx interrupt flag register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2intf::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2intf`]
183module"]
184#[doc(alias = "ST2INTF")]
185pub type St2intf = crate::Reg<st2intf::St2intfSpec>;
186#[doc = "SHRTIMER Slave_TIMERx interrupt flag register"]
187pub mod st2intf;
188#[doc = "ST2INTC (w) register accessor: SHRTIMER Slave_TIMERx interrupt flag clear register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2intc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2intc`]
189module"]
190#[doc(alias = "ST2INTC")]
191pub type St2intc = crate::Reg<st2intc::St2intcSpec>;
192#[doc = "SHRTIMER Slave_TIMERx interrupt flag clear register"]
193pub mod st2intc;
194#[doc = "ST2DMAINTEN (rw) register accessor: SHRTIMER Slave_TIMERx DMA and interrupt enable register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2dmainten::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2dmainten::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2dmainten`]
195module"]
196#[doc(alias = "ST2DMAINTEN")]
197pub type St2dmainten = crate::Reg<st2dmainten::St2dmaintenSpec>;
198#[doc = "SHRTIMER Slave_TIMERx DMA and interrupt enable register"]
199pub mod st2dmainten;
200#[doc = "ST2CNT (rw) register accessor: SHRTIMER Slave_TIMERx counter register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2cnt::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2cnt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2cnt`]
201module"]
202#[doc(alias = "ST2CNT")]
203pub type St2cnt = crate::Reg<st2cnt::St2cntSpec>;
204#[doc = "SHRTIMER Slave_TIMERx counter register"]
205pub mod st2cnt;
206#[doc = "ST2CAR (rw) register accessor: SHRTIMER Slave_TIMER2 counter auto reload register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2car::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2car::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2car`]
207module"]
208#[doc(alias = "ST2CAR")]
209pub type St2car = crate::Reg<st2car::St2carSpec>;
210#[doc = "SHRTIMER Slave_TIMER2 counter auto reload register"]
211pub mod st2car;
212#[doc = "ST2CREP (rw) register accessor: SHRTIMER Slave_TIMER2 counter repetition register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2crep::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2crep::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2crep`]
213module"]
214#[doc(alias = "ST2CREP")]
215pub type St2crep = crate::Reg<st2crep::St2crepSpec>;
216#[doc = "SHRTIMER Slave_TIMER2 counter repetition register"]
217pub mod st2crep;
218#[doc = "ST2CMP0V (rw) register accessor: SHRTIMER Slave_TIMER2 compare 0 value register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2cmp0v::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2cmp0v::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2cmp0v`]
219module"]
220#[doc(alias = "ST2CMP0V")]
221pub type St2cmp0v = crate::Reg<st2cmp0v::St2cmp0vSpec>;
222#[doc = "SHRTIMER Slave_TIMER2 compare 0 value register"]
223pub mod st2cmp0v;
224#[doc = "ST2CMP0CP (rw) register accessor: SHRTIMER Slave_TIMERx compare 0 composite register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2cmp0cp::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2cmp0cp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2cmp0cp`]
225module"]
226#[doc(alias = "ST2CMP0CP")]
227pub type St2cmp0cp = crate::Reg<st2cmp0cp::St2cmp0cpSpec>;
228#[doc = "SHRTIMER Slave_TIMERx compare 0 composite register"]
229pub mod st2cmp0cp;
230#[doc = "ST2CMP1V (rw) register accessor: SHRTIMER Slave_TIMERx compare 1 value register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2cmp1v::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2cmp1v::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2cmp1v`]
231module"]
232#[doc(alias = "ST2CMP1V")]
233pub type St2cmp1v = crate::Reg<st2cmp1v::St2cmp1vSpec>;
234#[doc = "SHRTIMER Slave_TIMERx compare 1 value register"]
235pub mod st2cmp1v;
236#[doc = "ST2CMP2V (rw) register accessor: SHRTIMER Slave_TIMERx compare 2 value register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2cmp2v::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2cmp2v::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2cmp2v`]
237module"]
238#[doc(alias = "ST2CMP2V")]
239pub type St2cmp2v = crate::Reg<st2cmp2v::St2cmp2vSpec>;
240#[doc = "SHRTIMER Slave_TIMERx compare 2 value register"]
241pub mod st2cmp2v;
242#[doc = "ST2CMP3V (rw) register accessor: SHRTIMER Slave_TIMERx compare 3 value register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2cmp3v::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2cmp3v::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2cmp3v`]
243module"]
244#[doc(alias = "ST2CMP3V")]
245pub type St2cmp3v = crate::Reg<st2cmp3v::St2cmp3vSpec>;
246#[doc = "SHRTIMER Slave_TIMERx compare 3 value register"]
247pub mod st2cmp3v;
248#[doc = "ST2CAP0V (rw) register accessor: SHRTIMER Slave_TIMERx capture 0 value register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2cap0v::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2cap0v::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2cap0v`]
249module"]
250#[doc(alias = "ST2CAP0V")]
251pub type St2cap0v = crate::Reg<st2cap0v::St2cap0vSpec>;
252#[doc = "SHRTIMER Slave_TIMERx capture 0 value register"]
253pub mod st2cap0v;
254#[doc = "ST2CAP1V (rw) register accessor: SHRTIMER Slave_TIMERx capture 1 value register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2cap1v::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2cap1v::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2cap1v`]
255module"]
256#[doc(alias = "ST2CAP1V")]
257pub type St2cap1v = crate::Reg<st2cap1v::St2cap1vSpec>;
258#[doc = "SHRTIMER Slave_TIMERx capture 1 value register"]
259pub mod st2cap1v;
260#[doc = "ST2DTCTL (rw) register accessor: SHRTIMER Slave_TIMERx dead-time control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2dtctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2dtctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2dtctl`]
261module"]
262#[doc(alias = "ST2DTCTL")]
263pub type St2dtctl = crate::Reg<st2dtctl::St2dtctlSpec>;
264#[doc = "SHRTIMER Slave_TIMERx dead-time control register"]
265pub mod st2dtctl;
266#[doc = "ST2CH0SET (rw) register accessor: SHRTIMER Slave_TIMERx channel 0 set request register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2ch0set::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2ch0set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2ch0set`]
267module"]
268#[doc(alias = "ST2CH0SET")]
269pub type St2ch0set = crate::Reg<st2ch0set::St2ch0setSpec>;
270#[doc = "SHRTIMER Slave_TIMERx channel 0 set request register"]
271pub mod st2ch0set;
272#[doc = "ST2CH0RST (rw) register accessor: SHRTIMER Slave_TIMERx channel 0 reset request register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2ch0rst::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2ch0rst::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2ch0rst`]
273module"]
274#[doc(alias = "ST2CH0RST")]
275pub type St2ch0rst = crate::Reg<st2ch0rst::St2ch0rstSpec>;
276#[doc = "SHRTIMER Slave_TIMERx channel 0 reset request register"]
277pub mod st2ch0rst;
278#[doc = "ST2CH1SET (rw) register accessor: SHRTIMER Slave_TIMERx channel 1 set request register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2ch1set::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2ch1set::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2ch1set`]
279module"]
280#[doc(alias = "ST2CH1SET")]
281pub type St2ch1set = crate::Reg<st2ch1set::St2ch1setSpec>;
282#[doc = "SHRTIMER Slave_TIMERx channel 1 set request register"]
283pub mod st2ch1set;
284#[doc = "ST2CH1RST (rw) register accessor: SHRTIMER Slave_TIMERx channel 1 reset request register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2ch1rst::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2ch1rst::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2ch1rst`]
285module"]
286#[doc(alias = "ST2CH1RST")]
287pub type St2ch1rst = crate::Reg<st2ch1rst::St2ch1rstSpec>;
288#[doc = "SHRTIMER Slave_TIMERx channel 1 reset request register"]
289pub mod st2ch1rst;
290#[doc = "ST2EXEVFCFG0 (rw) register accessor: SHRTIMER Slave_TIMERx external event filter configuration register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2exevfcfg0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2exevfcfg0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2exevfcfg0`]
291module"]
292#[doc(alias = "ST2EXEVFCFG0")]
293pub type St2exevfcfg0 = crate::Reg<st2exevfcfg0::St2exevfcfg0Spec>;
294#[doc = "SHRTIMER Slave_TIMERx external event filter configuration register 0"]
295pub mod st2exevfcfg0;
296#[doc = "ST2EXEVFCFG1 (rw) register accessor: SHRTIMER Slave_TIMERx external event filter configuration register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2exevfcfg1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2exevfcfg1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2exevfcfg1`]
297module"]
298#[doc(alias = "ST2EXEVFCFG1")]
299pub type St2exevfcfg1 = crate::Reg<st2exevfcfg1::St2exevfcfg1Spec>;
300#[doc = "SHRTIMER Slave_TIMERx external event filter configuration register 1"]
301pub mod st2exevfcfg1;
302#[doc = "ST2CNTRST (rw) register accessor: SHRTIMER Slave_TIMERx counter reset register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2cntrst::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2cntrst::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2cntrst`]
303module"]
304#[doc(alias = "ST2CNTRST")]
305pub type St2cntrst = crate::Reg<st2cntrst::St2cntrstSpec>;
306#[doc = "SHRTIMER Slave_TIMERx counter reset register"]
307pub mod st2cntrst;
308#[doc = "ST2CSCTL (rw) register accessor: SHRTIMER Slave_TIMERx carrier-signal control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2csctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2csctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2csctl`]
309module"]
310#[doc(alias = "ST2CSCTL")]
311pub type St2csctl = crate::Reg<st2csctl::St2csctlSpec>;
312#[doc = "SHRTIMER Slave_TIMERx carrier-signal control register"]
313pub mod st2csctl;
314#[doc = "ST2CAP0TRG (rw) register accessor: SHRTIMER Slave_TIMERx capture 0 trigger register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2cap0trg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2cap0trg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2cap0trg`]
315module"]
316#[doc(alias = "ST2CAP0TRG")]
317pub type St2cap0trg = crate::Reg<st2cap0trg::St2cap0trgSpec>;
318#[doc = "SHRTIMER Slave_TIMERx capture 0 trigger register"]
319pub mod st2cap0trg;
320#[doc = "ST2CAP1TRG (rw) register accessor: SHRTIMER Slave_TIMERx capture 1 trigger register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2cap1trg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2cap1trg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2cap1trg`]
321module"]
322#[doc(alias = "ST2CAP1TRG")]
323pub type St2cap1trg = crate::Reg<st2cap1trg::St2cap1trgSpec>;
324#[doc = "SHRTIMER Slave_TIMERx capture 1 trigger register"]
325pub mod st2cap1trg;
326#[doc = "ST2CHOCTL (rw) register accessor: SHRTIMER Slave_TIMERx channel output control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2choctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2choctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2choctl`]
327module"]
328#[doc(alias = "ST2CHOCTL")]
329pub type St2choctl = crate::Reg<st2choctl::St2choctlSpec>;
330#[doc = "SHRTIMER Slave_TIMERx channel output control register"]
331pub mod st2choctl;
332#[doc = "ST2FLTCTL (rw) register accessor: SHRTIMER Slave_TIMERx fault control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2fltctl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2fltctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2fltctl`]
333module"]
334#[doc(alias = "ST2FLTCTL")]
335pub type St2fltctl = crate::Reg<st2fltctl::St2fltctlSpec>;
336#[doc = "SHRTIMER Slave_TIMERx fault control register"]
337pub mod st2fltctl;
338#[doc = "ST2ACTL (rw) register accessor: SHRTIMER Slave_TIMERx additional control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st2actl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`st2actl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@st2actl`]
339module"]
340#[doc(alias = "ST2ACTL")]
341pub type St2actl = crate::Reg<st2actl::St2actlSpec>;
342#[doc = "SHRTIMER Slave_TIMERx additional control register"]
343pub mod st2actl;
gd32e5/gd32e503/slave_timer2.rs

gd32e5/gd32e503/
slave_timer2.rs
