gd32c1 0.9.1

Device support crate for GD32C1 devices
Documentation
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
#[doc = "Register `CTL1` reader"]
pub type R = crate::R<Ctl1Spec>;
#[doc = "Register `CTL1` writer"]
pub type W = crate::W<Ctl1Spec>;
#[doc = "Rx buffer DMA enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum Dmaren {
    #[doc = "0: Rx buffer DMA disabled"]
    Disabled = 0,
    #[doc = "1: Rx buffer DMA enabled"]
    Enabled = 1,
}
impl From<Dmaren> for bool {
    #[inline(always)]
    fn from(variant: Dmaren) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `DMAREN` reader - Rx buffer DMA enable"]
pub type DmarenR = crate::BitReader<Dmaren>;
impl DmarenR {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub const fn variant(&self) -> Dmaren {
        match self.bits {
            false => Dmaren::Disabled,
            true => Dmaren::Enabled,
        }
    }
    #[doc = "Rx buffer DMA disabled"]
    #[inline(always)]
    pub fn is_disabled(&self) -> bool {
        *self == Dmaren::Disabled
    }
    #[doc = "Rx buffer DMA enabled"]
    #[inline(always)]
    pub fn is_enabled(&self) -> bool {
        *self == Dmaren::Enabled
    }
}
#[doc = "Field `DMAREN` writer - Rx buffer DMA enable"]
pub type DmarenW<'a, REG> = crate::BitWriter<'a, REG, Dmaren>;
impl<'a, REG> DmarenW<'a, REG>
where
    REG: crate::Writable + crate::RegisterSpec,
{
    #[doc = "Rx buffer DMA disabled"]
    #[inline(always)]
    pub fn disabled(self) -> &'a mut crate::W<REG> {
        self.variant(Dmaren::Disabled)
    }
    #[doc = "Rx buffer DMA enabled"]
    #[inline(always)]
    pub fn enabled(self) -> &'a mut crate::W<REG> {
        self.variant(Dmaren::Enabled)
    }
}
#[doc = "Transmit Buffer DMA Enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum Dmaten {
    #[doc = "0: Tx buffer DMA disabled"]
    Disabled = 0,
    #[doc = "1: Tx buffer DMA enabled"]
    Enabled = 1,
}
impl From<Dmaten> for bool {
    #[inline(always)]
    fn from(variant: Dmaten) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `DMATEN` reader - Transmit Buffer DMA Enable"]
pub type DmatenR = crate::BitReader<Dmaten>;
impl DmatenR {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub const fn variant(&self) -> Dmaten {
        match self.bits {
            false => Dmaten::Disabled,
            true => Dmaten::Enabled,
        }
    }
    #[doc = "Tx buffer DMA disabled"]
    #[inline(always)]
    pub fn is_disabled(&self) -> bool {
        *self == Dmaten::Disabled
    }
    #[doc = "Tx buffer DMA enabled"]
    #[inline(always)]
    pub fn is_enabled(&self) -> bool {
        *self == Dmaten::Enabled
    }
}
#[doc = "Field `DMATEN` writer - Transmit Buffer DMA Enable"]
pub type DmatenW<'a, REG> = crate::BitWriter<'a, REG, Dmaten>;
impl<'a, REG> DmatenW<'a, REG>
where
    REG: crate::Writable + crate::RegisterSpec,
{
    #[doc = "Tx buffer DMA disabled"]
    #[inline(always)]
    pub fn disabled(self) -> &'a mut crate::W<REG> {
        self.variant(Dmaten::Disabled)
    }
    #[doc = "Tx buffer DMA enabled"]
    #[inline(always)]
    pub fn enabled(self) -> &'a mut crate::W<REG> {
        self.variant(Dmaten::Enabled)
    }
}
#[doc = "Drive NSS Output\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum Nssdrv {
    #[doc = "0: NSS output is disabled in master mode"]
    Disabled = 0,
    #[doc = "1: NSS output is enabled in master mode"]
    Enabled = 1,
}
impl From<Nssdrv> for bool {
    #[inline(always)]
    fn from(variant: Nssdrv) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `NSSDRV` reader - Drive NSS Output"]
pub type NssdrvR = crate::BitReader<Nssdrv>;
impl NssdrvR {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub const fn variant(&self) -> Nssdrv {
        match self.bits {
            false => Nssdrv::Disabled,
            true => Nssdrv::Enabled,
        }
    }
    #[doc = "NSS output is disabled in master mode"]
    #[inline(always)]
    pub fn is_disabled(&self) -> bool {
        *self == Nssdrv::Disabled
    }
    #[doc = "NSS output is enabled in master mode"]
    #[inline(always)]
    pub fn is_enabled(&self) -> bool {
        *self == Nssdrv::Enabled
    }
}
#[doc = "Field `NSSDRV` writer - Drive NSS Output"]
pub type NssdrvW<'a, REG> = crate::BitWriter<'a, REG, Nssdrv>;
impl<'a, REG> NssdrvW<'a, REG>
where
    REG: crate::Writable + crate::RegisterSpec,
{
    #[doc = "NSS output is disabled in master mode"]
    #[inline(always)]
    pub fn disabled(self) -> &'a mut crate::W<REG> {
        self.variant(Nssdrv::Disabled)
    }
    #[doc = "NSS output is enabled in master mode"]
    #[inline(always)]
    pub fn enabled(self) -> &'a mut crate::W<REG> {
        self.variant(Nssdrv::Enabled)
    }
}
#[doc = "SPI NSS pulse mode Enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum Nssp {
    #[doc = "0: NSSP Mode disabled"]
    Disabled = 0,
    #[doc = "1: NSSP Mode enabled"]
    Enabled = 1,
}
impl From<Nssp> for bool {
    #[inline(always)]
    fn from(variant: Nssp) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `NSSP` reader - SPI NSS pulse mode Enable"]
pub type NsspR = crate::BitReader<Nssp>;
impl NsspR {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub const fn variant(&self) -> Nssp {
        match self.bits {
            false => Nssp::Disabled,
            true => Nssp::Enabled,
        }
    }
    #[doc = "NSSP Mode disabled"]
    #[inline(always)]
    pub fn is_disabled(&self) -> bool {
        *self == Nssp::Disabled
    }
    #[doc = "NSSP Mode enabled"]
    #[inline(always)]
    pub fn is_enabled(&self) -> bool {
        *self == Nssp::Enabled
    }
}
#[doc = "Field `NSSP` writer - SPI NSS pulse mode Enable"]
pub type NsspW<'a, REG> = crate::BitWriter<'a, REG, Nssp>;
impl<'a, REG> NsspW<'a, REG>
where
    REG: crate::Writable + crate::RegisterSpec,
{
    #[doc = "NSSP Mode disabled"]
    #[inline(always)]
    pub fn disabled(self) -> &'a mut crate::W<REG> {
        self.variant(Nssp::Disabled)
    }
    #[doc = "NSSP Mode enabled"]
    #[inline(always)]
    pub fn enabled(self) -> &'a mut crate::W<REG> {
        self.variant(Nssp::Enabled)
    }
}
#[doc = "SPI TI Mode Enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum Tmod {
    #[doc = "0: SPI TI Mode disabled"]
    Disabled = 0,
    #[doc = "1: SPI TI Mode enabled"]
    Enabled = 1,
}
impl From<Tmod> for bool {
    #[inline(always)]
    fn from(variant: Tmod) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `TMOD` reader - SPI TI Mode Enable"]
pub type TmodR = crate::BitReader<Tmod>;
impl TmodR {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub const fn variant(&self) -> Tmod {
        match self.bits {
            false => Tmod::Disabled,
            true => Tmod::Enabled,
        }
    }
    #[doc = "SPI TI Mode disabled"]
    #[inline(always)]
    pub fn is_disabled(&self) -> bool {
        *self == Tmod::Disabled
    }
    #[doc = "SPI TI Mode enabled"]
    #[inline(always)]
    pub fn is_enabled(&self) -> bool {
        *self == Tmod::Enabled
    }
}
#[doc = "Field `TMOD` writer - SPI TI Mode Enable"]
pub type TmodW<'a, REG> = crate::BitWriter<'a, REG, Tmod>;
impl<'a, REG> TmodW<'a, REG>
where
    REG: crate::Writable + crate::RegisterSpec,
{
    #[doc = "SPI TI Mode disabled"]
    #[inline(always)]
    pub fn disabled(self) -> &'a mut crate::W<REG> {
        self.variant(Tmod::Disabled)
    }
    #[doc = "SPI TI Mode enabled"]
    #[inline(always)]
    pub fn enabled(self) -> &'a mut crate::W<REG> {
        self.variant(Tmod::Enabled)
    }
}
#[doc = "Error interrupt enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum Errie {
    #[doc = "0: Error interrupt disabled"]
    Disabled = 0,
    #[doc = "1: Error interrupt enabled"]
    Enabled = 1,
}
impl From<Errie> for bool {
    #[inline(always)]
    fn from(variant: Errie) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `ERRIE` reader - Error interrupt enable"]
pub type ErrieR = crate::BitReader<Errie>;
impl ErrieR {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub const fn variant(&self) -> Errie {
        match self.bits {
            false => Errie::Disabled,
            true => Errie::Enabled,
        }
    }
    #[doc = "Error interrupt disabled"]
    #[inline(always)]
    pub fn is_disabled(&self) -> bool {
        *self == Errie::Disabled
    }
    #[doc = "Error interrupt enabled"]
    #[inline(always)]
    pub fn is_enabled(&self) -> bool {
        *self == Errie::Enabled
    }
}
#[doc = "Field `ERRIE` writer - Error interrupt enable"]
pub type ErrieW<'a, REG> = crate::BitWriter<'a, REG, Errie>;
impl<'a, REG> ErrieW<'a, REG>
where
    REG: crate::Writable + crate::RegisterSpec,
{
    #[doc = "Error interrupt disabled"]
    #[inline(always)]
    pub fn disabled(self) -> &'a mut crate::W<REG> {
        self.variant(Errie::Disabled)
    }
    #[doc = "Error interrupt enabled"]
    #[inline(always)]
    pub fn enabled(self) -> &'a mut crate::W<REG> {
        self.variant(Errie::Enabled)
    }
}
#[doc = "RX buffer not empty interrupt enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum Rbneie {
    #[doc = "0: RBNE interrupt disabled"]
    Disabled = 0,
    #[doc = "1: RBNE interrupt enabled"]
    Enabled = 1,
}
impl From<Rbneie> for bool {
    #[inline(always)]
    fn from(variant: Rbneie) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `RBNEIE` reader - RX buffer not empty interrupt enable"]
pub type RbneieR = crate::BitReader<Rbneie>;
impl RbneieR {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub const fn variant(&self) -> Rbneie {
        match self.bits {
            false => Rbneie::Disabled,
            true => Rbneie::Enabled,
        }
    }
    #[doc = "RBNE interrupt disabled"]
    #[inline(always)]
    pub fn is_disabled(&self) -> bool {
        *self == Rbneie::Disabled
    }
    #[doc = "RBNE interrupt enabled"]
    #[inline(always)]
    pub fn is_enabled(&self) -> bool {
        *self == Rbneie::Enabled
    }
}
#[doc = "Field `RBNEIE` writer - RX buffer not empty interrupt enable"]
pub type RbneieW<'a, REG> = crate::BitWriter<'a, REG, Rbneie>;
impl<'a, REG> RbneieW<'a, REG>
where
    REG: crate::Writable + crate::RegisterSpec,
{
    #[doc = "RBNE interrupt disabled"]
    #[inline(always)]
    pub fn disabled(self) -> &'a mut crate::W<REG> {
        self.variant(Rbneie::Disabled)
    }
    #[doc = "RBNE interrupt enabled"]
    #[inline(always)]
    pub fn enabled(self) -> &'a mut crate::W<REG> {
        self.variant(Rbneie::Enabled)
    }
}
#[doc = "Tx buffer empty interrupt enable\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum Tbeie {
    #[doc = "0: TBE interrupt disabled"]
    Disabled = 0,
    #[doc = "1: TBE interrupt enabled"]
    Enabled = 1,
}
impl From<Tbeie> for bool {
    #[inline(always)]
    fn from(variant: Tbeie) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Field `TBEIE` reader - Tx buffer empty interrupt enable"]
pub type TbeieR = crate::BitReader<Tbeie>;
impl TbeieR {
    #[doc = "Get enumerated values variant"]
    #[inline(always)]
    pub const fn variant(&self) -> Tbeie {
        match self.bits {
            false => Tbeie::Disabled,
            true => Tbeie::Enabled,
        }
    }
    #[doc = "TBE interrupt disabled"]
    #[inline(always)]
    pub fn is_disabled(&self) -> bool {
        *self == Tbeie::Disabled
    }
    #[doc = "TBE interrupt enabled"]
    #[inline(always)]
    pub fn is_enabled(&self) -> bool {
        *self == Tbeie::Enabled
    }
}
#[doc = "Field `TBEIE` writer - Tx buffer empty interrupt enable"]
pub type TbeieW<'a, REG> = crate::BitWriter<'a, REG, Tbeie>;
impl<'a, REG> TbeieW<'a, REG>
where
    REG: crate::Writable + crate::RegisterSpec,
{
    #[doc = "TBE interrupt disabled"]
    #[inline(always)]
    pub fn disabled(self) -> &'a mut crate::W<REG> {
        self.variant(Tbeie::Disabled)
    }
    #[doc = "TBE interrupt enabled"]
    #[inline(always)]
    pub fn enabled(self) -> &'a mut crate::W<REG> {
        self.variant(Tbeie::Enabled)
    }
}
impl R {
    #[doc = "Bit 0 - Rx buffer DMA enable"]
    #[inline(always)]
    pub fn dmaren(&self) -> DmarenR {
        DmarenR::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1 - Transmit Buffer DMA Enable"]
    #[inline(always)]
    pub fn dmaten(&self) -> DmatenR {
        DmatenR::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2 - Drive NSS Output"]
    #[inline(always)]
    pub fn nssdrv(&self) -> NssdrvR {
        NssdrvR::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3 - SPI NSS pulse mode Enable"]
    #[inline(always)]
    pub fn nssp(&self) -> NsspR {
        NsspR::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 4 - SPI TI Mode Enable"]
    #[inline(always)]
    pub fn tmod(&self) -> TmodR {
        TmodR::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 5 - Error interrupt enable"]
    #[inline(always)]
    pub fn errie(&self) -> ErrieR {
        ErrieR::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6 - RX buffer not empty interrupt enable"]
    #[inline(always)]
    pub fn rbneie(&self) -> RbneieR {
        RbneieR::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7 - Tx buffer empty interrupt enable"]
    #[inline(always)]
    pub fn tbeie(&self) -> TbeieR {
        TbeieR::new(((self.bits >> 7) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 0 - Rx buffer DMA enable"]
    #[inline(always)]
    #[must_use]
    pub fn dmaren(&mut self) -> DmarenW<Ctl1Spec> {
        DmarenW::new(self, 0)
    }
    #[doc = "Bit 1 - Transmit Buffer DMA Enable"]
    #[inline(always)]
    #[must_use]
    pub fn dmaten(&mut self) -> DmatenW<Ctl1Spec> {
        DmatenW::new(self, 1)
    }
    #[doc = "Bit 2 - Drive NSS Output"]
    #[inline(always)]
    #[must_use]
    pub fn nssdrv(&mut self) -> NssdrvW<Ctl1Spec> {
        NssdrvW::new(self, 2)
    }
    #[doc = "Bit 3 - SPI NSS pulse mode Enable"]
    #[inline(always)]
    #[must_use]
    pub fn nssp(&mut self) -> NsspW<Ctl1Spec> {
        NsspW::new(self, 3)
    }
    #[doc = "Bit 4 - SPI TI Mode Enable"]
    #[inline(always)]
    #[must_use]
    pub fn tmod(&mut self) -> TmodW<Ctl1Spec> {
        TmodW::new(self, 4)
    }
    #[doc = "Bit 5 - Error interrupt enable"]
    #[inline(always)]
    #[must_use]
    pub fn errie(&mut self) -> ErrieW<Ctl1Spec> {
        ErrieW::new(self, 5)
    }
    #[doc = "Bit 6 - RX buffer not empty interrupt enable"]
    #[inline(always)]
    #[must_use]
    pub fn rbneie(&mut self) -> RbneieW<Ctl1Spec> {
        RbneieW::new(self, 6)
    }
    #[doc = "Bit 7 - Tx buffer empty interrupt enable"]
    #[inline(always)]
    #[must_use]
    pub fn tbeie(&mut self) -> TbeieW<Ctl1Spec> {
        TbeieW::new(self, 7)
    }
}
#[doc = "control register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctl1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctl1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct Ctl1Spec;
impl crate::RegisterSpec for Ctl1Spec {
    type Ux = u32;
}
#[doc = "`read()` method returns [`ctl1::R`](R) reader structure"]
impl crate::Readable for Ctl1Spec {}
#[doc = "`write(|w| ..)` method takes [`ctl1::W`](W) writer structure"]
impl crate::Writable for Ctl1Spec {
    type Safety = crate::Unsafe;
    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets CTL1 to value 0"]
impl crate::Resettable for Ctl1Spec {
    const RESET_VALUE: u32 = 0;
}