gcn-assembler 0.1.1

GCN assembler for Gaia project
Documentation 
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//! GCN instructions for AMD GPUs.

use serde::{Deserialize, Serialize};

/// GCN register
#[derive(Debug, Clone, Copy, PartialEq, Eq, Serialize, Deserialize)]
pub enum GcnReg {
    /// Vector general purpose register
    VGPR(u8),
    /// Scalar general purpose register
    SGPR(u8),
    /// Accumulation register
    AGPR(u8),
}

impl std::fmt::Display for GcnReg {
    fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
        match self {
            GcnReg::VGPR(n) => write!(f, "v{}", n),
            GcnReg::SGPR(n) => write!(f, "s{}", n),
            GcnReg::AGPR(n) => write!(f, "a{}", n),
        }
    }
}

/// GCN instruction set (CDNA/RDNA base)
#[derive(Debug, Clone, PartialEq, Serialize, Deserialize)]
pub enum GcnInstruction {
    /// Arithmetic: v_add_f32 dst, src0, src1
    VAddF32 { dst: GcnReg, src0: GcnReg, src1: GcnReg },
    /// Arithmetic: v_mul_f32 dst, src0, src1
    VMulF32 { dst: GcnReg, src0: GcnReg, src1: GcnReg },
    /// Arithmetic: v_dot2_f32_f16 dst, src0, src1
    VDot2F32F16 { dst: GcnReg, src0: GcnReg, src1: GcnReg },
    /// Memory: global_load_dword dst, addr, off
    GlobalLoadDword { dst: GcnReg, addr: GcnReg, offset: u16 },
    /// Memory: global_store_dword addr, src, off
    GlobalStoreDword { addr: GcnReg, src: GcnReg, offset: u16 },
    /// Control flow: s_endpgm
    SEndPgm,
    /// Control flow: s_nop
    SNop(u16),
}