gc9a01/
lib.rs

1#![no_std]
2#![no_main]
3
4use embedded_graphics::{
5    pixelcolor::{raw::RawU16, Rgb565},
6    prelude::*,
7};
8
9use embedded_hal::blocking::spi;
10use embedded_hal::digital::v2::OutputPin;
11
12#[derive(Debug)]
13pub struct CommError;
14
15enum GC9A01Kind {
16    GC9A01Start,
17    GC9A01Cmd,
18    GC9A01DATA,
19    GC9A01DELAY,
20    GC9A01END,
21}
22
23struct GC9A01Step {
24    state: GC9A01Kind,
25    value: u8,
26}
27
28const GC9A01_INV_OFF: u8 = 0x20;
29const GC9A01_INV_ON_L: u8 = 0x21;
30const GC9A01_DISP_ON: u8 = 0x29;
31const GC9A01_CA_SET: u8 = 0x2A;
32const GC9A01_RA_SET: u8 = 0x2B;
33const GC9A01_RAM_WR: u8 = 0x2C;
34const GC9A01_COL_MOD: u8 = 0x3A;
35const GC9A01_MAD_CTL: u8 = 0x36;
36const GC9A01_MAD_CTL_MY: u8 = 0x80;
37const GC9A01_MAD_CTL_MX: u8 = 0x40;
38const GC9A01_MAD_CTL_MV: u8 = 0x20;
39const GC9A01_MAD_CTL_RGB: u8 = 0x00;
40const GC9A01_DIS_FN_CTRL: u8 = 0xB6;
41
42const CONFIG: [GC9A01Step; 188] = [
43    GC9A01Step {
44        state: GC9A01Kind::GC9A01Start,
45        value: 0x0,
46    },
47    GC9A01Step {
48        state: GC9A01Kind::GC9A01Cmd,
49        value: 0xEF,
50    },
51    GC9A01Step {
52        state: GC9A01Kind::GC9A01Cmd,
53        value: 0xEB,
54    },
55    GC9A01Step {
56        state: GC9A01Kind::GC9A01DATA,
57        value: 0x14,
58    },
59    GC9A01Step {
60        state: GC9A01Kind::GC9A01Cmd,
61        value: 0xFE,
62    }, // Inter Register Enable1
63    GC9A01Step {
64        state: GC9A01Kind::GC9A01Cmd,
65        value: 0xEF,
66    }, // Inter Register Enable2
67    GC9A01Step {
68        state: GC9A01Kind::GC9A01Cmd,
69        value: 0xEB,
70    },
71    GC9A01Step {
72        state: GC9A01Kind::GC9A01DATA,
73        value: 0x14,
74    },
75    GC9A01Step {
76        state: GC9A01Kind::GC9A01Cmd,
77        value: 0x84,
78    },
79    GC9A01Step {
80        state: GC9A01Kind::GC9A01DATA,
81        value: 0x40,
82    },
83    GC9A01Step {
84        state: GC9A01Kind::GC9A01Cmd,
85        value: 0x85,
86    },
87    GC9A01Step {
88        state: GC9A01Kind::GC9A01DATA,
89        value: 0xFF,
90    },
91    GC9A01Step {
92        state: GC9A01Kind::GC9A01Cmd,
93        value: 0x86,
94    },
95    GC9A01Step {
96        state: GC9A01Kind::GC9A01DATA,
97        value: 0xFF,
98    },
99    GC9A01Step {
100        state: GC9A01Kind::GC9A01Cmd,
101        value: 0x87,
102    },
103    GC9A01Step {
104        state: GC9A01Kind::GC9A01DATA,
105        value: 0xFF,
106    },
107    GC9A01Step {
108        state: GC9A01Kind::GC9A01Cmd,
109        value: 0x88,
110    },
111    GC9A01Step {
112        state: GC9A01Kind::GC9A01DATA,
113        value: 0x0A,
114    },
115    GC9A01Step {
116        state: GC9A01Kind::GC9A01Cmd,
117        value: 0x89,
118    },
119    GC9A01Step {
120        state: GC9A01Kind::GC9A01DATA,
121        value: 0x21,
122    },
123    GC9A01Step {
124        state: GC9A01Kind::GC9A01Cmd,
125        value: 0x8A,
126    },
127    GC9A01Step {
128        state: GC9A01Kind::GC9A01DATA,
129        value: 0x00,
130    },
131    GC9A01Step {
132        state: GC9A01Kind::GC9A01Cmd,
133        value: 0x8B,
134    },
135    GC9A01Step {
136        state: GC9A01Kind::GC9A01DATA,
137        value: 0x80,
138    },
139    GC9A01Step {
140        state: GC9A01Kind::GC9A01Cmd,
141        value: 0x8C,
142    },
143    GC9A01Step {
144        state: GC9A01Kind::GC9A01DATA,
145        value: 0x01,
146    },
147    GC9A01Step {
148        state: GC9A01Kind::GC9A01Cmd,
149        value: 0x8D,
150    },
151    GC9A01Step {
152        state: GC9A01Kind::GC9A01DATA,
153        value: 0x01,
154    },
155    GC9A01Step {
156        state: GC9A01Kind::GC9A01Cmd,
157        value: 0x8E,
158    },
159    GC9A01Step {
160        state: GC9A01Kind::GC9A01DATA,
161        value: 0xFF,
162    },
163    GC9A01Step {
164        state: GC9A01Kind::GC9A01Cmd,
165        value: 0x8F,
166    },
167    GC9A01Step {
168        state: GC9A01Kind::GC9A01DATA,
169        value: 0xFF,
170    },
171    GC9A01Step {
172        state: GC9A01Kind::GC9A01Cmd,
173        value: GC9A01_DIS_FN_CTRL,
174    }, // Display Function Control
175    GC9A01Step {
176        state: GC9A01Kind::GC9A01DATA,
177        value: 0x00,
178    },
179    GC9A01Step {
180        state: GC9A01Kind::GC9A01DATA,
181        value: 0x00,
182    },
183    GC9A01Step {
184        state: GC9A01Kind::GC9A01Cmd,
185        value: GC9A01_MAD_CTL,
186    }, // Memory Access Control
187    GC9A01Step {
188        state: GC9A01Kind::GC9A01DATA,
189        value: 0x48,
190    }, // Set the display direction 0,1,2,3	four directions
191    GC9A01Step {
192        state: GC9A01Kind::GC9A01Cmd,
193        value: GC9A01_COL_MOD,
194    }, // ColMod: Pixel Format Set
195    GC9A01Step {
196        state: GC9A01Kind::GC9A01DATA,
197        value: 0x05,
198    }, // 16 Bits per pixel
199    GC9A01Step {
200        state: GC9A01Kind::GC9A01Cmd,
201        value: 0x90,
202    },
203    GC9A01Step {
204        state: GC9A01Kind::GC9A01DATA,
205        value: 0x08,
206    },
207    GC9A01Step {
208        state: GC9A01Kind::GC9A01DATA,
209        value: 0x08,
210    },
211    GC9A01Step {
212        state: GC9A01Kind::GC9A01DATA,
213        value: 0x08,
214    },
215    GC9A01Step {
216        state: GC9A01Kind::GC9A01DATA,
217        value: 0x08,
218    },
219    GC9A01Step {
220        state: GC9A01Kind::GC9A01Cmd,
221        value: 0xBD,
222    },
223    GC9A01Step {
224        state: GC9A01Kind::GC9A01DATA,
225        value: 0x06,
226    },
227    GC9A01Step {
228        state: GC9A01Kind::GC9A01Cmd,
229        value: 0xBC,
230    },
231    GC9A01Step {
232        state: GC9A01Kind::GC9A01DATA,
233        value: 0x00,
234    },
235    GC9A01Step {
236        state: GC9A01Kind::GC9A01Cmd,
237        value: 0xFF,
238    },
239    GC9A01Step {
240        state: GC9A01Kind::GC9A01DATA,
241        value: 0x60,
242    },
243    GC9A01Step {
244        state: GC9A01Kind::GC9A01DATA,
245        value: 0x01,
246    },
247    GC9A01Step {
248        state: GC9A01Kind::GC9A01DATA,
249        value: 0x04,
250    },
251    GC9A01Step {
252        state: GC9A01Kind::GC9A01Cmd,
253        value: 0xC3,
254    }, // Power Control 2
255    GC9A01Step {
256        state: GC9A01Kind::GC9A01DATA,
257        value: 0x13,
258    },
259    GC9A01Step {
260        state: GC9A01Kind::GC9A01Cmd,
261        value: 0xC4,
262    }, // Power Control 3
263    GC9A01Step {
264        state: GC9A01Kind::GC9A01DATA,
265        value: 0x13,
266    },
267    GC9A01Step {
268        state: GC9A01Kind::GC9A01Cmd,
269        value: 0xC9,
270    }, // Power Control 4
271    GC9A01Step {
272        state: GC9A01Kind::GC9A01DATA,
273        value: 0x22,
274    },
275    GC9A01Step {
276        state: GC9A01Kind::GC9A01Cmd,
277        value: 0xBE,
278    },
279    GC9A01Step {
280        state: GC9A01Kind::GC9A01DATA,
281        value: 0x11,
282    },
283    GC9A01Step {
284        state: GC9A01Kind::GC9A01Cmd,
285        value: 0xE1,
286    },
287    GC9A01Step {
288        state: GC9A01Kind::GC9A01DATA,
289        value: 0x10,
290    },
291    GC9A01Step {
292        state: GC9A01Kind::GC9A01DATA,
293        value: 0x0E,
294    },
295    GC9A01Step {
296        state: GC9A01Kind::GC9A01Cmd,
297        value: 0xDF,
298    },
299    GC9A01Step {
300        state: GC9A01Kind::GC9A01DATA,
301        value: 0x21,
302    },
303    GC9A01Step {
304        state: GC9A01Kind::GC9A01DATA,
305        value: 0x0C,
306    },
307    GC9A01Step {
308        state: GC9A01Kind::GC9A01DATA,
309        value: 0x02,
310    },
311    GC9A01Step {
312        state: GC9A01Kind::GC9A01Cmd,
313        value: 0xF0,
314    }, // SET_GAMMA1
315    GC9A01Step {
316        state: GC9A01Kind::GC9A01DATA,
317        value: 0x45,
318    },
319    GC9A01Step {
320        state: GC9A01Kind::GC9A01DATA,
321        value: 0x09,
322    },
323    GC9A01Step {
324        state: GC9A01Kind::GC9A01DATA,
325        value: 0x08,
326    },
327    GC9A01Step {
328        state: GC9A01Kind::GC9A01DATA,
329        value: 0x08,
330    },
331    GC9A01Step {
332        state: GC9A01Kind::GC9A01DATA,
333        value: 0x26,
334    },
335    GC9A01Step {
336        state: GC9A01Kind::GC9A01DATA,
337        value: 0x2A,
338    },
339    GC9A01Step {
340        state: GC9A01Kind::GC9A01Cmd,
341        value: 0xF1,
342    }, // SET_GAMMA2
343    GC9A01Step {
344        state: GC9A01Kind::GC9A01DATA,
345        value: 0x43,
346    },
347    GC9A01Step {
348        state: GC9A01Kind::GC9A01DATA,
349        value: 0x70,
350    },
351    GC9A01Step {
352        state: GC9A01Kind::GC9A01DATA,
353        value: 0x72,
354    },
355    GC9A01Step {
356        state: GC9A01Kind::GC9A01DATA,
357        value: 0x36,
358    },
359    GC9A01Step {
360        state: GC9A01Kind::GC9A01DATA,
361        value: 0x37,
362    },
363    GC9A01Step {
364        state: GC9A01Kind::GC9A01DATA,
365        value: 0x6F,
366    },
367    GC9A01Step {
368        state: GC9A01Kind::GC9A01Cmd,
369        value: 0xF2,
370    }, // SET_GAMMA3
371    GC9A01Step {
372        state: GC9A01Kind::GC9A01DATA,
373        value: 0x45,
374    },
375    GC9A01Step {
376        state: GC9A01Kind::GC9A01DATA,
377        value: 0x09,
378    },
379    GC9A01Step {
380        state: GC9A01Kind::GC9A01DATA,
381        value: 0x08,
382    },
383    GC9A01Step {
384        state: GC9A01Kind::GC9A01DATA,
385        value: 0x08,
386    },
387    GC9A01Step {
388        state: GC9A01Kind::GC9A01DATA,
389        value: 0x26,
390    },
391    GC9A01Step {
392        state: GC9A01Kind::GC9A01DATA,
393        value: 0x2A,
394    },
395    GC9A01Step {
396        state: GC9A01Kind::GC9A01Cmd,
397        value: 0xF3,
398    }, // SET_GAMMA4
399    GC9A01Step {
400        state: GC9A01Kind::GC9A01DATA,
401        value: 0x43,
402    },
403    GC9A01Step {
404        state: GC9A01Kind::GC9A01DATA,
405        value: 0x70,
406    },
407    GC9A01Step {
408        state: GC9A01Kind::GC9A01DATA,
409        value: 0x72,
410    },
411    GC9A01Step {
412        state: GC9A01Kind::GC9A01DATA,
413        value: 0x36,
414    },
415    GC9A01Step {
416        state: GC9A01Kind::GC9A01DATA,
417        value: 0x37,
418    },
419    GC9A01Step {
420        state: GC9A01Kind::GC9A01DATA,
421        value: 0x6F,
422    },
423    GC9A01Step {
424        state: GC9A01Kind::GC9A01Cmd,
425        value: 0xED,
426    },
427    GC9A01Step {
428        state: GC9A01Kind::GC9A01DATA,
429        value: 0x1B,
430    },
431    GC9A01Step {
432        state: GC9A01Kind::GC9A01DATA,
433        value: 0x0B,
434    },
435    GC9A01Step {
436        state: GC9A01Kind::GC9A01Cmd,
437        value: 0xAE,
438    },
439    GC9A01Step {
440        state: GC9A01Kind::GC9A01DATA,
441        value: 0x77,
442    },
443    GC9A01Step {
444        state: GC9A01Kind::GC9A01Cmd,
445        value: 0xCD,
446    },
447    GC9A01Step {
448        state: GC9A01Kind::GC9A01DATA,
449        value: 0x63,
450    },
451    GC9A01Step {
452        state: GC9A01Kind::GC9A01Cmd,
453        value: 0x70,
454    },
455    GC9A01Step {
456        state: GC9A01Kind::GC9A01DATA,
457        value: 0x07,
458    },
459    GC9A01Step {
460        state: GC9A01Kind::GC9A01DATA,
461        value: 0x07,
462    },
463    GC9A01Step {
464        state: GC9A01Kind::GC9A01DATA,
465        value: 0x04,
466    },
467    GC9A01Step {
468        state: GC9A01Kind::GC9A01DATA,
469        value: 0x0E,
470    },
471    GC9A01Step {
472        state: GC9A01Kind::GC9A01DATA,
473        value: 0x0F,
474    },
475    GC9A01Step {
476        state: GC9A01Kind::GC9A01DATA,
477        value: 0x09,
478    },
479    GC9A01Step {
480        state: GC9A01Kind::GC9A01DATA,
481        value: 0x07,
482    },
483    GC9A01Step {
484        state: GC9A01Kind::GC9A01DATA,
485        value: 0x08,
486    },
487    GC9A01Step {
488        state: GC9A01Kind::GC9A01DATA,
489        value: 0x03,
490    },
491    GC9A01Step {
492        state: GC9A01Kind::GC9A01Cmd,
493        value: 0xE8,
494    },
495    GC9A01Step {
496        state: GC9A01Kind::GC9A01DATA,
497        value: 0x34,
498    },
499    GC9A01Step {
500        state: GC9A01Kind::GC9A01Cmd,
501        value: 0x62,
502    },
503    GC9A01Step {
504        state: GC9A01Kind::GC9A01DATA,
505        value: 0x18,
506    },
507    GC9A01Step {
508        state: GC9A01Kind::GC9A01DATA,
509        value: 0x0D,
510    },
511    GC9A01Step {
512        state: GC9A01Kind::GC9A01DATA,
513        value: 0x71,
514    },
515    GC9A01Step {
516        state: GC9A01Kind::GC9A01DATA,
517        value: 0xED,
518    },
519    GC9A01Step {
520        state: GC9A01Kind::GC9A01DATA,
521        value: 0x70,
522    },
523    GC9A01Step {
524        state: GC9A01Kind::GC9A01DATA,
525        value: 0x70,
526    },
527    GC9A01Step {
528        state: GC9A01Kind::GC9A01DATA,
529        value: 0x18,
530    },
531    GC9A01Step {
532        state: GC9A01Kind::GC9A01DATA,
533        value: 0x0F,
534    },
535    GC9A01Step {
536        state: GC9A01Kind::GC9A01DATA,
537        value: 0x71,
538    },
539    GC9A01Step {
540        state: GC9A01Kind::GC9A01DATA,
541        value: 0xEF,
542    },
543    GC9A01Step {
544        state: GC9A01Kind::GC9A01DATA,
545        value: 0x70,
546    },
547    GC9A01Step {
548        state: GC9A01Kind::GC9A01DATA,
549        value: 0x70,
550    },
551    GC9A01Step {
552        state: GC9A01Kind::GC9A01Cmd,
553        value: 0x63,
554    },
555    GC9A01Step {
556        state: GC9A01Kind::GC9A01DATA,
557        value: 0x18,
558    },
559    GC9A01Step {
560        state: GC9A01Kind::GC9A01DATA,
561        value: 0x11,
562    },
563    GC9A01Step {
564        state: GC9A01Kind::GC9A01DATA,
565        value: 0x71,
566    },
567    GC9A01Step {
568        state: GC9A01Kind::GC9A01DATA,
569        value: 0xF1,
570    },
571    GC9A01Step {
572        state: GC9A01Kind::GC9A01DATA,
573        value: 0x70,
574    },
575    GC9A01Step {
576        state: GC9A01Kind::GC9A01DATA,
577        value: 0x70,
578    },
579    GC9A01Step {
580        state: GC9A01Kind::GC9A01DATA,
581        value: 0x18,
582    },
583    GC9A01Step {
584        state: GC9A01Kind::GC9A01DATA,
585        value: 0x13,
586    },
587    GC9A01Step {
588        state: GC9A01Kind::GC9A01DATA,
589        value: 0x71,
590    },
591    GC9A01Step {
592        state: GC9A01Kind::GC9A01DATA,
593        value: 0xF3,
594    },
595    GC9A01Step {
596        state: GC9A01Kind::GC9A01DATA,
597        value: 0x70,
598    },
599    GC9A01Step {
600        state: GC9A01Kind::GC9A01DATA,
601        value: 0x70,
602    },
603    GC9A01Step {
604        state: GC9A01Kind::GC9A01Cmd,
605        value: 0x64,
606    },
607    GC9A01Step {
608        state: GC9A01Kind::GC9A01DATA,
609        value: 0x28,
610    },
611    GC9A01Step {
612        state: GC9A01Kind::GC9A01DATA,
613        value: 0x29,
614    },
615    GC9A01Step {
616        state: GC9A01Kind::GC9A01DATA,
617        value: 0xF1,
618    },
619    GC9A01Step {
620        state: GC9A01Kind::GC9A01DATA,
621        value: 0x01,
622    },
623    GC9A01Step {
624        state: GC9A01Kind::GC9A01DATA,
625        value: 0xF1,
626    },
627    GC9A01Step {
628        state: GC9A01Kind::GC9A01DATA,
629        value: 0x00,
630    },
631    GC9A01Step {
632        state: GC9A01Kind::GC9A01DATA,
633        value: 0x07,
634    },
635    GC9A01Step {
636        state: GC9A01Kind::GC9A01Cmd,
637        value: 0x66,
638    },
639    GC9A01Step {
640        state: GC9A01Kind::GC9A01DATA,
641        value: 0x3C,
642    },
643    GC9A01Step {
644        state: GC9A01Kind::GC9A01DATA,
645        value: 0x00,
646    },
647    GC9A01Step {
648        state: GC9A01Kind::GC9A01DATA,
649        value: 0xCD,
650    },
651    GC9A01Step {
652        state: GC9A01Kind::GC9A01DATA,
653        value: 0x67,
654    },
655    GC9A01Step {
656        state: GC9A01Kind::GC9A01DATA,
657        value: 0x45,
658    },
659    GC9A01Step {
660        state: GC9A01Kind::GC9A01DATA,
661        value: 0x45,
662    },
663    GC9A01Step {
664        state: GC9A01Kind::GC9A01DATA,
665        value: 0x10,
666    },
667    GC9A01Step {
668        state: GC9A01Kind::GC9A01DATA,
669        value: 0x00,
670    },
671    GC9A01Step {
672        state: GC9A01Kind::GC9A01DATA,
673        value: 0x00,
674    },
675    GC9A01Step {
676        state: GC9A01Kind::GC9A01DATA,
677        value: 0x00,
678    },
679    GC9A01Step {
680        state: GC9A01Kind::GC9A01Cmd,
681        value: 0x67,
682    },
683    GC9A01Step {
684        state: GC9A01Kind::GC9A01DATA,
685        value: 0x00,
686    },
687    GC9A01Step {
688        state: GC9A01Kind::GC9A01DATA,
689        value: 0x3C,
690    },
691    GC9A01Step {
692        state: GC9A01Kind::GC9A01DATA,
693        value: 0x00,
694    },
695    GC9A01Step {
696        state: GC9A01Kind::GC9A01DATA,
697        value: 0x00,
698    },
699    GC9A01Step {
700        state: GC9A01Kind::GC9A01DATA,
701        value: 0x00,
702    },
703    GC9A01Step {
704        state: GC9A01Kind::GC9A01DATA,
705        value: 0x01,
706    },
707    GC9A01Step {
708        state: GC9A01Kind::GC9A01DATA,
709        value: 0x54,
710    },
711    GC9A01Step {
712        state: GC9A01Kind::GC9A01DATA,
713        value: 0x10,
714    },
715    GC9A01Step {
716        state: GC9A01Kind::GC9A01DATA,
717        value: 0x32,
718    },
719    GC9A01Step {
720        state: GC9A01Kind::GC9A01DATA,
721        value: 0x98,
722    },
723    GC9A01Step {
724        state: GC9A01Kind::GC9A01Cmd,
725        value: 0x74,
726    },
727    GC9A01Step {
728        state: GC9A01Kind::GC9A01DATA,
729        value: 0x10,
730    },
731    GC9A01Step {
732        state: GC9A01Kind::GC9A01DATA,
733        value: 0x85,
734    },
735    GC9A01Step {
736        state: GC9A01Kind::GC9A01DATA,
737        value: 0x80,
738    },
739    GC9A01Step {
740        state: GC9A01Kind::GC9A01DATA,
741        value: 0x00,
742    },
743    GC9A01Step {
744        state: GC9A01Kind::GC9A01DATA,
745        value: 0x00,
746    },
747    GC9A01Step {
748        state: GC9A01Kind::GC9A01DATA,
749        value: 0x4E,
750    },
751    GC9A01Step {
752        state: GC9A01Kind::GC9A01DATA,
753        value: 0x00,
754    },
755    GC9A01Step {
756        state: GC9A01Kind::GC9A01Cmd,
757        value: 0x98,
758    },
759    GC9A01Step {
760        state: GC9A01Kind::GC9A01DATA,
761        value: 0x3E,
762    },
763    GC9A01Step {
764        state: GC9A01Kind::GC9A01DATA,
765        value: 0x07,
766    },
767    GC9A01Step {
768        state: GC9A01Kind::GC9A01Cmd,
769        value: 0x35,
770    }, // Tearing Effect Line ON
771    GC9A01Step {
772        state: GC9A01Kind::GC9A01Cmd,
773        value: 0x21,
774    }, // Display Inversion ON
775    GC9A01Step {
776        state: GC9A01Kind::GC9A01Cmd,
777        value: 0x11,
778    }, // Sleep Out Mode
779    GC9A01Step {
780        state: GC9A01Kind::GC9A01DELAY,
781        value: 120,
782    },
783    GC9A01Step {
784        state: GC9A01Kind::GC9A01Cmd,
785        value: GC9A01_DISP_ON,
786    }, // Display ON
787    GC9A01Step {
788        state: GC9A01Kind::GC9A01DELAY,
789        value: 255,
790    },
791    GC9A01Step {
792        state: GC9A01Kind::GC9A01END,
793        value: 0x0,
794    },
795];
796
797/// GC9A01 driver
798pub struct GC9A01<SPI, CS, DC> {
799    pub spi: SPI,
800    pub cs: CS,
801    pub dc: DC,
802}
803
804impl<SPI, CS, DC, E, PinError> GC9A01<SPI, CS, DC>
805where
806    SPI: spi::Write<u8, Error = E>,
807    CS: OutputPin<Error = PinError>,
808    DC: OutputPin<Error = PinError>,
809{
810    pub fn default(spi: SPI, cs: CS, dc: DC) -> Result<Self, E> {
811        GC9A01::new(spi, cs, dc)
812    }
813
814    /// Takes a CONFIG object to initialize the adxl355 driver
815    pub fn new(spi: SPI, cs: CS, dc: DC) -> Result<Self, E> {
816        let gc9a01 = GC9A01 { spi, cs, dc };
817
818        Ok(gc9a01)
819    }
820
821    pub fn setup(&mut self) {
822        for step in CONFIG.iter() {
823            match step.state {
824                GC9A01Kind::GC9A01Cmd => {
825                    self.command(step.value);
826                }
827                GC9A01Kind::GC9A01DATA => {
828                    self.data(step.value);
829                }
830                GC9A01Kind::GC9A01DELAY => {}
831                _ => { /* do nothing */ }
832            }
833        }
834    }
835
836    fn command(&mut self, cmd: u8) {
837        self.cs.set_low().ok();
838        self.dc.set_low().ok();
839        self.spi.write(&[cmd]).unwrap_or_else(|_err| {});
840        self.cs.set_high().ok();
841    }
842
843    fn data(&mut self, data: u8) {
844        self.cs.set_low().ok();
845        self.dc.set_high().ok();
846        self.spi.write(&[data]).unwrap_or_else(|_err| {});
847        self.cs.set_high().ok();
848    }
849
850    fn fill_rect(&mut self, x: u16, y: u16, w: u16, h: u16, color: u16) {
851        let mut _w: u16 = w;
852        let mut _h: u16 = h;
853
854        if (x + w - 1) > 240 {
855            _w = 240 - x;
856        }
857
858        if (y + h - 1) > 240 {
859            _h = 240 - y;
860        }
861
862        self.set_frame(x, y, x + _w - 1, y + _h - 1);
863
864        let hi: u8 = (color >> 8) as u8;
865        let lo: u8 = (color & 0xFF) as u8;
866
867        for _y in 0.._h {
868            for _x in 0.._w {
869                self.data(hi);
870                self.data(lo);
871            }
872        }
873    }
874
875    fn set_pixel(&mut self, x: u32, y: u32, color: u16) -> Result<(), CommError> {
876        let hi: u8 = (color >> 8) as u8;
877        let lo: u8 = (color & 0xFF) as u8;
878
879        if x < 240 && y < 240 {
880            self.set_frame(x as u16, y as u16, x as u16, y as u16);
881            self.data(hi);
882            self.data(lo);
883        }
884
885        Ok(())
886    }
887
888    fn set_frame(&mut self, x1: u16, y1: u16, x2: u16, y2: u16) {
889        self.command(GC9A01_CA_SET); // Column addr set
890        self.data((x1 >> 8) as u8);
891        self.data((x1 & 0xFF) as u8); // XStart
892        self.data((x2 >> 8) as u8);
893        self.data((x2 & 0xFF) as u8); // XEND
894
895        self.command(GC9A01_RA_SET); // Row addr set
896        self.data((y1 >> 8) as u8);
897        self.data((y1 & 0xFF) as u8); // YStart
898        self.data((y2 >> 8) as u8);
899        self.data((y2 & 0xFF) as u8); // YEND
900
901        self.command(GC9A01_RAM_WR);
902    }
903}
904
905impl<SPI, CS, DC, E, PinError> OriginDimensions for GC9A01<SPI, CS, DC>
906where
907    SPI: spi::Write<u8, Error = E>,
908    CS: OutputPin<Error = PinError>,
909    DC: OutputPin<Error = PinError>,
910{
911    fn size(&self) -> Size {
912        Size::new(240, 240)
913    }
914}
915
916impl<SPI, CS, DC, E, PinError> DrawTarget for GC9A01<SPI, CS, DC>
917where
918    SPI: spi::Write<u8, Error = E>,
919    CS: OutputPin<Error = PinError>,
920    DC: OutputPin<Error = PinError>,
921{
922    type Color = Rgb565;
923    type Error = CommError;
924
925    fn draw_iter<I>(&mut self, pixels: I) -> Result<(), Self::Error>
926    where
927        I: IntoIterator<Item = Pixel<Self::Color>>,
928    {
929        for Pixel(coord, color) in pixels.into_iter() {
930            self.set_pixel(
931                coord.x as u32,
932                coord.y as u32,
933                RawU16::from(color).into_inner(),
934            ).unwrap();
935        }
936
937        Ok(())
938    }
939}
940
941#[cfg(test)]
942mod tests {
943
944    #[test]
945    fn it_works() {
946        let result = 4;
947        assert_eq!(result, 4);
948    }
949}